1 // SPDX-License-Identifier: GPL-2.0
3 * User-space Probes (UProbes) for s390
5 * Copyright IBM Corp. 2014
6 * Author(s): Jan Willeke,
9 #include <linux/uaccess.h>
10 #include <linux/uprobes.h>
11 #include <linux/compat.h>
12 #include <linux/kdebug.h>
13 #include <linux/sched/task_stack.h>
15 #include <asm/switch_to.h>
16 #include <asm/facility.h>
17 #include <asm/kprobes.h>
21 #define UPROBE_TRAP_NR UINT_MAX
23 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
26 return probe_is_prohibited_opcode(auprobe->insn);
29 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
31 if (psw_bits(regs->psw).eaba == PSW_BITS_AMODE_24BIT)
33 if (!is_compat_task() && psw_bits(regs->psw).eaba == PSW_BITS_AMODE_31BIT)
35 clear_thread_flag(TIF_PER_TRAP);
36 auprobe->saved_per = psw_bits(regs->psw).per;
37 auprobe->saved_int_code = regs->int_code;
38 regs->int_code = UPROBE_TRAP_NR;
39 regs->psw.addr = current->utask->xol_vaddr;
40 set_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
41 update_cr_regs(current);
45 bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
47 struct pt_regs *regs = task_pt_regs(tsk);
49 if (regs->int_code != UPROBE_TRAP_NR)
54 static int check_per_event(unsigned short cause, unsigned long control,
57 if (!(regs->psw.mask & PSW_MASK_PER))
59 /* user space single step */
62 /* over indication for storage alteration */
63 if ((control & 0x20200000) && (cause & 0x2000))
67 if ((control & 0x80800000) == 0x80000000)
69 /* branch into selected range */
70 if (((control & 0x80800000) == 0x80800000) &&
71 regs->psw.addr >= current->thread.per_user.start &&
72 regs->psw.addr <= current->thread.per_user.end)
78 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
80 int fixup = probe_get_fixup_type(auprobe->insn);
81 struct uprobe_task *utask = current->utask;
83 clear_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
84 update_cr_regs(current);
85 psw_bits(regs->psw).per = auprobe->saved_per;
86 regs->int_code = auprobe->saved_int_code;
88 if (fixup & FIXUP_PSW_NORMAL)
89 regs->psw.addr += utask->vaddr - utask->xol_vaddr;
90 if (fixup & FIXUP_RETURN_REGISTER) {
91 int reg = (auprobe->insn[0] & 0xf0) >> 4;
93 regs->gprs[reg] += utask->vaddr - utask->xol_vaddr;
95 if (fixup & FIXUP_BRANCH_NOT_TAKEN) {
96 int ilen = insn_length(auprobe->insn[0] >> 8);
98 if (regs->psw.addr - utask->xol_vaddr == ilen)
99 regs->psw.addr = utask->vaddr + ilen;
101 if (check_per_event(current->thread.per_event.cause,
102 current->thread.per_user.control, regs)) {
103 /* fix per address */
104 current->thread.per_event.address = utask->vaddr;
105 /* trigger per event */
106 set_thread_flag(TIF_PER_TRAP);
111 int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val,
114 struct die_args *args = data;
115 struct pt_regs *regs = args->regs;
117 if (!user_mode(regs))
119 if (regs->int_code & 0x200) /* Trap during transaction */
123 if (uprobe_pre_sstep_notifier(regs))
127 if (uprobe_post_sstep_notifier(regs))
136 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
138 clear_thread_flag(TIF_UPROBE_SINGLESTEP);
139 regs->int_code = auprobe->saved_int_code;
140 regs->psw.addr = current->utask->vaddr;
141 current->thread.per_event.address = current->utask->vaddr;
144 unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline,
145 struct pt_regs *regs)
149 orig = regs->gprs[14];
150 regs->gprs[14] = trampoline;
154 bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx,
155 struct pt_regs *regs)
157 if (ctx == RP_CHECK_CHAIN_CALL)
158 return user_stack_pointer(regs) <= ret->stack;
160 return user_stack_pointer(regs) < ret->stack;
163 /* Instruction Emulation */
165 static void adjust_psw_addr(psw_t *psw, unsigned long len)
167 psw->addr = __rewind_psw(*psw, -len);
170 #define EMU_ILLEGAL_OP 1
171 #define EMU_SPECIFICATION 2
172 #define EMU_ADDRESSING 3
174 #define emu_load_ril(ptr, output) \
176 unsigned int mask = sizeof(*(ptr)) - 1; \
177 __typeof__(*(ptr)) input; \
180 if (!test_facility(34)) \
181 __rc = EMU_ILLEGAL_OP; \
182 else if ((u64 __force)ptr & mask) \
183 __rc = EMU_SPECIFICATION; \
184 else if (get_user(input, ptr)) \
185 __rc = EMU_ADDRESSING; \
191 #define emu_store_ril(regs, ptr, input) \
193 unsigned int mask = sizeof(*(ptr)) - 1; \
194 __typeof__(ptr) __ptr = (ptr); \
197 if (!test_facility(34)) \
198 __rc = EMU_ILLEGAL_OP; \
199 else if ((u64 __force)__ptr & mask) \
200 __rc = EMU_SPECIFICATION; \
201 else if (put_user(*(input), __ptr)) \
202 __rc = EMU_ADDRESSING; \
204 sim_stor_event(regs, \
205 (void __force *)__ptr, \
210 #define emu_cmp_ril(regs, ptr, cmp) \
212 unsigned int mask = sizeof(*(ptr)) - 1; \
213 __typeof__(*(ptr)) input; \
216 if (!test_facility(34)) \
217 __rc = EMU_ILLEGAL_OP; \
218 else if ((u64 __force)ptr & mask) \
219 __rc = EMU_SPECIFICATION; \
220 else if (get_user(input, ptr)) \
221 __rc = EMU_ADDRESSING; \
222 else if (input > *(cmp)) \
223 psw_bits((regs)->psw).cc = 1; \
224 else if (input < *(cmp)) \
225 psw_bits((regs)->psw).cc = 2; \
227 psw_bits((regs)->psw).cc = 0; \
238 union split_register {
248 * If user per registers are setup to trace storage alterations and an
249 * emulated store took place on a fitting address a user trap is generated.
251 static void sim_stor_event(struct pt_regs *regs, void *addr, int len)
253 if (!(regs->psw.mask & PSW_MASK_PER))
255 if (!(current->thread.per_user.control & PER_EVENT_STORE))
257 if ((void *)current->thread.per_user.start > (addr + len))
259 if ((void *)current->thread.per_user.end < addr)
261 current->thread.per_event.address = regs->psw.addr;
262 current->thread.per_event.cause = PER_EVENT_STORE >> 16;
263 set_thread_flag(TIF_PER_TRAP);
267 * pc relative instructions are emulated, since parameters may not be
268 * accessible from the xol area due to range limitations.
270 static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs)
272 union split_register *rx;
273 struct insn_ril *insn;
278 insn = (struct insn_ril *) &auprobe->insn;
279 rx = (union split_register *) ®s->gprs[insn->reg];
280 uptr = (void *)(regs->psw.addr + (insn->disp * 2));
281 ilen = insn_length(insn->opc0);
283 switch (insn->opc0) {
285 switch (insn->opc1) {
286 case 0x00: /* larl */
287 rx->u64 = (unsigned long)uptr;
292 switch (insn->opc1) {
293 case 0x02: /* llhrl */
294 rc = emu_load_ril((u16 __user *)uptr, &rx->u32[1]);
296 case 0x04: /* lghrl */
297 rc = emu_load_ril((s16 __user *)uptr, &rx->u64);
299 case 0x05: /* lhrl */
300 rc = emu_load_ril((s16 __user *)uptr, &rx->u32[1]);
302 case 0x06: /* llghrl */
303 rc = emu_load_ril((u16 __user *)uptr, &rx->u64);
305 case 0x08: /* lgrl */
306 rc = emu_load_ril((u64 __user *)uptr, &rx->u64);
308 case 0x0c: /* lgfrl */
309 rc = emu_load_ril((s32 __user *)uptr, &rx->u64);
312 rc = emu_load_ril((u32 __user *)uptr, &rx->u32[1]);
314 case 0x0e: /* llgfrl */
315 rc = emu_load_ril((u32 __user *)uptr, &rx->u64);
317 case 0x07: /* sthrl */
318 rc = emu_store_ril(regs, (u16 __user *)uptr, &rx->u16[3]);
320 case 0x0b: /* stgrl */
321 rc = emu_store_ril(regs, (u64 __user *)uptr, &rx->u64);
323 case 0x0f: /* strl */
324 rc = emu_store_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
329 switch (insn->opc1) {
330 case 0x02: /* pfdrl */
331 if (!test_facility(34))
334 case 0x04: /* cghrl */
335 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s64);
337 case 0x05: /* chrl */
338 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s32[1]);
340 case 0x06: /* clghrl */
341 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u64);
343 case 0x07: /* clhrl */
344 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u32[1]);
346 case 0x08: /* cgrl */
347 rc = emu_cmp_ril(regs, (s64 __user *)uptr, &rx->s64);
349 case 0x0a: /* clgrl */
350 rc = emu_cmp_ril(regs, (u64 __user *)uptr, &rx->u64);
352 case 0x0c: /* cgfrl */
353 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s64);
356 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s32[1]);
358 case 0x0e: /* clgfrl */
359 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u64);
361 case 0x0f: /* clrl */
362 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
367 adjust_psw_addr(®s->psw, ilen);
370 regs->int_code = ilen << 16 | 0x0001;
371 do_report_trap(regs, SIGILL, ILL_ILLOPC, NULL);
373 case EMU_SPECIFICATION:
374 regs->int_code = ilen << 16 | 0x0006;
375 do_report_trap(regs, SIGILL, ILL_ILLOPC , NULL);
378 regs->int_code = ilen << 16 | 0x0005;
379 do_report_trap(regs, SIGSEGV, SEGV_MAPERR, NULL);
384 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
386 if ((psw_bits(regs->psw).eaba == PSW_BITS_AMODE_24BIT) ||
387 ((psw_bits(regs->psw).eaba == PSW_BITS_AMODE_31BIT) &&
388 !is_compat_task())) {
389 regs->psw.addr = __rewind_psw(regs->psw, UPROBE_SWBP_INSN_SIZE);
390 do_report_trap(regs, SIGILL, ILL_ILLADR, NULL);
393 if (probe_is_insn_relative_long(auprobe->insn)) {
394 handle_insn_ril(auprobe, regs);