2794cad9312e37cda034425386edf7356f2e6d97
[linux-2.6-microblaze.git] / arch / s390 / kernel / smp.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  SMP related functions
4  *
5  *    Copyright IBM Corp. 1999, 2012
6  *    Author(s): Denis Joseph Barrow,
7  *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
8  *               Heiko Carstens <heiko.carstens@de.ibm.com>,
9  *
10  *  based on other smp stuff by
11  *    (c) 1995 Alan Cox, CymruNET Ltd  <alan@cymru.net>
12  *    (c) 1998 Ingo Molnar
13  *
14  * The code outside of smp.c uses logical cpu numbers, only smp.c does
15  * the translation of logical to physical cpu ids. All new code that
16  * operates on physical cpu numbers needs to go into smp.c.
17  */
18
19 #define KMSG_COMPONENT "cpu"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22 #include <linux/workqueue.h>
23 #include <linux/memblock.h>
24 #include <linux/export.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/err.h>
28 #include <linux/spinlock.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/irqflags.h>
33 #include <linux/cpu.h>
34 #include <linux/slab.h>
35 #include <linux/sched/hotplug.h>
36 #include <linux/sched/task_stack.h>
37 #include <linux/crash_dump.h>
38 #include <linux/kprobes.h>
39 #include <asm/asm-offsets.h>
40 #include <asm/diag.h>
41 #include <asm/switch_to.h>
42 #include <asm/facility.h>
43 #include <asm/ipl.h>
44 #include <asm/setup.h>
45 #include <asm/irq.h>
46 #include <asm/tlbflush.h>
47 #include <asm/vtimer.h>
48 #include <asm/lowcore.h>
49 #include <asm/sclp.h>
50 #include <asm/vdso.h>
51 #include <asm/debug.h>
52 #include <asm/os_info.h>
53 #include <asm/sigp.h>
54 #include <asm/idle.h>
55 #include <asm/nmi.h>
56 #include <asm/stacktrace.h>
57 #include <asm/topology.h>
58 #include "entry.h"
59
60 enum {
61         ec_schedule = 0,
62         ec_call_function_single,
63         ec_stop_cpu,
64 };
65
66 enum {
67         CPU_STATE_STANDBY,
68         CPU_STATE_CONFIGURED,
69 };
70
71 static DEFINE_PER_CPU(struct cpu *, cpu_device);
72
73 struct pcpu {
74         struct lowcore *lowcore;        /* lowcore page(s) for the cpu */
75         unsigned long ec_mask;          /* bit mask for ec_xxx functions */
76         unsigned long ec_clk;           /* sigp timestamp for ec_xxx */
77         signed char state;              /* physical cpu state */
78         signed char polarization;       /* physical polarization */
79         u16 address;                    /* physical cpu address */
80 };
81
82 static u8 boot_core_type;
83 static struct pcpu pcpu_devices[NR_CPUS];
84
85 unsigned int smp_cpu_mt_shift;
86 EXPORT_SYMBOL(smp_cpu_mt_shift);
87
88 unsigned int smp_cpu_mtid;
89 EXPORT_SYMBOL(smp_cpu_mtid);
90
91 #ifdef CONFIG_CRASH_DUMP
92 __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
93 #endif
94
95 static unsigned int smp_max_threads __initdata = -1U;
96
97 static int __init early_nosmt(char *s)
98 {
99         smp_max_threads = 1;
100         return 0;
101 }
102 early_param("nosmt", early_nosmt);
103
104 static int __init early_smt(char *s)
105 {
106         get_option(&s, &smp_max_threads);
107         return 0;
108 }
109 early_param("smt", early_smt);
110
111 /*
112  * The smp_cpu_state_mutex must be held when changing the state or polarization
113  * member of a pcpu data structure within the pcpu_devices arreay.
114  */
115 DEFINE_MUTEX(smp_cpu_state_mutex);
116
117 /*
118  * Signal processor helper functions.
119  */
120 static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
121 {
122         int cc;
123
124         while (1) {
125                 cc = __pcpu_sigp(addr, order, parm, NULL);
126                 if (cc != SIGP_CC_BUSY)
127                         return cc;
128                 cpu_relax();
129         }
130 }
131
132 static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
133 {
134         int cc, retry;
135
136         for (retry = 0; ; retry++) {
137                 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
138                 if (cc != SIGP_CC_BUSY)
139                         break;
140                 if (retry >= 3)
141                         udelay(10);
142         }
143         return cc;
144 }
145
146 static inline int pcpu_stopped(struct pcpu *pcpu)
147 {
148         u32 uninitialized_var(status);
149
150         if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
151                         0, &status) != SIGP_CC_STATUS_STORED)
152                 return 0;
153         return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
154 }
155
156 static inline int pcpu_running(struct pcpu *pcpu)
157 {
158         if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
159                         0, NULL) != SIGP_CC_STATUS_STORED)
160                 return 1;
161         /* Status stored condition code is equivalent to cpu not running. */
162         return 0;
163 }
164
165 /*
166  * Find struct pcpu by cpu address.
167  */
168 static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
169 {
170         int cpu;
171
172         for_each_cpu(cpu, mask)
173                 if (pcpu_devices[cpu].address == address)
174                         return pcpu_devices + cpu;
175         return NULL;
176 }
177
178 static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
179 {
180         int order;
181
182         if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
183                 return;
184         order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
185         pcpu->ec_clk = get_tod_clock_fast();
186         pcpu_sigp_retry(pcpu, order, 0);
187 }
188
189 static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
190 {
191         unsigned long async_stack, nodat_stack;
192         struct lowcore *lc;
193
194         if (pcpu != &pcpu_devices[0]) {
195                 pcpu->lowcore = (struct lowcore *)
196                         __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
197                 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
198                 if (!pcpu->lowcore || !nodat_stack)
199                         goto out;
200         } else {
201                 nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
202         }
203         async_stack = stack_alloc();
204         if (!async_stack)
205                 goto out;
206         lc = pcpu->lowcore;
207         memcpy(lc, &S390_lowcore, 512);
208         memset((char *) lc + 512, 0, sizeof(*lc) - 512);
209         lc->async_stack = async_stack + STACK_INIT_OFFSET;
210         lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
211         lc->cpu_nr = cpu;
212         lc->spinlock_lockval = arch_spin_lockval(cpu);
213         lc->spinlock_index = 0;
214         lc->br_r1_trampoline = 0x07f1;  /* br %r1 */
215         if (nmi_alloc_per_cpu(lc))
216                 goto out_async;
217         if (vdso_alloc_per_cpu(lc))
218                 goto out_mcesa;
219         lowcore_ptr[cpu] = lc;
220         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
221         return 0;
222
223 out_mcesa:
224         nmi_free_per_cpu(lc);
225 out_async:
226         stack_free(async_stack);
227 out:
228         if (pcpu != &pcpu_devices[0]) {
229                 free_pages(nodat_stack, THREAD_SIZE_ORDER);
230                 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
231         }
232         return -ENOMEM;
233 }
234
235 static void pcpu_free_lowcore(struct pcpu *pcpu)
236 {
237         unsigned long async_stack, nodat_stack, lowcore;
238
239         nodat_stack = pcpu->lowcore->nodat_stack - STACK_INIT_OFFSET;
240         async_stack = pcpu->lowcore->async_stack - STACK_INIT_OFFSET;
241         lowcore = (unsigned long) pcpu->lowcore;
242
243         pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
244         lowcore_ptr[pcpu - pcpu_devices] = NULL;
245         vdso_free_per_cpu(pcpu->lowcore);
246         nmi_free_per_cpu(pcpu->lowcore);
247         stack_free(async_stack);
248         if (pcpu == &pcpu_devices[0])
249                 return;
250         free_pages(nodat_stack, THREAD_SIZE_ORDER);
251         free_pages(lowcore, LC_ORDER);
252 }
253
254 static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
255 {
256         struct lowcore *lc = pcpu->lowcore;
257
258         cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
259         cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
260         lc->cpu_nr = cpu;
261         lc->spinlock_lockval = arch_spin_lockval(cpu);
262         lc->spinlock_index = 0;
263         lc->percpu_offset = __per_cpu_offset[cpu];
264         lc->kernel_asce = S390_lowcore.kernel_asce;
265         lc->user_asce = S390_lowcore.kernel_asce;
266         lc->machine_flags = S390_lowcore.machine_flags;
267         lc->user_timer = lc->system_timer =
268                 lc->steal_timer = lc->avg_steal_timer = 0;
269         __ctl_store(lc->cregs_save_area, 0, 15);
270         lc->cregs_save_area[1] = lc->kernel_asce;
271         lc->cregs_save_area[7] = lc->vdso_asce;
272         save_access_regs((unsigned int *) lc->access_regs_save_area);
273         memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
274                sizeof(lc->stfle_fac_list));
275         memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
276                sizeof(lc->alt_stfle_fac_list));
277         arch_spin_lock_setup(cpu);
278 }
279
280 static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
281 {
282         struct lowcore *lc = pcpu->lowcore;
283
284         lc->kernel_stack = (unsigned long) task_stack_page(tsk)
285                 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
286         lc->current_task = (unsigned long) tsk;
287         lc->lpp = LPP_MAGIC;
288         lc->current_pid = tsk->pid;
289         lc->user_timer = tsk->thread.user_timer;
290         lc->guest_timer = tsk->thread.guest_timer;
291         lc->system_timer = tsk->thread.system_timer;
292         lc->hardirq_timer = tsk->thread.hardirq_timer;
293         lc->softirq_timer = tsk->thread.softirq_timer;
294         lc->steal_timer = 0;
295 }
296
297 static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
298 {
299         struct lowcore *lc = pcpu->lowcore;
300
301         lc->restart_stack = lc->nodat_stack;
302         lc->restart_fn = (unsigned long) func;
303         lc->restart_data = (unsigned long) data;
304         lc->restart_source = -1UL;
305         pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
306 }
307
308 /*
309  * Call function via PSW restart on pcpu and stop the current cpu.
310  */
311 static void __pcpu_delegate(void (*func)(void*), void *data)
312 {
313         func(data);     /* should not return */
314 }
315
316 static void __no_sanitize_address pcpu_delegate(struct pcpu *pcpu,
317                                                 void (*func)(void *),
318                                                 void *data, unsigned long stack)
319 {
320         struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
321         unsigned long source_cpu = stap();
322
323         __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
324         if (pcpu->address == source_cpu)
325                 CALL_ON_STACK(__pcpu_delegate, stack, 2, func, data);
326         /* Stop target cpu (if func returns this stops the current cpu). */
327         pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
328         /* Restart func on the target cpu and stop the current cpu. */
329         mem_assign_absolute(lc->restart_stack, stack);
330         mem_assign_absolute(lc->restart_fn, (unsigned long) func);
331         mem_assign_absolute(lc->restart_data, (unsigned long) data);
332         mem_assign_absolute(lc->restart_source, source_cpu);
333         __bpon();
334         asm volatile(
335                 "0:     sigp    0,%0,%2 # sigp restart to target cpu\n"
336                 "       brc     2,0b    # busy, try again\n"
337                 "1:     sigp    0,%1,%3 # sigp stop to current cpu\n"
338                 "       brc     2,1b    # busy, try again\n"
339                 : : "d" (pcpu->address), "d" (source_cpu),
340                     "K" (SIGP_RESTART), "K" (SIGP_STOP)
341                 : "0", "1", "cc");
342         for (;;) ;
343 }
344
345 /*
346  * Enable additional logical cpus for multi-threading.
347  */
348 static int pcpu_set_smt(unsigned int mtid)
349 {
350         int cc;
351
352         if (smp_cpu_mtid == mtid)
353                 return 0;
354         cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
355         if (cc == 0) {
356                 smp_cpu_mtid = mtid;
357                 smp_cpu_mt_shift = 0;
358                 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
359                         smp_cpu_mt_shift++;
360                 pcpu_devices[0].address = stap();
361         }
362         return cc;
363 }
364
365 /*
366  * Call function on an online CPU.
367  */
368 void smp_call_online_cpu(void (*func)(void *), void *data)
369 {
370         struct pcpu *pcpu;
371
372         /* Use the current cpu if it is online. */
373         pcpu = pcpu_find_address(cpu_online_mask, stap());
374         if (!pcpu)
375                 /* Use the first online cpu. */
376                 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
377         pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
378 }
379
380 /*
381  * Call function on the ipl CPU.
382  */
383 void smp_call_ipl_cpu(void (*func)(void *), void *data)
384 {
385         struct lowcore *lc = pcpu_devices->lowcore;
386
387         if (pcpu_devices[0].address == stap())
388                 lc = &S390_lowcore;
389
390         pcpu_delegate(&pcpu_devices[0], func, data,
391                       lc->nodat_stack);
392 }
393
394 int smp_find_processor_id(u16 address)
395 {
396         int cpu;
397
398         for_each_present_cpu(cpu)
399                 if (pcpu_devices[cpu].address == address)
400                         return cpu;
401         return -1;
402 }
403
404 bool arch_vcpu_is_preempted(int cpu)
405 {
406         if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
407                 return false;
408         if (pcpu_running(pcpu_devices + cpu))
409                 return false;
410         return true;
411 }
412 EXPORT_SYMBOL(arch_vcpu_is_preempted);
413
414 void smp_yield_cpu(int cpu)
415 {
416         if (MACHINE_HAS_DIAG9C) {
417                 diag_stat_inc_norecursion(DIAG_STAT_X09C);
418                 asm volatile("diag %0,0,0x9c"
419                              : : "d" (pcpu_devices[cpu].address));
420         } else if (MACHINE_HAS_DIAG44 && !smp_cpu_mtid) {
421                 diag_stat_inc_norecursion(DIAG_STAT_X044);
422                 asm volatile("diag 0,0,0x44");
423         }
424 }
425
426 /*
427  * Send cpus emergency shutdown signal. This gives the cpus the
428  * opportunity to complete outstanding interrupts.
429  */
430 void notrace smp_emergency_stop(void)
431 {
432         cpumask_t cpumask;
433         u64 end;
434         int cpu;
435
436         cpumask_copy(&cpumask, cpu_online_mask);
437         cpumask_clear_cpu(smp_processor_id(), &cpumask);
438
439         end = get_tod_clock() + (1000000UL << 12);
440         for_each_cpu(cpu, &cpumask) {
441                 struct pcpu *pcpu = pcpu_devices + cpu;
442                 set_bit(ec_stop_cpu, &pcpu->ec_mask);
443                 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
444                                    0, NULL) == SIGP_CC_BUSY &&
445                        get_tod_clock() < end)
446                         cpu_relax();
447         }
448         while (get_tod_clock() < end) {
449                 for_each_cpu(cpu, &cpumask)
450                         if (pcpu_stopped(pcpu_devices + cpu))
451                                 cpumask_clear_cpu(cpu, &cpumask);
452                 if (cpumask_empty(&cpumask))
453                         break;
454                 cpu_relax();
455         }
456 }
457 NOKPROBE_SYMBOL(smp_emergency_stop);
458
459 /*
460  * Stop all cpus but the current one.
461  */
462 void smp_send_stop(void)
463 {
464         int cpu;
465
466         /* Disable all interrupts/machine checks */
467         __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
468         trace_hardirqs_off();
469
470         debug_set_critical();
471
472         if (oops_in_progress)
473                 smp_emergency_stop();
474
475         /* stop all processors */
476         for_each_online_cpu(cpu) {
477                 if (cpu == smp_processor_id())
478                         continue;
479                 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
480                 while (!pcpu_stopped(pcpu_devices + cpu))
481                         cpu_relax();
482         }
483 }
484
485 /*
486  * This is the main routine where commands issued by other
487  * cpus are handled.
488  */
489 static void smp_handle_ext_call(void)
490 {
491         unsigned long bits;
492
493         /* handle bit signal external calls */
494         bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
495         if (test_bit(ec_stop_cpu, &bits))
496                 smp_stop_cpu();
497         if (test_bit(ec_schedule, &bits))
498                 scheduler_ipi();
499         if (test_bit(ec_call_function_single, &bits))
500                 generic_smp_call_function_single_interrupt();
501 }
502
503 static void do_ext_call_interrupt(struct ext_code ext_code,
504                                   unsigned int param32, unsigned long param64)
505 {
506         inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
507         smp_handle_ext_call();
508 }
509
510 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
511 {
512         int cpu;
513
514         for_each_cpu(cpu, mask)
515                 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
516 }
517
518 void arch_send_call_function_single_ipi(int cpu)
519 {
520         pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
521 }
522
523 /*
524  * this function sends a 'reschedule' IPI to another CPU.
525  * it goes straight through and wastes no time serializing
526  * anything. Worst case is that we lose a reschedule ...
527  */
528 void smp_send_reschedule(int cpu)
529 {
530         pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
531 }
532
533 /*
534  * parameter area for the set/clear control bit callbacks
535  */
536 struct ec_creg_mask_parms {
537         unsigned long orval;
538         unsigned long andval;
539         int cr;
540 };
541
542 /*
543  * callback for setting/clearing control bits
544  */
545 static void smp_ctl_bit_callback(void *info)
546 {
547         struct ec_creg_mask_parms *pp = info;
548         unsigned long cregs[16];
549
550         __ctl_store(cregs, 0, 15);
551         cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
552         __ctl_load(cregs, 0, 15);
553 }
554
555 /*
556  * Set a bit in a control register of all cpus
557  */
558 void smp_ctl_set_bit(int cr, int bit)
559 {
560         struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
561
562         on_each_cpu(smp_ctl_bit_callback, &parms, 1);
563 }
564 EXPORT_SYMBOL(smp_ctl_set_bit);
565
566 /*
567  * Clear a bit in a control register of all cpus
568  */
569 void smp_ctl_clear_bit(int cr, int bit)
570 {
571         struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
572
573         on_each_cpu(smp_ctl_bit_callback, &parms, 1);
574 }
575 EXPORT_SYMBOL(smp_ctl_clear_bit);
576
577 #ifdef CONFIG_CRASH_DUMP
578
579 int smp_store_status(int cpu)
580 {
581         struct pcpu *pcpu = pcpu_devices + cpu;
582         unsigned long pa;
583
584         pa = __pa(&pcpu->lowcore->floating_pt_save_area);
585         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
586                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
587                 return -EIO;
588         if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
589                 return 0;
590         pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
591         if (MACHINE_HAS_GS)
592                 pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
593         if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
594                               pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
595                 return -EIO;
596         return 0;
597 }
598
599 /*
600  * Collect CPU state of the previous, crashed system.
601  * There are four cases:
602  * 1) standard zfcp dump
603  *    condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
604  *    The state for all CPUs except the boot CPU needs to be collected
605  *    with sigp stop-and-store-status. The boot CPU state is located in
606  *    the absolute lowcore of the memory stored in the HSA. The zcore code
607  *    will copy the boot CPU state from the HSA.
608  * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
609  *    condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
610  *    The state for all CPUs except the boot CPU needs to be collected
611  *    with sigp stop-and-store-status. The firmware or the boot-loader
612  *    stored the registers of the boot CPU in the absolute lowcore in the
613  *    memory of the old system.
614  * 3) kdump and the old kernel did not store the CPU state,
615  *    or stand-alone kdump for DASD
616  *    condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
617  *    The state for all CPUs except the boot CPU needs to be collected
618  *    with sigp stop-and-store-status. The kexec code or the boot-loader
619  *    stored the registers of the boot CPU in the memory of the old system.
620  * 4) kdump and the old kernel stored the CPU state
621  *    condition: OLDMEM_BASE != NULL && is_kdump_kernel()
622  *    This case does not exist for s390 anymore, setup_arch explicitly
623  *    deactivates the elfcorehdr= kernel parameter
624  */
625 static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
626                                      bool is_boot_cpu, unsigned long page)
627 {
628         __vector128 *vxrs = (__vector128 *) page;
629
630         if (is_boot_cpu)
631                 vxrs = boot_cpu_vector_save_area;
632         else
633                 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
634         save_area_add_vxrs(sa, vxrs);
635 }
636
637 static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
638                                      bool is_boot_cpu, unsigned long page)
639 {
640         void *regs = (void *) page;
641
642         if (is_boot_cpu)
643                 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
644         else
645                 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
646         save_area_add_regs(sa, regs);
647 }
648
649 void __init smp_save_dump_cpus(void)
650 {
651         int addr, boot_cpu_addr, max_cpu_addr;
652         struct save_area *sa;
653         unsigned long page;
654         bool is_boot_cpu;
655
656         if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
657                 /* No previous system present, normal boot. */
658                 return;
659         /* Allocate a page as dumping area for the store status sigps */
660         page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
661         if (!page)
662                 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
663                       PAGE_SIZE, 1UL << 31);
664
665         /* Set multi-threading state to the previous system. */
666         pcpu_set_smt(sclp.mtid_prev);
667         boot_cpu_addr = stap();
668         max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
669         for (addr = 0; addr <= max_cpu_addr; addr++) {
670                 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
671                     SIGP_CC_NOT_OPERATIONAL)
672                         continue;
673                 is_boot_cpu = (addr == boot_cpu_addr);
674                 /* Allocate save area */
675                 sa = save_area_alloc(is_boot_cpu);
676                 if (!sa)
677                         panic("could not allocate memory for save area\n");
678                 if (MACHINE_HAS_VX)
679                         /* Get the vector registers */
680                         smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
681                 /*
682                  * For a zfcp dump OLDMEM_BASE == NULL and the registers
683                  * of the boot CPU are stored in the HSA. To retrieve
684                  * these registers an SCLP request is required which is
685                  * done by drivers/s390/char/zcore.c:init_cpu_info()
686                  */
687                 if (!is_boot_cpu || OLDMEM_BASE)
688                         /* Get the CPU registers */
689                         smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
690         }
691         memblock_free(page, PAGE_SIZE);
692         diag_dma_ops.diag308_reset();
693         pcpu_set_smt(0);
694 }
695 #endif /* CONFIG_CRASH_DUMP */
696
697 void smp_cpu_set_polarization(int cpu, int val)
698 {
699         pcpu_devices[cpu].polarization = val;
700 }
701
702 int smp_cpu_get_polarization(int cpu)
703 {
704         return pcpu_devices[cpu].polarization;
705 }
706
707 static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
708 {
709         static int use_sigp_detection;
710         int address;
711
712         if (use_sigp_detection || sclp_get_core_info(info, early)) {
713                 use_sigp_detection = 1;
714                 for (address = 0;
715                      address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
716                      address += (1U << smp_cpu_mt_shift)) {
717                         if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
718                             SIGP_CC_NOT_OPERATIONAL)
719                                 continue;
720                         info->core[info->configured].core_id =
721                                 address >> smp_cpu_mt_shift;
722                         info->configured++;
723                 }
724                 info->combined = info->configured;
725         }
726 }
727
728 static int smp_add_present_cpu(int cpu);
729
730 static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
731                         bool configured, bool early)
732 {
733         struct pcpu *pcpu;
734         int cpu, nr, i;
735         u16 address;
736
737         nr = 0;
738         if (sclp.has_core_type && core->type != boot_core_type)
739                 return nr;
740         cpu = cpumask_first(avail);
741         address = core->core_id << smp_cpu_mt_shift;
742         for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
743                 if (pcpu_find_address(cpu_present_mask, address + i))
744                         continue;
745                 pcpu = pcpu_devices + cpu;
746                 pcpu->address = address + i;
747                 if (configured)
748                         pcpu->state = CPU_STATE_CONFIGURED;
749                 else
750                         pcpu->state = CPU_STATE_STANDBY;
751                 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
752                 set_cpu_present(cpu, true);
753                 if (!early && smp_add_present_cpu(cpu) != 0)
754                         set_cpu_present(cpu, false);
755                 else
756                         nr++;
757                 cpumask_clear_cpu(cpu, avail);
758                 cpu = cpumask_next(cpu, avail);
759         }
760         return nr;
761 }
762
763 static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
764 {
765         struct sclp_core_entry *core;
766         cpumask_t avail;
767         bool configured;
768         u16 core_id;
769         int nr, i;
770
771         nr = 0;
772         cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
773         /*
774          * Add IPL core first (which got logical CPU number 0) to make sure
775          * that all SMT threads get subsequent logical CPU numbers.
776          */
777         if (early) {
778                 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
779                 for (i = 0; i < info->configured; i++) {
780                         core = &info->core[i];
781                         if (core->core_id == core_id) {
782                                 nr += smp_add_core(core, &avail, true, early);
783                                 break;
784                         }
785                 }
786         }
787         for (i = 0; i < info->combined; i++) {
788                 configured = i < info->configured;
789                 nr += smp_add_core(&info->core[i], &avail, configured, early);
790         }
791         return nr;
792 }
793
794 void __init smp_detect_cpus(void)
795 {
796         unsigned int cpu, mtid, c_cpus, s_cpus;
797         struct sclp_core_info *info;
798         u16 address;
799
800         /* Get CPU information */
801         info = memblock_alloc(sizeof(*info), 8);
802         if (!info)
803                 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
804                       __func__, sizeof(*info), 8);
805         smp_get_core_info(info, 1);
806         /* Find boot CPU type */
807         if (sclp.has_core_type) {
808                 address = stap();
809                 for (cpu = 0; cpu < info->combined; cpu++)
810                         if (info->core[cpu].core_id == address) {
811                                 /* The boot cpu dictates the cpu type. */
812                                 boot_core_type = info->core[cpu].type;
813                                 break;
814                         }
815                 if (cpu >= info->combined)
816                         panic("Could not find boot CPU type");
817         }
818
819         /* Set multi-threading state for the current system */
820         mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
821         mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
822         pcpu_set_smt(mtid);
823
824         /* Print number of CPUs */
825         c_cpus = s_cpus = 0;
826         for (cpu = 0; cpu < info->combined; cpu++) {
827                 if (sclp.has_core_type &&
828                     info->core[cpu].type != boot_core_type)
829                         continue;
830                 if (cpu < info->configured)
831                         c_cpus += smp_cpu_mtid + 1;
832                 else
833                         s_cpus += smp_cpu_mtid + 1;
834         }
835         pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
836
837         /* Add CPUs present at boot */
838         get_online_cpus();
839         __smp_rescan_cpus(info, true);
840         put_online_cpus();
841         memblock_free_early((unsigned long)info, sizeof(*info));
842 }
843
844 static void smp_init_secondary(void)
845 {
846         int cpu = smp_processor_id();
847
848         S390_lowcore.last_update_clock = get_tod_clock();
849         restore_access_regs(S390_lowcore.access_regs_save_area);
850         set_cpu_flag(CIF_ASCE_PRIMARY);
851         set_cpu_flag(CIF_ASCE_SECONDARY);
852         cpu_init();
853         preempt_disable();
854         init_cpu_timer();
855         vtime_init();
856         pfault_init();
857         notify_cpu_starting(smp_processor_id());
858         if (topology_cpu_dedicated(cpu))
859                 set_cpu_flag(CIF_DEDICATED_CPU);
860         else
861                 clear_cpu_flag(CIF_DEDICATED_CPU);
862         set_cpu_online(smp_processor_id(), true);
863         inc_irq_stat(CPU_RST);
864         local_irq_enable();
865         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
866 }
867
868 /*
869  *      Activate a secondary processor.
870  */
871 static void __no_sanitize_address smp_start_secondary(void *cpuvoid)
872 {
873         S390_lowcore.restart_stack = (unsigned long) restart_stack;
874         S390_lowcore.restart_fn = (unsigned long) do_restart;
875         S390_lowcore.restart_data = 0;
876         S390_lowcore.restart_source = -1UL;
877         __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
878         __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
879         CALL_ON_STACK_NORETURN(smp_init_secondary, S390_lowcore.kernel_stack);
880 }
881
882 /* Upping and downing of CPUs */
883 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
884 {
885         struct pcpu *pcpu;
886         int base, i, rc;
887
888         pcpu = pcpu_devices + cpu;
889         if (pcpu->state != CPU_STATE_CONFIGURED)
890                 return -EIO;
891         base = smp_get_base_cpu(cpu);
892         for (i = 0; i <= smp_cpu_mtid; i++) {
893                 if (base + i < nr_cpu_ids)
894                         if (cpu_online(base + i))
895                                 break;
896         }
897         /*
898          * If this is the first CPU of the core to get online
899          * do an initial CPU reset.
900          */
901         if (i > smp_cpu_mtid &&
902             pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
903             SIGP_CC_ORDER_CODE_ACCEPTED)
904                 return -EIO;
905
906         rc = pcpu_alloc_lowcore(pcpu, cpu);
907         if (rc)
908                 return rc;
909         pcpu_prepare_secondary(pcpu, cpu);
910         pcpu_attach_task(pcpu, tidle);
911         pcpu_start_fn(pcpu, smp_start_secondary, NULL);
912         /* Wait until cpu puts itself in the online & active maps */
913         while (!cpu_online(cpu))
914                 cpu_relax();
915         return 0;
916 }
917
918 static unsigned int setup_possible_cpus __initdata;
919
920 static int __init _setup_possible_cpus(char *s)
921 {
922         get_option(&s, &setup_possible_cpus);
923         return 0;
924 }
925 early_param("possible_cpus", _setup_possible_cpus);
926
927 int __cpu_disable(void)
928 {
929         unsigned long cregs[16];
930
931         /* Handle possible pending IPIs */
932         smp_handle_ext_call();
933         set_cpu_online(smp_processor_id(), false);
934         /* Disable pseudo page faults on this cpu. */
935         pfault_fini();
936         /* Disable interrupt sources via control register. */
937         __ctl_store(cregs, 0, 15);
938         cregs[0]  &= ~0x0000ee70UL;     /* disable all external interrupts */
939         cregs[6]  &= ~0xff000000UL;     /* disable all I/O interrupts */
940         cregs[14] &= ~0x1f000000UL;     /* disable most machine checks */
941         __ctl_load(cregs, 0, 15);
942         clear_cpu_flag(CIF_NOHZ_DELAY);
943         return 0;
944 }
945
946 void __cpu_die(unsigned int cpu)
947 {
948         struct pcpu *pcpu;
949
950         /* Wait until target cpu is down */
951         pcpu = pcpu_devices + cpu;
952         while (!pcpu_stopped(pcpu))
953                 cpu_relax();
954         pcpu_free_lowcore(pcpu);
955         cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
956         cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
957 }
958
959 void __noreturn cpu_die(void)
960 {
961         idle_task_exit();
962         __bpon();
963         pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
964         for (;;) ;
965 }
966
967 void __init smp_fill_possible_mask(void)
968 {
969         unsigned int possible, sclp_max, cpu;
970
971         sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
972         sclp_max = min(smp_max_threads, sclp_max);
973         sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
974         possible = setup_possible_cpus ?: nr_cpu_ids;
975         possible = min(possible, sclp_max);
976         for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
977                 set_cpu_possible(cpu, true);
978 }
979
980 void __init smp_prepare_cpus(unsigned int max_cpus)
981 {
982         /* request the 0x1201 emergency signal external interrupt */
983         if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
984                 panic("Couldn't request external interrupt 0x1201");
985         /* request the 0x1202 external call external interrupt */
986         if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
987                 panic("Couldn't request external interrupt 0x1202");
988 }
989
990 void __init smp_prepare_boot_cpu(void)
991 {
992         struct pcpu *pcpu = pcpu_devices;
993
994         WARN_ON(!cpu_present(0) || !cpu_online(0));
995         pcpu->state = CPU_STATE_CONFIGURED;
996         pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
997         S390_lowcore.percpu_offset = __per_cpu_offset[0];
998         smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
999 }
1000
1001 void __init smp_cpus_done(unsigned int max_cpus)
1002 {
1003 }
1004
1005 void __init smp_setup_processor_id(void)
1006 {
1007         pcpu_devices[0].address = stap();
1008         S390_lowcore.cpu_nr = 0;
1009         S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1010         S390_lowcore.spinlock_index = 0;
1011 }
1012
1013 /*
1014  * the frequency of the profiling timer can be changed
1015  * by writing a multiplier value into /proc/profile.
1016  *
1017  * usually you want to run this on all CPUs ;)
1018  */
1019 int setup_profiling_timer(unsigned int multiplier)
1020 {
1021         return 0;
1022 }
1023
1024 static ssize_t cpu_configure_show(struct device *dev,
1025                                   struct device_attribute *attr, char *buf)
1026 {
1027         ssize_t count;
1028
1029         mutex_lock(&smp_cpu_state_mutex);
1030         count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1031         mutex_unlock(&smp_cpu_state_mutex);
1032         return count;
1033 }
1034
1035 static ssize_t cpu_configure_store(struct device *dev,
1036                                    struct device_attribute *attr,
1037                                    const char *buf, size_t count)
1038 {
1039         struct pcpu *pcpu;
1040         int cpu, val, rc, i;
1041         char delim;
1042
1043         if (sscanf(buf, "%d %c", &val, &delim) != 1)
1044                 return -EINVAL;
1045         if (val != 0 && val != 1)
1046                 return -EINVAL;
1047         get_online_cpus();
1048         mutex_lock(&smp_cpu_state_mutex);
1049         rc = -EBUSY;
1050         /* disallow configuration changes of online cpus and cpu 0 */
1051         cpu = dev->id;
1052         cpu = smp_get_base_cpu(cpu);
1053         if (cpu == 0)
1054                 goto out;
1055         for (i = 0; i <= smp_cpu_mtid; i++)
1056                 if (cpu_online(cpu + i))
1057                         goto out;
1058         pcpu = pcpu_devices + cpu;
1059         rc = 0;
1060         switch (val) {
1061         case 0:
1062                 if (pcpu->state != CPU_STATE_CONFIGURED)
1063                         break;
1064                 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1065                 if (rc)
1066                         break;
1067                 for (i = 0; i <= smp_cpu_mtid; i++) {
1068                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1069                                 continue;
1070                         pcpu[i].state = CPU_STATE_STANDBY;
1071                         smp_cpu_set_polarization(cpu + i,
1072                                                  POLARIZATION_UNKNOWN);
1073                 }
1074                 topology_expect_change();
1075                 break;
1076         case 1:
1077                 if (pcpu->state != CPU_STATE_STANDBY)
1078                         break;
1079                 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1080                 if (rc)
1081                         break;
1082                 for (i = 0; i <= smp_cpu_mtid; i++) {
1083                         if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1084                                 continue;
1085                         pcpu[i].state = CPU_STATE_CONFIGURED;
1086                         smp_cpu_set_polarization(cpu + i,
1087                                                  POLARIZATION_UNKNOWN);
1088                 }
1089                 topology_expect_change();
1090                 break;
1091         default:
1092                 break;
1093         }
1094 out:
1095         mutex_unlock(&smp_cpu_state_mutex);
1096         put_online_cpus();
1097         return rc ? rc : count;
1098 }
1099 static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1100
1101 static ssize_t show_cpu_address(struct device *dev,
1102                                 struct device_attribute *attr, char *buf)
1103 {
1104         return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1105 }
1106 static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1107
1108 static struct attribute *cpu_common_attrs[] = {
1109         &dev_attr_configure.attr,
1110         &dev_attr_address.attr,
1111         NULL,
1112 };
1113
1114 static struct attribute_group cpu_common_attr_group = {
1115         .attrs = cpu_common_attrs,
1116 };
1117
1118 static struct attribute *cpu_online_attrs[] = {
1119         &dev_attr_idle_count.attr,
1120         &dev_attr_idle_time_us.attr,
1121         NULL,
1122 };
1123
1124 static struct attribute_group cpu_online_attr_group = {
1125         .attrs = cpu_online_attrs,
1126 };
1127
1128 static int smp_cpu_online(unsigned int cpu)
1129 {
1130         struct device *s = &per_cpu(cpu_device, cpu)->dev;
1131
1132         return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1133 }
1134 static int smp_cpu_pre_down(unsigned int cpu)
1135 {
1136         struct device *s = &per_cpu(cpu_device, cpu)->dev;
1137
1138         sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1139         return 0;
1140 }
1141
1142 static int smp_add_present_cpu(int cpu)
1143 {
1144         struct device *s;
1145         struct cpu *c;
1146         int rc;
1147
1148         c = kzalloc(sizeof(*c), GFP_KERNEL);
1149         if (!c)
1150                 return -ENOMEM;
1151         per_cpu(cpu_device, cpu) = c;
1152         s = &c->dev;
1153         c->hotpluggable = 1;
1154         rc = register_cpu(c, cpu);
1155         if (rc)
1156                 goto out;
1157         rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1158         if (rc)
1159                 goto out_cpu;
1160         rc = topology_cpu_init(c);
1161         if (rc)
1162                 goto out_topology;
1163         return 0;
1164
1165 out_topology:
1166         sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1167 out_cpu:
1168         unregister_cpu(c);
1169 out:
1170         return rc;
1171 }
1172
1173 int __ref smp_rescan_cpus(void)
1174 {
1175         struct sclp_core_info *info;
1176         int nr;
1177
1178         info = kzalloc(sizeof(*info), GFP_KERNEL);
1179         if (!info)
1180                 return -ENOMEM;
1181         smp_get_core_info(info, 0);
1182         get_online_cpus();
1183         mutex_lock(&smp_cpu_state_mutex);
1184         nr = __smp_rescan_cpus(info, false);
1185         mutex_unlock(&smp_cpu_state_mutex);
1186         put_online_cpus();
1187         kfree(info);
1188         if (nr)
1189                 topology_schedule_update();
1190         return 0;
1191 }
1192
1193 static ssize_t __ref rescan_store(struct device *dev,
1194                                   struct device_attribute *attr,
1195                                   const char *buf,
1196                                   size_t count)
1197 {
1198         int rc;
1199
1200         rc = lock_device_hotplug_sysfs();
1201         if (rc)
1202                 return rc;
1203         rc = smp_rescan_cpus();
1204         unlock_device_hotplug();
1205         return rc ? rc : count;
1206 }
1207 static DEVICE_ATTR_WO(rescan);
1208
1209 static int __init s390_smp_init(void)
1210 {
1211         int cpu, rc = 0;
1212
1213         rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1214         if (rc)
1215                 return rc;
1216         for_each_present_cpu(cpu) {
1217                 rc = smp_add_present_cpu(cpu);
1218                 if (rc)
1219                         goto out;
1220         }
1221
1222         rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1223                                smp_cpu_online, smp_cpu_pre_down);
1224         rc = rc <= 0 ? rc : 0;
1225 out:
1226         return rc;
1227 }
1228 subsys_initcall(s390_smp_init);