1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/dwarf.h>
18 #include <asm/errno.h>
19 #include <asm/ptrace.h>
20 #include <asm/thread_info.h>
21 #include <asm/asm-offsets.h>
22 #include <asm/unistd.h>
26 #include <asm/vx-insn.h>
27 #include <asm/setup.h>
29 #include <asm/export.h>
30 #include <asm/nospec-insn.h>
33 __PT_R1 = __PT_GPRS + 8
34 __PT_R2 = __PT_GPRS + 16
35 __PT_R3 = __PT_GPRS + 24
36 __PT_R4 = __PT_GPRS + 32
37 __PT_R5 = __PT_GPRS + 40
38 __PT_R6 = __PT_GPRS + 48
39 __PT_R7 = __PT_GPRS + 56
40 __PT_R8 = __PT_GPRS + 64
41 __PT_R9 = __PT_GPRS + 72
42 __PT_R10 = __PT_GPRS + 80
43 __PT_R11 = __PT_GPRS + 88
44 __PT_R12 = __PT_GPRS + 96
45 __PT_R13 = __PT_GPRS + 104
46 __PT_R14 = __PT_GPRS + 112
47 __PT_R15 = __PT_GPRS + 120
49 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
50 STACK_SIZE = 1 << STACK_SHIFT
51 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
53 _LPP_OFFSET = __LC_LPP
55 .macro CHECK_STACK savearea
56 #ifdef CONFIG_CHECK_STACK
57 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
63 .macro CHECK_VMAP_STACK savearea,oklabel
64 #ifdef CONFIG_VMAP_STACK
66 nill %r14,0x10000 - STACK_SIZE
68 clg %r14,__LC_KERNEL_STACK
70 clg %r14,__LC_ASYNC_STACK
72 clg %r14,__LC_MCCK_STACK
74 clg %r14,__LC_NODAT_STACK
76 clg %r14,__LC_RESTART_STACK
86 ALTERNATIVE ".insn s,0xb2050000,\savearea", \
87 ".insn s,0xb27c0000,\savearea", 25
91 * The TSTMSK macro generates a test-under-mask instruction by
92 * calculating the memory offset for the specified mask value.
93 * Mask value can be any constant. The macro shifts the mask
94 * value to calculate the memory offset for the test-under-mask
97 .macro TSTMSK addr, mask, size=8, bytepos=0
98 .if (\bytepos < \size) && (\mask >> 8)
100 .error "Mask exceeds byte boundary"
102 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
106 .error "Mask must not be zero"
108 off = \size - \bytepos - 1
113 ALTERNATIVE "", ".long 0xb2e8c000", 82
117 ALTERNATIVE "", ".long 0xb2e8d000", 82
120 .macro BPENTER tif_ptr,tif_mask
121 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
125 .macro BPEXIT tif_ptr,tif_mask
126 TSTMSK \tif_ptr,\tif_mask
127 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
128 "jnz .+8; .long 0xb2e8d000", 82
132 * The CHKSTG macro jumps to the provided label in case the
133 * machine check interruption code reports one of unrecoverable
135 * - Storage error uncorrected
136 * - Storage key error uncorrected
137 * - Storage degradation with Failing-storage-address validity
139 .macro CHKSTG errlabel
140 TSTMSK __LC_MCCK_CODE,(MCCK_CODE_STG_ERROR|MCCK_CODE_STG_KEY_ERROR)
142 TSTMSK __LC_MCCK_CODE,MCCK_CODE_STG_DEGRAD
144 TSTMSK __LC_MCCK_CODE,MCCK_CODE_STG_FAIL_ADDR
149 #if IS_ENABLED(CONFIG_KVM)
151 * The OUTSIDE macro jumps to the provided label in case the value
152 * in the provided register is outside of the provided range. The
153 * macro is useful for checking whether a PSW stored in a register
154 * pair points inside or outside of a block of instructions.
155 * @reg: register to check
156 * @start: start of the range
157 * @end: end of the range
158 * @outside_label: jump here if @reg is outside of [@start..@end)
160 .macro OUTSIDE reg,start,end,outside_label
164 lghi %r13,\end - \start
170 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
171 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
172 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
173 larl %r9,sie_exit # skip forward to sie_exit
178 GEN_BR_THUNK %r14,%r13
180 .section .kprobes.text, "ax"
183 * This nop exists only in order to avoid that __bpon starts at
184 * the beginning of the kprobes text section. In that case we would
185 * have several symbols at the same address. E.g. objdump would take
186 * an arbitrary symbol name when disassembling this code.
187 * With the added nop in between the __bpon symbol is unique
199 * Scheduler resume function, called by switch_to
200 * gpr2 = (task_struct *) prev
201 * gpr3 = (task_struct *) next
206 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
207 lghi %r4,__TASK_stack
208 lghi %r1,__TASK_thread
210 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
211 lg %r15,0(%r4,%r3) # start of kernel stack of next
212 agr %r15,%r5 # end of kernel stack of next
213 stg %r3,__LC_CURRENT # store task struct of next
214 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
215 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
217 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
218 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
219 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
223 #if IS_ENABLED(CONFIG_KVM)
225 * sie64a calling convention:
226 * %r2 pointer to sie control block
227 * %r3 guest register save area
230 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
232 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
233 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
234 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
235 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
236 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
237 lg %r14,__LC_GMAP # get gmap pointer
240 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
242 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
243 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
244 tm __SIE_PROG20+3(%r14),3 # last exit...
246 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
247 jo .Lsie_skip # exit if fp/vx regs changed
248 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
252 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
254 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
255 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
257 # some program checks are suppressing. C code (e.g. do_protection_exception)
258 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
259 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
260 # Other instructions between sie64a and .Lsie_done should not cause program
261 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
270 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
271 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
272 xgr %r0,%r0 # clear guest registers to
273 xgr %r1,%r1 # prevent speculative use
277 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
278 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
282 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
285 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
286 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
287 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
288 EX_TABLE(sie_exit,.Lsie_fault)
290 EXPORT_SYMBOL(sie64a)
291 EXPORT_SYMBOL(sie_exit)
295 * SVC interrupt handler routine. System calls are synchronous events and
296 * are entered with interrupts disabled.
300 stpt __LC_SYS_ENTER_TIMER
301 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
305 lctlg %c1,%c1,__LC_KERNEL_ASCE
307 lg %r15,__LC_KERNEL_STACK
308 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
309 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
310 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
311 # clear user controlled register to prevent speculative use
322 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
323 mvc __PT_R8(64,%r2),__LC_SAVE_AREA_SYNC
325 brasl %r14,__do_syscall
326 lctlg %c1,%c1,__LC_USER_ASCE
327 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
328 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
329 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
335 # a new process exits the kernel with ret_from_fork
339 brasl %r14,__ret_from_fork
340 lctlg %c1,%c1,__LC_USER_ASCE
341 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
342 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
343 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
346 ENDPROC(ret_from_fork)
349 * Program check handler routine
352 ENTRY(pgm_check_handler)
353 stpt __LC_SYS_ENTER_TIMER
355 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
358 lmg %r8,%r9,__LC_PGM_OLD_PSW
359 tmhh %r8,0x0001 # coming from user space?
361 lctlg %c1,%c1,__LC_KERNEL_ASCE
362 j 3f # -> fault in user space
364 #if IS_ENABLED(CONFIG_KVM)
365 # cleanup critical section for program checks in sie64a
366 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,1f
368 lghi %r10,_PIF_GUEST_FAULT
370 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
371 jnz 2f # -> enabled, can't be a double fault
372 tm __LC_PGM_ILC+3,0x80 # check for per exception
373 jnz .Lpgm_svcper # -> single stepped svc
374 2: CHECK_STACK __LC_SAVE_AREA_SYNC
375 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
376 # CHECK_VMAP_STACK branches to stack_overflow or 4f
377 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,4f
378 3: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
379 lg %r15,__LC_KERNEL_STACK
380 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
381 stg %r10,__PT_FLAGS(%r11)
382 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
383 stmg %r0,%r7,__PT_R0(%r11)
384 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
385 stmg %r8,%r9,__PT_PSW(%r11)
387 # clear user controlled registers to prevent speculative use
396 brasl %r14,__do_pgm_check
397 tmhh %r8,0x0001 # returning to user space?
398 jno .Lpgm_exit_kernel
399 lctlg %c1,%c1,__LC_USER_ASCE
400 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
403 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
404 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
408 # single stepped system call
411 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
413 stg %r14,__LC_RETURN_PSW+8
415 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
416 ENDPROC(pgm_check_handler)
419 * Interrupt handler macro used for external and IO interrupts.
421 .macro INT_HANDLER name,lc_old_psw,handler
424 stpt __LC_SYS_ENTER_TIMER
426 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
428 lmg %r8,%r9,\lc_old_psw
429 tmhh %r8,0x0001 # interrupting from user ?
431 #if IS_ENABLED(CONFIG_KVM)
432 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,0f
433 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
436 0: CHECK_STACK __LC_SAVE_AREA_ASYNC
437 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
439 1: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
440 lctlg %c1,%c1,__LC_KERNEL_ASCE
441 lg %r15,__LC_KERNEL_STACK
442 2: xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
443 la %r11,STACK_FRAME_OVERHEAD(%r15)
444 stmg %r0,%r7,__PT_R0(%r11)
445 # clear user controlled registers to prevent speculative use
454 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
455 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
456 stmg %r8,%r9,__PT_PSW(%r11)
457 tm %r8,0x0001 # coming from user space?
459 lctlg %c1,%c1,__LC_KERNEL_ASCE
460 1: lgr %r2,%r11 # pass pointer to pt_regs
462 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
463 tmhh %r8,0x0001 # returning to user ?
465 lctlg %c1,%c1,__LC_USER_ASCE
466 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
468 2: lmg %r0,%r15,__PT_R0(%r11)
473 INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
474 INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
480 stg %r14,(__SF_GPRS+8*8)(%r15)
481 stg %r3,__SF_EMPTY(%r15)
482 larl %r1,psw_idle_exit
483 stg %r1,__SF_EMPTY+8(%r15)
484 larl %r1,smp_cpu_mtid
488 .insn rsy,0xeb0000000017,%r1,5,__MT_CYCLES_ENTER(%r2)
490 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
492 STCK __CLOCK_IDLE_ENTER(%r2)
493 stpt __TIMER_IDLE_ENTER(%r2)
494 lpswe __SF_EMPTY(%r15)
501 * Machine check handler routines
503 ENTRY(mcck_int_handler)
506 la %r1,4095 # validate r1
507 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
508 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
510 lmg %r8,%r9,__LC_MCK_OLD_PSW
511 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
512 jo .Lmcck_panic # yes -> rest of mcck code invalid
513 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
514 jno .Lmcck_panic # control registers invalid -> panic
516 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
518 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
519 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
520 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
522 la %r14,__LC_SYS_ENTER_TIMER
523 clc 0(8,%r14),__LC_EXIT_TIMER
525 la %r14,__LC_EXIT_TIMER
526 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
528 la %r14,__LC_LAST_UPDATE_TIMER
530 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
531 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
533 tmhh %r8,0x0001 # interrupting from user ?
535 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
537 #if IS_ENABLED(CONFIG_KVM)
538 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,6f
539 OUTSIDE %r9,.Lsie_entry,.Lsie_skip,4f
540 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
542 4: CHKSTG .Lmcck_panic
543 5: larl %r14,.Lstosm_tmp
544 stosm 0(%r14),0x04 # turn dat on, keep irqs off
545 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
549 6: CHKSTG .Lmcck_panic
550 larl %r14,.Lstosm_tmp
551 stosm 0(%r14),0x04 # turn dat on, keep irqs off
552 tmhh %r8,0x0001 # interrupting from user ?
554 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
556 lg %r15,__LC_MCCK_STACK
557 la %r11,STACK_FRAME_OVERHEAD(%r15)
558 stctg %c1,%c1,__PT_CR1(%r11)
559 lctlg %c1,%c1,__LC_KERNEL_ASCE
560 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
561 lghi %r14,__LC_GPREGS_SAVE_AREA+64
562 stmg %r0,%r7,__PT_R0(%r11)
563 # clear user controlled registers to prevent speculative use
572 mvc __PT_R8(64,%r11),0(%r14)
573 stmg %r8,%r9,__PT_PSW(%r11)
574 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
575 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
576 lgr %r2,%r11 # pass pointer to pt_regs
577 brasl %r14,s390_do_machine_check
580 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
581 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
582 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
583 la %r11,STACK_FRAME_OVERHEAD(%r1)
585 brasl %r14,s390_handle_mcck
587 lctlg %c1,%c1,__PT_CR1(%r11)
588 lmg %r0,%r10,__PT_R0(%r11)
589 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
590 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
592 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
594 0: lmg %r11,%r15,__PT_R11(%r11)
595 b __LC_RETURN_MCCK_LPSWE
599 * Iterate over all possible CPU addresses in the range 0..0xffff
600 * and stop each CPU using signal processor. Use compare and swap
601 * to allow just one CPU-stopper and prevent concurrent CPUs from
602 * stopping each other while leaving the others running.
607 cs %r5,%r6,0(%r7) # single CPU-stopper only
610 stap 0(%r7) # this CPU address
614 sll %r0,16 # CPU counter
615 lhi %r3,0 # next CPU address
618 1: sigp %r1,%r3,SIGP_STOP # stop next CPU
622 3: sigp %r1,%r4,SIGP_STOP # stop this CPU
625 ENDPROC(mcck_int_handler)
627 ENTRY(restart_int_handler)
628 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
629 stg %r15,__LC_SAVE_AREA_RESTART
630 TSTMSK __LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4
633 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r15)
634 0: larl %r15,.Lstosm_tmp
635 stosm 0(%r15),0x04 # turn dat on, keep irqs off
636 lg %r15,__LC_RESTART_STACK
637 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
638 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
639 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
640 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
641 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
642 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
643 lg %r2,__LC_RESTART_DATA
644 lgf %r3,__LC_RESTART_SOURCE
645 ltgr %r3,%r3 # test source cpu address
646 jm 1f # negative -> skip source stop
647 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
648 brc 10,0b # wait for status stored
649 1: basr %r14,%r1 # call function
650 stap __SF_EMPTY(%r15) # store cpu address
651 llgh %r3,__SF_EMPTY(%r15)
652 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
655 ENDPROC(restart_int_handler)
657 .section .kprobes.text, "ax"
659 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
661 * The synchronous or the asynchronous stack overflowed. We are dead.
662 * No need to properly save the registers, we are going to panic anyway.
663 * Setup a pt_regs so that show_trace can provide a good call trace.
665 ENTRY(stack_overflow)
666 lg %r15,__LC_NODAT_STACK # change to panic stack
667 la %r11,STACK_FRAME_OVERHEAD(%r15)
668 stmg %r0,%r7,__PT_R0(%r11)
669 stmg %r8,%r9,__PT_PSW(%r11)
670 mvc __PT_R8(64,%r11),0(%r14)
671 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
672 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
673 lgr %r2,%r11 # pass pointer to pt_regs
674 jg kernel_stack_overflow
675 ENDPROC(stack_overflow)
683 .section .rodata, "a"
684 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
685 .globl sys_call_table
687 #include "asm/syscall_table.h"
692 #define SYSCALL(esame,emu) .quad __s390_ ## emu
693 .globl sys_call_table_emu
695 #include "asm/syscall_table.h"