1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _LPP_OFFSET = __LC_LPP
56 .macro CHECK_STACK savearea
57 #ifdef CONFIG_CHECK_STACK
58 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
64 .macro CHECK_VMAP_STACK savearea,oklabel
65 #ifdef CONFIG_VMAP_STACK
67 nill %r14,0x10000 - STACK_SIZE
69 clg %r14,__LC_KERNEL_STACK
71 clg %r14,__LC_ASYNC_STACK
73 clg %r14,__LC_MCCK_STACK
75 clg %r14,__LC_NODAT_STACK
77 clg %r14,__LC_RESTART_STACK
87 ALTERNATIVE ".insn s,0xb2050000,\savearea", \
88 ".insn s,0xb27c0000,\savearea", 25
92 * The TSTMSK macro generates a test-under-mask instruction by
93 * calculating the memory offset for the specified mask value.
94 * Mask value can be any constant. The macro shifts the mask
95 * value to calculate the memory offset for the test-under-mask
98 .macro TSTMSK addr, mask, size=8, bytepos=0
99 .if (\bytepos < \size) && (\mask >> 8)
101 .error "Mask exceeds byte boundary"
103 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
107 .error "Mask must not be zero"
109 off = \size - \bytepos - 1
114 ALTERNATIVE "", ".long 0xb2e8c000", 82
118 ALTERNATIVE "", ".long 0xb2e8d000", 82
121 .macro BPENTER tif_ptr,tif_mask
122 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
126 .macro BPEXIT tif_ptr,tif_mask
127 TSTMSK \tif_ptr,\tif_mask
128 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
129 "jnz .+8; .long 0xb2e8d000", 82
133 GEN_BR_THUNK %r14,%r13
135 .section .kprobes.text, "ax"
138 * This nop exists only in order to avoid that __bpon starts at
139 * the beginning of the kprobes text section. In that case we would
140 * have several symbols at the same address. E.g. objdump would take
141 * an arbitrary symbol name when disassembling this code.
142 * With the added nop in between the __bpon symbol is unique
154 * Scheduler resume function, called by switch_to
155 * gpr2 = (task_struct *) prev
156 * gpr3 = (task_struct *) next
161 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
162 lghi %r4,__TASK_stack
163 lghi %r1,__TASK_thread
165 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
166 lg %r15,0(%r4,%r3) # start of kernel stack of next
167 agr %r15,%r5 # end of kernel stack of next
168 stg %r3,__LC_CURRENT # store task struct of next
169 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
170 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
172 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
173 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
174 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
178 #if IS_ENABLED(CONFIG_KVM)
180 * sie64a calling convention:
181 * %r2 pointer to sie control block
182 * %r3 guest register save area
185 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
187 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
188 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
189 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
190 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
191 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
192 lg %r14,__LC_GMAP # get gmap pointer
195 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
197 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
198 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
199 tm __SIE_PROG20+3(%r14),3 # last exit...
201 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
202 jo .Lsie_skip # exit if fp/vx regs changed
203 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
207 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
209 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
210 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
212 # some program checks are suppressing. C code (e.g. do_protection_exception)
213 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
214 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
215 # Other instructions between sie64a and .Lsie_done should not cause program
216 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
217 # See also .Lcleanup_sie_mcck/.Lcleanup_sie_int
226 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
227 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
228 xgr %r0,%r0 # clear guest registers to
229 xgr %r1,%r1 # prevent speculative use
233 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
234 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
238 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
241 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
242 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
243 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
244 EX_TABLE(sie_exit,.Lsie_fault)
246 EXPORT_SYMBOL(sie64a)
247 EXPORT_SYMBOL(sie_exit)
251 * SVC interrupt handler routine. System calls are synchronous events and
252 * are entered with interrupts disabled.
256 stpt __LC_SYS_ENTER_TIMER
257 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
261 lctlg %c1,%c1,__LC_KERNEL_ASCE
263 lg %r15,__LC_KERNEL_STACK
264 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
265 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
266 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
267 # clear user controlled register to prevent speculative use
278 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
280 brasl %r14,__do_syscall
281 lctlg %c1,%c1,__LC_USER_ASCE
282 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
283 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
284 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
290 # a new process exits the kernel with ret_from_fork
294 brasl %r14,__ret_from_fork
295 lctlg %c1,%c1,__LC_USER_ASCE
296 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
297 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
298 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
301 ENDPROC(ret_from_fork)
304 * Program check handler routine
307 ENTRY(pgm_check_handler)
308 stpt __LC_SYS_ENTER_TIMER
310 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
313 lmg %r8,%r9,__LC_PGM_OLD_PSW
314 tmhh %r8,0x0001 # coming from user space?
316 lctlg %c1,%c1,__LC_KERNEL_ASCE
317 j 3f # -> fault in user space
319 #if IS_ENABLED(CONFIG_KVM)
320 # cleanup critical section for program checks in sie64a
324 lghi %r13,.Lsie_done - .Lsie_gmap
327 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
328 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
329 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
330 larl %r9,sie_exit # skip forward to sie_exit
331 lghi %r10,_PIF_GUEST_FAULT
333 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
334 jnz 2f # -> enabled, can't be a double fault
335 tm __LC_PGM_ILC+3,0x80 # check for per exception
336 jnz .Lpgm_svcper # -> single stepped svc
337 2: CHECK_STACK __LC_SAVE_AREA_SYNC
338 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
339 # CHECK_VMAP_STACK branches to stack_overflow or 4f
340 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,4f
341 3: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
342 lg %r15,__LC_KERNEL_STACK
343 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
344 stg %r10,__PT_FLAGS(%r11)
345 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
346 stmg %r0,%r7,__PT_R0(%r11)
347 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
348 stmg %r8,%r9,__PT_PSW(%r11)
350 # clear user controlled registers to prevent speculative use
359 brasl %r14,__do_pgm_check
360 tmhh %r8,0x0001 # returning to user space?
361 jno .Lpgm_exit_kernel
362 lctlg %c1,%c1,__LC_USER_ASCE
363 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
366 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
367 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
371 # single stepped system call
374 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
376 stg %r14,__LC_RETURN_PSW+8
378 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
379 ENDPROC(pgm_check_handler)
382 * Interrupt handler macro used for external and IO interrupts.
384 .macro INT_HANDLER name,lc_old_psw,handler
387 stpt __LC_SYS_ENTER_TIMER
389 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
391 lmg %r8,%r9,\lc_old_psw
392 tmhh %r8,0x0001 # interrupting from user ?
394 #if IS_ENABLED(CONFIG_KVM)
398 lghi %r13,.Lsie_done - .Lsie_gmap
401 brasl %r14,.Lcleanup_sie_int
403 0: CHECK_STACK __LC_SAVE_AREA_ASYNC
404 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
406 1: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
407 lctlg %c1,%c1,__LC_KERNEL_ASCE
408 lg %r15,__LC_KERNEL_STACK
409 2: xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
410 la %r11,STACK_FRAME_OVERHEAD(%r15)
411 stmg %r0,%r7,__PT_R0(%r11)
412 # clear user controlled registers to prevent speculative use
421 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
422 stmg %r8,%r9,__PT_PSW(%r11)
423 tm %r8,0x0001 # coming from user space?
425 lctlg %c1,%c1,__LC_KERNEL_ASCE
426 1: lgr %r2,%r11 # pass pointer to pt_regs
428 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
429 tmhh %r8,0x0001 # returning to user ?
431 lctlg %c1,%c1,__LC_USER_ASCE
432 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
434 2: lmg %r0,%r15,__PT_R0(%r11)
439 INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
440 INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
446 stg %r14,(__SF_GPRS+8*8)(%r15)
447 stg %r3,__SF_EMPTY(%r15)
448 larl %r1,psw_idle_exit
449 stg %r1,__SF_EMPTY+8(%r15)
450 larl %r1,smp_cpu_mtid
454 .insn rsy,0xeb0000000017,%r1,5,__MT_CYCLES_ENTER(%r2)
456 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
458 STCK __CLOCK_IDLE_ENTER(%r2)
459 stpt __TIMER_IDLE_ENTER(%r2)
460 lpswe __SF_EMPTY(%r15)
467 * Machine check handler routines
469 ENTRY(mcck_int_handler)
472 la %r1,4095 # validate r1
473 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
474 sckc __LC_CLOCK_COMPARATOR # validate comparator
475 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
476 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
478 lmg %r8,%r9,__LC_MCK_OLD_PSW
479 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
480 jo .Lmcck_panic # yes -> rest of mcck code invalid
481 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
482 jno .Lmcck_panic # control registers invalid -> panic
484 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
486 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
487 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
488 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
490 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
492 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
493 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
494 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
498 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
500 lghi %r14,__LC_FPREGS_SAVE_AREA
518 0: VLM %v0,%v15,0,%r11
519 VLM %v16,%v31,256,%r11
520 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
521 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
522 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
524 la %r14,__LC_SYS_ENTER_TIMER
525 clc 0(8,%r14),__LC_EXIT_TIMER
527 la %r14,__LC_EXIT_TIMER
528 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
530 la %r14,__LC_LAST_UPDATE_TIMER
532 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
533 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
535 tmhh %r8,0x0001 # interrupting from user ?
537 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
539 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
540 tmhh %r8,0x0001 # interrupting from user ?
542 #if IS_ENABLED(CONFIG_KVM)
546 lghi %r13,.Lsie_done - .Lsie_gmap
549 brasl %r14,.Lcleanup_sie_mcck
553 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
555 lg %r15,__LC_MCCK_STACK
557 la %r11,STACK_FRAME_OVERHEAD(%r15)
558 stctg %c1,%c1,__PT_CR1(%r11)
559 lctlg %c1,%c1,__LC_KERNEL_ASCE
560 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
561 lghi %r14,__LC_GPREGS_SAVE_AREA+64
562 stmg %r0,%r7,__PT_R0(%r11)
563 # clear user controlled registers to prevent speculative use
572 mvc __PT_R8(64,%r11),0(%r14)
573 stmg %r8,%r9,__PT_PSW(%r11)
574 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
575 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
576 lgr %r2,%r11 # pass pointer to pt_regs
577 brasl %r14,s390_do_machine_check
580 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
581 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
582 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
583 la %r11,STACK_FRAME_OVERHEAD(%r1)
585 brasl %r14,s390_handle_mcck
587 lctlg %c1,%c1,__PT_CR1(%r11)
588 lmg %r0,%r10,__PT_R0(%r11)
589 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
590 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
592 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
594 0: lmg %r11,%r15,__PT_R11(%r11)
595 b __LC_RETURN_MCCK_LPSWE
598 lg %r15,__LC_NODAT_STACK
600 ENDPROC(mcck_int_handler)
603 # PSW restart interrupt handler
605 ENTRY(restart_int_handler)
606 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
607 stg %r15,__LC_SAVE_AREA_RESTART
608 lg %r15,__LC_RESTART_STACK
609 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
610 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
611 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
612 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
613 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
614 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
615 lg %r2,__LC_RESTART_DATA
616 lg %r3,__LC_RESTART_SOURCE
617 ltgr %r3,%r3 # test source cpu address
618 jm 1f # negative -> skip source stop
619 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
620 brc 10,0b # wait for status stored
621 1: basr %r14,%r1 # call function
622 stap __SF_EMPTY(%r15) # store cpu address
623 llgh %r3,__SF_EMPTY(%r15)
624 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
627 ENDPROC(restart_int_handler)
629 .section .kprobes.text, "ax"
631 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
633 * The synchronous or the asynchronous stack overflowed. We are dead.
634 * No need to properly save the registers, we are going to panic anyway.
635 * Setup a pt_regs so that show_trace can provide a good call trace.
637 ENTRY(stack_overflow)
638 lg %r15,__LC_NODAT_STACK # change to panic stack
639 la %r11,STACK_FRAME_OVERHEAD(%r15)
640 stmg %r0,%r7,__PT_R0(%r11)
641 stmg %r8,%r9,__PT_PSW(%r11)
642 mvc __PT_R8(64,%r11),0(%r14)
643 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
644 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
645 lgr %r2,%r11 # pass pointer to pt_regs
646 jg kernel_stack_overflow
647 ENDPROC(stack_overflow)
650 #if IS_ENABLED(CONFIG_KVM)
652 larl %r13,.Lsie_entry
654 lghi %r13,.Lsie_skip - .Lsie_entry
657 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
659 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
660 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
661 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
662 lctlg %c1,%c1,__LC_KERNEL_ASCE
663 larl %r9,sie_exit # skip forward to sie_exit
667 .section .rodata, "a"
668 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
669 .globl sys_call_table
671 #include "asm/syscall_table.h"
676 #define SYSCALL(esame,emu) .quad __s390_ ## emu
677 .globl sys_call_table_emu
679 #include "asm/syscall_table.h"