1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _LPP_OFFSET = __LC_LPP
56 .macro CHECK_STACK savearea
57 #ifdef CONFIG_CHECK_STACK
58 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
64 .macro CHECK_VMAP_STACK savearea,oklabel
65 #ifdef CONFIG_VMAP_STACK
67 nill %r14,0x10000 - STACK_SIZE
69 clg %r14,__LC_KERNEL_STACK
71 clg %r14,__LC_ASYNC_STACK
73 clg %r14,__LC_NODAT_STACK
75 clg %r14,__LC_RESTART_STACK
85 ALTERNATIVE ".insn s,0xb2050000,\savearea", \
86 ".insn s,0xb27c0000,\savearea", 25
90 * The TSTMSK macro generates a test-under-mask instruction by
91 * calculating the memory offset for the specified mask value.
92 * Mask value can be any constant. The macro shifts the mask
93 * value to calculate the memory offset for the test-under-mask
96 .macro TSTMSK addr, mask, size=8, bytepos=0
97 .if (\bytepos < \size) && (\mask >> 8)
99 .error "Mask exceeds byte boundary"
101 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
105 .error "Mask must not be zero"
107 off = \size - \bytepos - 1
112 ALTERNATIVE "", ".long 0xb2e8c000", 82
116 ALTERNATIVE "", ".long 0xb2e8d000", 82
119 .macro BPENTER tif_ptr,tif_mask
120 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
124 .macro BPEXIT tif_ptr,tif_mask
125 TSTMSK \tif_ptr,\tif_mask
126 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
127 "jnz .+8; .long 0xb2e8d000", 82
131 GEN_BR_THUNK %r14,%r11
133 .section .kprobes.text, "ax"
136 * This nop exists only in order to avoid that __bpon starts at
137 * the beginning of the kprobes text section. In that case we would
138 * have several symbols at the same address. E.g. objdump would take
139 * an arbitrary symbol name when disassembling this code.
140 * With the added nop in between the __bpon symbol is unique
152 * Scheduler resume function, called by switch_to
153 * gpr2 = (task_struct *) prev
154 * gpr3 = (task_struct *) next
159 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
160 lghi %r4,__TASK_stack
161 lghi %r1,__TASK_thread
163 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
164 lg %r15,0(%r4,%r3) # start of kernel stack of next
165 agr %r15,%r5 # end of kernel stack of next
166 stg %r3,__LC_CURRENT # store task struct of next
167 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
168 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
170 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
171 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
172 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
176 #if IS_ENABLED(CONFIG_KVM)
178 * sie64a calling convention:
179 * %r2 pointer to sie control block
180 * %r3 guest register save area
183 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
185 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
186 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
187 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
188 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
189 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
190 lg %r14,__LC_GMAP # get gmap pointer
193 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
195 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
196 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
197 tm __SIE_PROG20+3(%r14),3 # last exit...
199 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
200 jo .Lsie_skip # exit if fp/vx regs changed
201 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
205 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
207 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
208 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
210 # some program checks are suppressing. C code (e.g. do_protection_exception)
211 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
212 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
213 # Other instructions between sie64a and .Lsie_done should not cause program
214 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
215 # See also .Lcleanup_sie
224 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
225 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
226 xgr %r0,%r0 # clear guest registers to
227 xgr %r1,%r1 # prevent speculative use
231 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
232 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
236 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
239 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
240 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
241 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
242 EX_TABLE(sie_exit,.Lsie_fault)
244 EXPORT_SYMBOL(sie64a)
245 EXPORT_SYMBOL(sie_exit)
249 * SVC interrupt handler routine. System calls are synchronous events and
250 * are entered with interrupts disabled.
254 stpt __LC_SYS_ENTER_TIMER
255 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
259 lctlg %c1,%c1,__LC_KERNEL_ASCE
261 lg %r15,__LC_KERNEL_STACK
262 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
263 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
264 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
265 # clear user controlled register to prevent speculative use
276 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
278 brasl %r14,__do_syscall
279 lctlg %c1,%c1,__LC_USER_ASCE
280 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
281 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
282 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
288 # a new process exits the kernel with ret_from_fork
292 brasl %r14,__ret_from_fork
293 lctlg %c1,%c1,__LC_USER_ASCE
294 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
295 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
296 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
299 ENDPROC(ret_from_fork)
302 * Program check handler routine
305 ENTRY(pgm_check_handler)
306 stpt __LC_SYS_ENTER_TIMER
308 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
311 lmg %r8,%r9,__LC_PGM_OLD_PSW
312 tmhh %r8,0x0001 # coming from user space?
314 lctlg %c1,%c1,__LC_KERNEL_ASCE
315 j 3f # -> fault in user space
317 #if IS_ENABLED(CONFIG_KVM)
318 # cleanup critical section for program checks in sie64a
322 lghi %r13,.Lsie_done - .Lsie_gmap
325 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
326 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
327 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
328 larl %r9,sie_exit # skip forward to sie_exit
329 lghi %r10,_PIF_GUEST_FAULT
331 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
332 jnz 2f # -> enabled, can't be a double fault
333 tm __LC_PGM_ILC+3,0x80 # check for per exception
334 jnz .Lpgm_svcper # -> single stepped svc
335 2: CHECK_STACK __LC_SAVE_AREA_SYNC
336 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
337 # CHECK_VMAP_STACK branches to stack_overflow or 4f
338 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,4f
339 3: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
340 lg %r15,__LC_KERNEL_STACK
341 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
342 stg %r10,__PT_FLAGS(%r11)
343 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
344 stmg %r0,%r7,__PT_R0(%r11)
345 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
346 stmg %r8,%r9,__PT_PSW(%r11)
348 # clear user controlled registers to prevent speculative use
357 brasl %r14,__do_pgm_check
358 tmhh %r8,0x0001 # returning to user space?
359 jno .Lpgm_exit_kernel
360 lctlg %c1,%c1,__LC_USER_ASCE
361 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
364 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
365 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
369 # single stepped system call
372 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
374 stg %r14,__LC_RETURN_PSW+8
376 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
377 ENDPROC(pgm_check_handler)
380 * Interrupt handler macro used for external and IO interrupts.
382 .macro INT_HANDLER name,lc_old_psw,handler
385 stpt __LC_SYS_ENTER_TIMER
387 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
389 lmg %r8,%r9,\lc_old_psw
390 tmhh %r8,0x0001 # interrupting from user ?
392 #if IS_ENABLED(CONFIG_KVM)
396 lghi %r13,.Lsie_done - .Lsie_gmap
399 lghi %r11,__LC_SAVE_AREA_ASYNC # inside critical section, do cleanup
400 brasl %r14,.Lcleanup_sie
402 0: CHECK_STACK __LC_SAVE_AREA_ASYNC
404 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
405 stg %r11,__SF_BACKCHAIN(%r15)
407 1: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
408 lctlg %c1,%c1,__LC_KERNEL_ASCE
409 lg %r15,__LC_KERNEL_STACK
410 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
411 2: la %r11,STACK_FRAME_OVERHEAD(%r15)
412 stmg %r0,%r7,__PT_R0(%r11)
413 # clear user controlled registers to prevent speculative use
422 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
423 stmg %r8,%r9,__PT_PSW(%r11)
424 tm %r8,0x0001 # coming from user space?
426 lctlg %c1,%c1,__LC_KERNEL_ASCE
427 1: lgr %r2,%r11 # pass pointer to pt_regs
429 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
430 tmhh %r8,0x0001 # returning to user ?
432 lctlg %c1,%c1,__LC_USER_ASCE
433 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
435 2: lmg %r0,%r15,__PT_R0(%r11)
440 INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
441 INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
447 stg %r3,__SF_EMPTY(%r15)
448 larl %r1,psw_idle_exit
449 stg %r1,__SF_EMPTY+8(%r15)
450 larl %r1,smp_cpu_mtid
454 .insn rsy,0xeb0000000017,%r1,5,__MT_CYCLES_ENTER(%r2)
456 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
458 STCK __CLOCK_IDLE_ENTER(%r2)
459 stpt __TIMER_IDLE_ENTER(%r2)
460 lpswe __SF_EMPTY(%r15)
467 * Machine check handler routines
469 ENTRY(mcck_int_handler)
472 la %r1,4095 # validate r1
473 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
474 sckc __LC_CLOCK_COMPARATOR # validate comparator
475 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
476 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
478 lmg %r8,%r9,__LC_MCK_OLD_PSW
479 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
480 jo .Lmcck_panic # yes -> rest of mcck code invalid
481 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
482 jno .Lmcck_panic # control registers invalid -> panic
484 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
486 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
487 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
488 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
490 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
492 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
493 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
494 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
498 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
500 lghi %r14,__LC_FPREGS_SAVE_AREA
518 0: VLM %v0,%v15,0,%r11
519 VLM %v16,%v31,256,%r11
520 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
521 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
522 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
524 la %r14,__LC_SYS_ENTER_TIMER
525 clc 0(8,%r14),__LC_EXIT_TIMER
527 la %r14,__LC_EXIT_TIMER
528 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
530 la %r14,__LC_LAST_UPDATE_TIMER
532 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
533 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
535 tmhh %r8,0x0001 # interrupting from user ?
537 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
539 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
540 tmhh %r8,0x0001 # interrupting from user ?
542 #if IS_ENABLED(CONFIG_KVM)
546 lghi %r13,.Lsie_done - .Lsie_gmap
549 lghi %r11,__LC_GPREGS_SAVE_AREA+64 # inside critical section, do cleanup
550 brasl %r14,.Lcleanup_sie
553 CHECK_STACK __LC_GPREGS_SAVE_AREA+64
555 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
556 stg %r11,__SF_BACKCHAIN(%r15)
559 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
560 lctlg %c1,%c1,__LC_KERNEL_ASCE
561 lg %r15,__LC_KERNEL_STACK
562 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
563 5: la %r11,STACK_FRAME_OVERHEAD(%r15)
565 lghi %r14,__LC_GPREGS_SAVE_AREA+64
566 stmg %r0,%r7,__PT_R0(%r11)
567 # clear user controlled registers to prevent speculative use
576 mvc __PT_R8(64,%r11),0(%r14)
577 stmg %r8,%r9,__PT_PSW(%r11)
579 mvc __PT_CR1(8,%r11),__LC_CREGS_SAVE_AREA-4095+8(%r14)
580 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
581 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
582 lgr %r2,%r11 # pass pointer to pt_regs
583 brasl %r14,s390_do_machine_check
586 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
587 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
588 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
589 la %r11,STACK_FRAME_OVERHEAD(%r1)
591 brasl %r14,s390_handle_mcck
593 lctlg %c1,%c1,__PT_CR1(%r11)
594 lmg %r0,%r10,__PT_R0(%r11)
595 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
596 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
598 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
600 0: lmg %r11,%r15,__PT_R11(%r11)
601 b __LC_RETURN_MCCK_LPSWE
604 lg %r15,__LC_NODAT_STACK
605 la %r11,STACK_FRAME_OVERHEAD(%r15)
607 ENDPROC(mcck_int_handler)
610 # PSW restart interrupt handler
612 ENTRY(restart_int_handler)
613 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
614 stg %r15,__LC_SAVE_AREA_RESTART
615 lg %r15,__LC_RESTART_STACK
616 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
617 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
618 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
619 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
620 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
621 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
622 lg %r2,__LC_RESTART_DATA
623 lg %r3,__LC_RESTART_SOURCE
624 ltgr %r3,%r3 # test source cpu address
625 jm 1f # negative -> skip source stop
626 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
627 brc 10,0b # wait for status stored
628 1: basr %r14,%r1 # call function
629 stap __SF_EMPTY(%r15) # store cpu address
630 llgh %r3,__SF_EMPTY(%r15)
631 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
634 ENDPROC(restart_int_handler)
636 .section .kprobes.text, "ax"
638 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
640 * The synchronous or the asynchronous stack overflowed. We are dead.
641 * No need to properly save the registers, we are going to panic anyway.
642 * Setup a pt_regs so that show_trace can provide a good call trace.
644 ENTRY(stack_overflow)
645 lg %r15,__LC_NODAT_STACK # change to panic stack
646 la %r11,STACK_FRAME_OVERHEAD(%r15)
647 stmg %r0,%r7,__PT_R0(%r11)
648 stmg %r8,%r9,__PT_PSW(%r11)
649 mvc __PT_R8(64,%r11),0(%r14)
650 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
651 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
652 lgr %r2,%r11 # pass pointer to pt_regs
653 jg kernel_stack_overflow
654 ENDPROC(stack_overflow)
657 #if IS_ENABLED(CONFIG_KVM)
659 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
661 larl %r13,.Lsie_entry
666 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
667 1: BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
668 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
669 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
670 lctlg %c1,%c1,__LC_KERNEL_ASCE
671 larl %r9,sie_exit # skip forward to sie_exit
675 .section .rodata, "a"
676 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
677 .globl sys_call_table
679 #include "asm/syscall_table.h"
684 #define SYSCALL(esame,emu) .quad __s390_ ## emu
685 .globl sys_call_table_emu
687 #include "asm/syscall_table.h"