1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright IBM Corp. 1999
5 * Author(s): Hartmut Penner (hp@de.ibm.com),
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/processor.h"
9 * Copyright (C) 1994, Linus Torvalds
12 #ifndef __ASM_S390_PROCESSOR_H
13 #define __ASM_S390_PROCESSOR_H
15 #include <linux/bits.h>
17 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
18 #define CIF_FPU 3 /* restore FPU registers */
19 #define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
20 #define CIF_ENABLED_WAIT 5 /* in enabled wait state */
21 #define CIF_MCCK_GUEST 6 /* machine check happening in guest */
22 #define CIF_DEDICATED_CPU 7 /* this CPU is dedicated */
24 #define _CIF_NOHZ_DELAY BIT(CIF_NOHZ_DELAY)
25 #define _CIF_FPU BIT(CIF_FPU)
26 #define _CIF_IGNORE_IRQ BIT(CIF_IGNORE_IRQ)
27 #define _CIF_ENABLED_WAIT BIT(CIF_ENABLED_WAIT)
28 #define _CIF_MCCK_GUEST BIT(CIF_MCCK_GUEST)
29 #define _CIF_DEDICATED_CPU BIT(CIF_DEDICATED_CPU)
33 #include <linux/cpumask.h>
34 #include <linux/linkage.h>
35 #include <linux/irqflags.h>
38 #include <asm/ptrace.h>
39 #include <asm/setup.h>
40 #include <asm/runtime_instr.h>
41 #include <asm/fpu/types.h>
42 #include <asm/fpu/internal.h>
44 static inline void set_cpu_flag(int flag)
46 S390_lowcore.cpu_flags |= (1UL << flag);
49 static inline void clear_cpu_flag(int flag)
51 S390_lowcore.cpu_flags &= ~(1UL << flag);
54 static inline int test_cpu_flag(int flag)
56 return !!(S390_lowcore.cpu_flags & (1UL << flag));
60 * Test CIF flag of another CPU. The caller needs to ensure that
61 * CPU hotplug can not happen, e.g. by disabling preemption.
63 static inline int test_cpu_flag_of(int flag, int cpu)
65 struct lowcore *lc = lowcore_ptr[cpu];
66 return !!(lc->cpu_flags & (1UL << flag));
69 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
71 static inline void get_cpu_id(struct cpuid *ptr)
73 asm volatile("stidp %0" : "=Q" (*ptr));
76 void s390_adjust_jiffies(void);
77 void s390_update_cpu_mhz(void);
78 void cpu_detect_mhz_feature(void);
80 extern const struct seq_operations cpuinfo_op;
81 extern void execve_tail(void);
82 extern void __bpon(void);
85 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
88 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \
89 _REGION3_SIZE : TASK_SIZE_MAX)
90 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
91 (_REGION3_SIZE >> 1) : (_REGION2_SIZE >> 1))
92 #define TASK_SIZE TASK_SIZE_OF(current)
93 #define TASK_SIZE_MAX (-PAGE_SIZE)
95 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \
96 _REGION3_SIZE : _REGION2_SIZE)
97 #define STACK_TOP_MAX _REGION2_SIZE
99 #define HAVE_ARCH_PICK_MMAP_LAYOUT
104 struct thread_struct {
105 unsigned int acrs[NUM_ACRS];
106 unsigned long ksp; /* kernel stack pointer */
107 unsigned long user_timer; /* task cputime in user space */
108 unsigned long guest_timer; /* task cputime in kvm guest */
109 unsigned long system_timer; /* task cputime in kernel space */
110 unsigned long hardirq_timer; /* task cputime in hardirq context */
111 unsigned long softirq_timer; /* task cputime in softirq context */
112 unsigned long sys_call_table; /* system call table address */
113 unsigned long gmap_addr; /* address of last gmap fault. */
114 unsigned int gmap_write_flag; /* gmap fault write indication */
115 unsigned int gmap_int_code; /* int code of last gmap fault */
116 unsigned int gmap_pfault; /* signal of a pending guest pfault */
117 /* Per-thread information related to debugging */
118 struct per_regs per_user; /* User specified PER registers */
119 struct per_event per_event; /* Cause of the last PER trap */
120 unsigned long per_flags; /* Flags to control debug behavior */
121 unsigned int system_call; /* system call number in signal */
122 unsigned long last_break; /* last breaking-event-address. */
123 /* pfault_wait is used to block the process on a pfault event */
124 unsigned long pfault_wait;
125 struct list_head list;
126 /* cpu runtime instrumentation */
127 struct runtime_instr_cb *ri_cb;
128 struct gs_cb *gs_cb; /* Current guarded storage cb */
129 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */
130 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
132 * Warning: 'fpu' is dynamically-sized. It *MUST* be at
135 struct fpu fpu; /* FP and VX register save area */
138 /* Flag to disable transactions. */
139 #define PER_FLAG_NO_TE 1UL
140 /* Flag to enable random transaction aborts. */
141 #define PER_FLAG_TE_ABORT_RAND 2UL
142 /* Flag to specify random transaction abort mode:
143 * - abort each transaction at a random instruction before TEND if set.
144 * - abort random transactions at a random instruction if cleared.
146 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
148 typedef struct thread_struct thread_struct;
150 #define ARCH_MIN_TASKALIGN 8
152 #define INIT_THREAD { \
153 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
154 .fpu.regs = (void *) init_task.thread.fpu.fprs, \
159 * Do necessary setup to start up a new thread.
161 #define start_thread(regs, new_psw, new_stackp) do { \
162 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
163 regs->psw.addr = new_psw; \
164 regs->gprs[15] = new_stackp; \
168 #define start_thread31(regs, new_psw, new_stackp) do { \
169 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
170 regs->psw.addr = new_psw; \
171 regs->gprs[15] = new_stackp; \
175 /* Forward declaration, a strange C thing */
181 void show_registers(struct pt_regs *regs);
182 void show_cacheinfo(struct seq_file *m);
184 /* Free all resources held by a thread. */
185 static inline void release_thread(struct task_struct *tsk) { }
187 /* Free guarded storage control block */
188 void guarded_storage_release(struct task_struct *tsk);
190 unsigned long get_wchan(struct task_struct *p);
191 #define task_pt_regs(tsk) ((struct pt_regs *) \
192 (task_stack_page(tsk) + THREAD_SIZE) - 1)
193 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
194 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
196 /* Has task runtime instrumentation enabled ? */
197 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
199 static __always_inline unsigned long current_stack_pointer(void)
203 asm volatile("la %0,0(15)" : "=a" (sp));
207 static __no_kasan_or_inline unsigned short stap(void)
209 unsigned short cpu_address;
211 asm volatile("stap %0" : "=Q" (cpu_address));
215 #define cpu_relax() barrier()
217 #define ECAG_CACHE_ATTRIBUTE 0
218 #define ECAG_CPU_ATTRIBUTE 1
220 static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
224 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
225 : "=d" (val) : "a" (asi << 8 | parm));
229 static inline void psw_set_key(unsigned int key)
231 asm volatile("spka 0(%0)" : : "d" (key));
235 * Set PSW to specified value.
237 static inline void __load_psw(psw_t psw)
239 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
243 * Set PSW mask to specified value, while leaving the
244 * PSW addr pointing to the next instruction.
246 static __no_kasan_or_inline void __load_psw_mask(unsigned long mask)
258 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc");
262 * Extract current PSW mask
264 static inline unsigned long __extract_psw(void)
266 unsigned int reg1, reg2;
268 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
269 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
272 static inline void local_mcck_enable(void)
274 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
277 static inline void local_mcck_disable(void)
279 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
283 * Rewind PSW instruction address by specified number of bytes.
285 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
289 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
290 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
292 return (psw.addr - ilc) & mask;
296 * Function to stop a processor until the next interrupt occurs
298 void enabled_wait(void);
301 * Function to drop a processor into disabled wait state
303 static __always_inline void __noreturn disabled_wait(void)
307 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
308 psw.addr = _THIS_IP_;
314 * Basic Program Check Handler.
316 extern void s390_base_pgm_handler(void);
317 extern void (*s390_base_pgm_handler_fn)(void);
319 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
321 extern int memcpy_real(void *, void *, size_t);
322 extern void memcpy_absolute(void *, void *, size_t);
324 #define mem_assign_absolute(dest, val) do { \
325 __typeof__(dest) __tmp = (val); \
327 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
328 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
331 extern int s390_isolate_bp(void);
332 extern int s390_isolate_bp_guest(void);
334 #endif /* __ASSEMBLY__ */
336 #endif /* __ASM_S390_PROCESSOR_H */