1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright IBM Corp. 1999, 2000
5 * Author(s): Hartmut Penner (hp@de.ibm.com)
6 * Ulrich Weigand (weigand@de.ibm.com)
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 * Derived from "include/asm-i386/pgtable.h"
12 #ifndef _ASM_S390_PGTABLE_H
13 #define _ASM_S390_PGTABLE_H
15 #include <linux/sched.h>
16 #include <linux/mm_types.h>
17 #include <linux/page-flags.h>
18 #include <linux/radix-tree.h>
19 #include <linux/atomic.h>
23 extern pgd_t swapper_pg_dir[];
24 extern void paging_init(void);
33 extern atomic_long_t direct_pages_count[PG_DIRECT_MAP_MAX];
35 static inline void update_page_count(int level, long count)
37 if (IS_ENABLED(CONFIG_PROC_FS))
38 atomic_long_add(count, &direct_pages_count[level]);
42 void arch_report_meminfo(struct seq_file *m);
45 * The S390 doesn't have any external MMU info: the kernel page
46 * tables contain all the necessary information.
48 #define update_mmu_cache(vma, address, ptep) do { } while (0)
49 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
52 * ZERO_PAGE is a global shared page that is always zero; used
53 * for zero-mapped memory areas etc..
56 extern unsigned long empty_zero_page;
57 extern unsigned long zero_page_mask;
59 #define ZERO_PAGE(vaddr) \
60 (virt_to_page((void *)(empty_zero_page + \
61 (((unsigned long)(vaddr)) &zero_page_mask))))
62 #define __HAVE_COLOR_ZERO_PAGE
64 /* TODO: s390 cannot support io_remap_pfn_range... */
66 #define FIRST_USER_ADDRESS 0UL
68 #define pte_ERROR(e) \
69 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
70 #define pmd_ERROR(e) \
71 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
72 #define pud_ERROR(e) \
73 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
74 #define p4d_ERROR(e) \
75 printk("%s:%d: bad p4d %p.\n", __FILE__, __LINE__, (void *) p4d_val(e))
76 #define pgd_ERROR(e) \
77 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
80 * The vmalloc and module area will always be on the topmost area of the
81 * kernel mapping. We reserve 128GB (64bit) for vmalloc and modules.
82 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
83 * modules will reside. That makes sure that inter module branches always
84 * happen without trampolines and in addition the placement within a 2GB frame
85 * is branch prediction unit friendly.
87 extern unsigned long VMALLOC_START;
88 extern unsigned long VMALLOC_END;
89 extern struct page *vmemmap;
91 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
93 extern unsigned long MODULES_VADDR;
94 extern unsigned long MODULES_END;
95 #define MODULES_VADDR MODULES_VADDR
96 #define MODULES_END MODULES_END
97 #define MODULES_LEN (1UL << 31)
99 static inline int is_module_addr(void *addr)
101 BUILD_BUG_ON(MODULES_LEN > (1UL << 31));
102 if (addr < (void *)MODULES_VADDR)
104 if (addr > (void *)MODULES_END)
110 * A 64 bit pagetable entry of S390 has following format:
112 * 0000000000111111111122222222223333333333444444444455555555556666
113 * 0123456789012345678901234567890123456789012345678901234567890123
115 * I Page-Invalid Bit: Page is not available for address-translation
116 * P Page-Protection Bit: Store access not possible for page
117 * C Change-bit override: HW is not required to set change bit
119 * A 64 bit segmenttable entry of S390 has following format:
120 * | P-table origin | TT
121 * 0000000000111111111122222222223333333333444444444455555555556666
122 * 0123456789012345678901234567890123456789012345678901234567890123
124 * I Segment-Invalid Bit: Segment is not available for address-translation
125 * C Common-Segment Bit: Segment is not private (PoP 3-30)
126 * P Page-Protection Bit: Store access not possible for page
129 * A 64 bit region table entry of S390 has following format:
130 * | S-table origin | TF TTTL
131 * 0000000000111111111122222222223333333333444444444455555555556666
132 * 0123456789012345678901234567890123456789012345678901234567890123
134 * I Segment-Invalid Bit: Segment is not available for address-translation
139 * The 64 bit regiontable origin of S390 has following format:
140 * | region table origon | DTTL
141 * 0000000000111111111122222222223333333333444444444455555555556666
142 * 0123456789012345678901234567890123456789012345678901234567890123
144 * X Space-Switch event:
145 * G Segment-Invalid Bit:
146 * P Private-Space Bit:
147 * S Storage-Alteration:
151 * A storage key has the following format:
155 * F : fetch protection bit
160 /* Hardware bits in the page table entry */
161 #define _PAGE_NOEXEC 0x100 /* HW no-execute bit */
162 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
163 #define _PAGE_INVALID 0x400 /* HW invalid bit */
164 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
166 /* Software bits in the page table entry */
167 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
168 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
169 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
170 #define _PAGE_READ 0x010 /* SW pte read bit */
171 #define _PAGE_WRITE 0x020 /* SW pte write bit */
172 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
173 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
175 #ifdef CONFIG_MEM_SOFT_DIRTY
176 #define _PAGE_SOFT_DIRTY 0x002 /* SW pte soft dirty bit */
178 #define _PAGE_SOFT_DIRTY 0x000
181 /* Set of bits not changed in pte_modify */
182 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_DIRTY | \
183 _PAGE_YOUNG | _PAGE_SOFT_DIRTY)
186 * handle_pte_fault uses pte_present and pte_none to find out the pte type
187 * WITHOUT holding the page table lock. The _PAGE_PRESENT bit is used to
188 * distinguish present from not-present ptes. It is changed only with the page
191 * The following table gives the different possible bit combinations for
192 * the pte hardware and software bits in the last 12 bits of a pte
193 * (. unassigned bit, x don't care, t swap type):
201 * prot-none, clean, old .11.xx0000.1
202 * prot-none, clean, young .11.xx0001.1
203 * prot-none, dirty, old .11.xx0010.1
204 * prot-none, dirty, young .11.xx0011.1
205 * read-only, clean, old .11.xx0100.1
206 * read-only, clean, young .01.xx0101.1
207 * read-only, dirty, old .11.xx0110.1
208 * read-only, dirty, young .01.xx0111.1
209 * read-write, clean, old .11.xx1100.1
210 * read-write, clean, young .01.xx1101.1
211 * read-write, dirty, old .10.xx1110.1
212 * read-write, dirty, young .00.xx1111.1
213 * HW-bits: R read-only, I invalid
214 * SW-bits: p present, y young, d dirty, r read, w write, s special,
217 * pte_none is true for the bit pattern .10.00000000, pte == 0x400
218 * pte_swap is true for the bit pattern .11..ooooo.0, (pte & 0x201) == 0x200
219 * pte_present is true for the bit pattern .xx.xxxxxx.1, (pte & 0x001) == 0x001
222 /* Bits in the segment/region table address-space-control-element */
223 #define _ASCE_ORIGIN ~0xfffUL/* region/segment table origin */
224 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
225 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
226 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
227 #define _ASCE_REAL_SPACE 0x20 /* real space control */
228 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
229 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
230 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
231 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
232 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
233 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
235 /* Bits in the region table entry */
236 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
237 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
238 #define _REGION_ENTRY_NOEXEC 0x100 /* region no-execute bit */
239 #define _REGION_ENTRY_OFFSET 0xc0 /* region table offset */
240 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
241 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
242 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
243 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
244 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
245 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
247 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
248 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
249 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
250 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
251 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
252 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
254 #define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */
255 #define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */
256 #define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */
257 #define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */
258 #define _REGION3_ENTRY_READ 0x0002 /* SW region read bit */
259 #define _REGION3_ENTRY_WRITE 0x0001 /* SW region write bit */
261 #ifdef CONFIG_MEM_SOFT_DIRTY
262 #define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */
264 #define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */
267 #define _REGION_ENTRY_BITS 0xfffffffffffff22fUL
268 #define _REGION_ENTRY_BITS_LARGE 0xffffffff8000fe2fUL
270 /* Bits in the segment table entry */
271 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
272 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
273 #define _SEGMENT_ENTRY_HARDWARE_BITS 0xfffffffffffffe30UL
274 #define _SEGMENT_ENTRY_HARDWARE_BITS_LARGE 0xfffffffffff00730UL
275 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
276 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* page table origin */
277 #define _SEGMENT_ENTRY_PROTECT 0x200 /* segment protection bit */
278 #define _SEGMENT_ENTRY_NOEXEC 0x100 /* segment no-execute bit */
279 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
281 #define _SEGMENT_ENTRY (0)
282 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
284 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
285 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
286 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
287 #define _SEGMENT_ENTRY_WRITE 0x0002 /* SW segment write bit */
288 #define _SEGMENT_ENTRY_READ 0x0001 /* SW segment read bit */
290 #ifdef CONFIG_MEM_SOFT_DIRTY
291 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */
293 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
296 #define _CRST_ENTRIES 2048 /* number of region/segment table entries */
297 #define _PAGE_ENTRIES 256 /* number of page table entries */
299 #define _CRST_TABLE_SIZE (_CRST_ENTRIES * 8)
300 #define _PAGE_TABLE_SIZE (_PAGE_ENTRIES * 8)
302 #define _REGION1_SHIFT 53
303 #define _REGION2_SHIFT 42
304 #define _REGION3_SHIFT 31
305 #define _SEGMENT_SHIFT 20
307 #define _REGION1_INDEX (0x7ffUL << _REGION1_SHIFT)
308 #define _REGION2_INDEX (0x7ffUL << _REGION2_SHIFT)
309 #define _REGION3_INDEX (0x7ffUL << _REGION3_SHIFT)
310 #define _SEGMENT_INDEX (0x7ffUL << _SEGMENT_SHIFT)
311 #define _PAGE_INDEX (0xffUL << _PAGE_SHIFT)
313 #define _REGION1_SIZE (1UL << _REGION1_SHIFT)
314 #define _REGION2_SIZE (1UL << _REGION2_SHIFT)
315 #define _REGION3_SIZE (1UL << _REGION3_SHIFT)
316 #define _SEGMENT_SIZE (1UL << _SEGMENT_SHIFT)
318 #define _REGION1_MASK (~(_REGION1_SIZE - 1))
319 #define _REGION2_MASK (~(_REGION2_SIZE - 1))
320 #define _REGION3_MASK (~(_REGION3_SIZE - 1))
321 #define _SEGMENT_MASK (~(_SEGMENT_SIZE - 1))
323 #define PMD_SHIFT _SEGMENT_SHIFT
324 #define PUD_SHIFT _REGION3_SHIFT
325 #define P4D_SHIFT _REGION2_SHIFT
326 #define PGDIR_SHIFT _REGION1_SHIFT
328 #define PMD_SIZE _SEGMENT_SIZE
329 #define PUD_SIZE _REGION3_SIZE
330 #define P4D_SIZE _REGION2_SIZE
331 #define PGDIR_SIZE _REGION1_SIZE
333 #define PMD_MASK _SEGMENT_MASK
334 #define PUD_MASK _REGION3_MASK
335 #define P4D_MASK _REGION2_MASK
336 #define PGDIR_MASK _REGION1_MASK
338 #define PTRS_PER_PTE _PAGE_ENTRIES
339 #define PTRS_PER_PMD _CRST_ENTRIES
340 #define PTRS_PER_PUD _CRST_ENTRIES
341 #define PTRS_PER_P4D _CRST_ENTRIES
342 #define PTRS_PER_PGD _CRST_ENTRIES
344 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
347 * Segment table and region3 table entry encoding
348 * (R = read-only, I = invalid, y = young bit):
350 * prot-none, clean, old 00..1...1...00
351 * prot-none, clean, young 01..1...1...00
352 * prot-none, dirty, old 10..1...1...00
353 * prot-none, dirty, young 11..1...1...00
354 * read-only, clean, old 00..1...1...01
355 * read-only, clean, young 01..1...0...01
356 * read-only, dirty, old 10..1...1...01
357 * read-only, dirty, young 11..1...0...01
358 * read-write, clean, old 00..1...1...11
359 * read-write, clean, young 01..1...0...11
360 * read-write, dirty, old 10..0...1...11
361 * read-write, dirty, young 11..0...0...11
362 * The segment table origin is used to distinguish empty (origin==0) from
363 * read-write, old segment table entries (origin!=0)
364 * HW-bits: R read-only, I invalid
365 * SW-bits: y young, d dirty, r read, w write
368 /* Page status table bits for virtualization */
369 #define PGSTE_ACC_BITS 0xf000000000000000UL
370 #define PGSTE_FP_BIT 0x0800000000000000UL
371 #define PGSTE_PCL_BIT 0x0080000000000000UL
372 #define PGSTE_HR_BIT 0x0040000000000000UL
373 #define PGSTE_HC_BIT 0x0020000000000000UL
374 #define PGSTE_GR_BIT 0x0004000000000000UL
375 #define PGSTE_GC_BIT 0x0002000000000000UL
376 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
377 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
378 #define PGSTE_VSIE_BIT 0x0000200000000000UL /* ref'd in a shadow table */
380 /* Guest Page State used for virtualization */
381 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
382 #define _PGSTE_GPS_NODAT 0x0000000040000000UL
383 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
384 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
385 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
386 #define _PGSTE_GPS_USAGE_POT_VOLATILE 0x0000000002000000UL
387 #define _PGSTE_GPS_USAGE_VOLATILE _PGSTE_GPS_USAGE_MASK
390 * A user page table pointer has the space-switch-event bit, the
391 * private-space-control bit and the storage-alteration-event-control
392 * bit set. A kernel page table pointer doesn't need them.
394 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
398 * Page protection definitions.
400 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID | _PAGE_PROTECT)
401 #define PAGE_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | \
402 _PAGE_NOEXEC | _PAGE_INVALID | _PAGE_PROTECT)
403 #define PAGE_RX __pgprot(_PAGE_PRESENT | _PAGE_READ | \
404 _PAGE_INVALID | _PAGE_PROTECT)
405 #define PAGE_RW __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
406 _PAGE_NOEXEC | _PAGE_INVALID | _PAGE_PROTECT)
407 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
408 _PAGE_INVALID | _PAGE_PROTECT)
410 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
411 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
412 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
413 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
414 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
415 _PAGE_PROTECT | _PAGE_NOEXEC)
416 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
417 _PAGE_YOUNG | _PAGE_DIRTY)
420 * On s390 the page table entry has an invalid bit and a read-only bit.
421 * Read permission implies execute permission and write permission
422 * implies read permission.
425 #define __P000 PAGE_NONE
426 #define __P001 PAGE_RO
427 #define __P010 PAGE_RO
428 #define __P011 PAGE_RO
429 #define __P100 PAGE_RX
430 #define __P101 PAGE_RX
431 #define __P110 PAGE_RX
432 #define __P111 PAGE_RX
434 #define __S000 PAGE_NONE
435 #define __S001 PAGE_RO
436 #define __S010 PAGE_RW
437 #define __S011 PAGE_RW
438 #define __S100 PAGE_RX
439 #define __S101 PAGE_RX
440 #define __S110 PAGE_RWX
441 #define __S111 PAGE_RWX
444 * Segment entry (large page) protection definitions.
446 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
447 _SEGMENT_ENTRY_PROTECT)
448 #define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PROTECT | \
449 _SEGMENT_ENTRY_READ | \
450 _SEGMENT_ENTRY_NOEXEC)
451 #define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PROTECT | \
453 #define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_READ | \
454 _SEGMENT_ENTRY_WRITE | \
455 _SEGMENT_ENTRY_NOEXEC)
456 #define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_READ | \
457 _SEGMENT_ENTRY_WRITE)
458 #define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \
459 _SEGMENT_ENTRY_LARGE | \
460 _SEGMENT_ENTRY_READ | \
461 _SEGMENT_ENTRY_WRITE | \
462 _SEGMENT_ENTRY_YOUNG | \
463 _SEGMENT_ENTRY_DIRTY | \
464 _SEGMENT_ENTRY_NOEXEC)
465 #define SEGMENT_KERNEL_RO __pgprot(_SEGMENT_ENTRY | \
466 _SEGMENT_ENTRY_LARGE | \
467 _SEGMENT_ENTRY_READ | \
468 _SEGMENT_ENTRY_YOUNG | \
469 _SEGMENT_ENTRY_PROTECT | \
470 _SEGMENT_ENTRY_NOEXEC)
471 #define SEGMENT_KERNEL_EXEC __pgprot(_SEGMENT_ENTRY | \
472 _SEGMENT_ENTRY_LARGE | \
473 _SEGMENT_ENTRY_READ | \
474 _SEGMENT_ENTRY_WRITE | \
475 _SEGMENT_ENTRY_YOUNG | \
476 _SEGMENT_ENTRY_DIRTY)
479 * Region3 entry (large page) protection definitions.
482 #define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \
483 _REGION3_ENTRY_LARGE | \
484 _REGION3_ENTRY_READ | \
485 _REGION3_ENTRY_WRITE | \
486 _REGION3_ENTRY_YOUNG | \
487 _REGION3_ENTRY_DIRTY | \
488 _REGION_ENTRY_NOEXEC)
489 #define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \
490 _REGION3_ENTRY_LARGE | \
491 _REGION3_ENTRY_READ | \
492 _REGION3_ENTRY_YOUNG | \
493 _REGION_ENTRY_PROTECT | \
494 _REGION_ENTRY_NOEXEC)
496 static inline int mm_has_pgste(struct mm_struct *mm)
499 if (unlikely(mm->context.has_pgste))
505 static inline int mm_alloc_pgste(struct mm_struct *mm)
508 if (unlikely(mm->context.alloc_pgste))
515 * In the case that a guest uses storage keys
516 * faults should no longer be backed by zero pages
518 #define mm_forbids_zeropage mm_has_pgste
519 static inline int mm_uses_skeys(struct mm_struct *mm)
522 if (mm->context.uses_skeys)
528 static inline void csp(unsigned int *ptr, unsigned int old, unsigned int new)
530 register unsigned long reg2 asm("2") = old;
531 register unsigned long reg3 asm("3") = new;
532 unsigned long address = (unsigned long)ptr | 1;
536 : "+d" (reg2), "+m" (*ptr)
537 : "d" (reg3), "d" (address)
541 static inline void cspg(unsigned long *ptr, unsigned long old, unsigned long new)
543 register unsigned long reg2 asm("2") = old;
544 register unsigned long reg3 asm("3") = new;
545 unsigned long address = (unsigned long)ptr | 1;
548 " .insn rre,0xb98a0000,%0,%3"
549 : "+d" (reg2), "+m" (*ptr)
550 : "d" (reg3), "d" (address)
554 #define CRDTE_DTT_PAGE 0x00UL
555 #define CRDTE_DTT_SEGMENT 0x10UL
556 #define CRDTE_DTT_REGION3 0x14UL
557 #define CRDTE_DTT_REGION2 0x18UL
558 #define CRDTE_DTT_REGION1 0x1cUL
560 static inline void crdte(unsigned long old, unsigned long new,
561 unsigned long table, unsigned long dtt,
562 unsigned long address, unsigned long asce)
564 register unsigned long reg2 asm("2") = old;
565 register unsigned long reg3 asm("3") = new;
566 register unsigned long reg4 asm("4") = table | dtt;
567 register unsigned long reg5 asm("5") = address;
569 asm volatile(".insn rrf,0xb98f0000,%0,%2,%4,0"
571 : "d" (reg3), "d" (reg4), "d" (reg5), "a" (asce)
576 * pgd/p4d/pud/pmd/pte query functions
578 static inline int pgd_folded(pgd_t pgd)
580 return (pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R1;
583 static inline int pgd_present(pgd_t pgd)
587 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
590 static inline int pgd_none(pgd_t pgd)
594 return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
597 static inline int pgd_bad(pgd_t pgd)
600 * With dynamic page table levels the pgd can be a region table
601 * entry or a segment table entry. Check for the bit that are
602 * invalid for either table entry.
605 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
606 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
607 return (pgd_val(pgd) & mask) != 0;
610 static inline unsigned long pgd_pfn(pgd_t pgd)
612 unsigned long origin_mask;
614 origin_mask = _REGION_ENTRY_ORIGIN;
615 return (pgd_val(pgd) & origin_mask) >> PAGE_SHIFT;
618 static inline int p4d_folded(p4d_t p4d)
620 return (p4d_val(p4d) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2;
623 static inline int p4d_present(p4d_t p4d)
627 return (p4d_val(p4d) & _REGION_ENTRY_ORIGIN) != 0UL;
630 static inline int p4d_none(p4d_t p4d)
634 return p4d_val(p4d) == _REGION2_ENTRY_EMPTY;
637 static inline unsigned long p4d_pfn(p4d_t p4d)
639 unsigned long origin_mask;
641 origin_mask = _REGION_ENTRY_ORIGIN;
642 return (p4d_val(p4d) & origin_mask) >> PAGE_SHIFT;
645 static inline int pud_folded(pud_t pud)
647 return (pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3;
650 static inline int pud_present(pud_t pud)
654 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
657 static inline int pud_none(pud_t pud)
661 return pud_val(pud) == _REGION3_ENTRY_EMPTY;
664 static inline int pud_large(pud_t pud)
666 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
668 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
671 static inline unsigned long pud_pfn(pud_t pud)
673 unsigned long origin_mask;
675 origin_mask = _REGION_ENTRY_ORIGIN;
677 origin_mask = _REGION3_ENTRY_ORIGIN_LARGE;
678 return (pud_val(pud) & origin_mask) >> PAGE_SHIFT;
681 static inline int pmd_large(pmd_t pmd)
683 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
686 static inline int pmd_bad(pmd_t pmd)
689 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
690 return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
693 static inline int pud_bad(pud_t pud)
695 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
696 return pmd_bad(__pmd(pud_val(pud)));
698 return (pud_val(pud) & ~_REGION_ENTRY_BITS_LARGE) != 0;
699 return (pud_val(pud) & ~_REGION_ENTRY_BITS) != 0;
702 static inline int p4d_bad(p4d_t p4d)
704 if ((p4d_val(p4d) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
705 return pud_bad(__pud(p4d_val(p4d)));
706 return (p4d_val(p4d) & ~_REGION_ENTRY_BITS) != 0;
709 static inline int pmd_present(pmd_t pmd)
711 return pmd_val(pmd) != _SEGMENT_ENTRY_EMPTY;
714 static inline int pmd_none(pmd_t pmd)
716 return pmd_val(pmd) == _SEGMENT_ENTRY_EMPTY;
719 static inline unsigned long pmd_pfn(pmd_t pmd)
721 unsigned long origin_mask;
723 origin_mask = _SEGMENT_ENTRY_ORIGIN;
725 origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
726 return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
729 #define pmd_write pmd_write
730 static inline int pmd_write(pmd_t pmd)
732 return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
735 static inline int pmd_dirty(pmd_t pmd)
739 dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
743 static inline int pmd_young(pmd_t pmd)
747 young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
751 static inline int pte_present(pte_t pte)
753 /* Bit pattern: (pte & 0x001) == 0x001 */
754 return (pte_val(pte) & _PAGE_PRESENT) != 0;
757 static inline int pte_none(pte_t pte)
759 /* Bit pattern: pte == 0x400 */
760 return pte_val(pte) == _PAGE_INVALID;
763 static inline int pte_swap(pte_t pte)
765 /* Bit pattern: (pte & 0x201) == 0x200 */
766 return (pte_val(pte) & (_PAGE_PROTECT | _PAGE_PRESENT))
770 static inline int pte_special(pte_t pte)
772 return (pte_val(pte) & _PAGE_SPECIAL);
775 #define __HAVE_ARCH_PTE_SAME
776 static inline int pte_same(pte_t a, pte_t b)
778 return pte_val(a) == pte_val(b);
781 #ifdef CONFIG_NUMA_BALANCING
782 static inline int pte_protnone(pte_t pte)
784 return pte_present(pte) && !(pte_val(pte) & _PAGE_READ);
787 static inline int pmd_protnone(pmd_t pmd)
789 /* pmd_large(pmd) implies pmd_present(pmd) */
790 return pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_READ);
794 static inline int pte_soft_dirty(pte_t pte)
796 return pte_val(pte) & _PAGE_SOFT_DIRTY;
798 #define pte_swp_soft_dirty pte_soft_dirty
800 static inline pte_t pte_mksoft_dirty(pte_t pte)
802 pte_val(pte) |= _PAGE_SOFT_DIRTY;
805 #define pte_swp_mksoft_dirty pte_mksoft_dirty
807 static inline pte_t pte_clear_soft_dirty(pte_t pte)
809 pte_val(pte) &= ~_PAGE_SOFT_DIRTY;
812 #define pte_swp_clear_soft_dirty pte_clear_soft_dirty
814 static inline int pmd_soft_dirty(pmd_t pmd)
816 return pmd_val(pmd) & _SEGMENT_ENTRY_SOFT_DIRTY;
819 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
821 pmd_val(pmd) |= _SEGMENT_ENTRY_SOFT_DIRTY;
825 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
827 pmd_val(pmd) &= ~_SEGMENT_ENTRY_SOFT_DIRTY;
832 * query functions pte_write/pte_dirty/pte_young only work if
833 * pte_present() is true. Undefined behaviour if not..
835 static inline int pte_write(pte_t pte)
837 return (pte_val(pte) & _PAGE_WRITE) != 0;
840 static inline int pte_dirty(pte_t pte)
842 return (pte_val(pte) & _PAGE_DIRTY) != 0;
845 static inline int pte_young(pte_t pte)
847 return (pte_val(pte) & _PAGE_YOUNG) != 0;
850 #define __HAVE_ARCH_PTE_UNUSED
851 static inline int pte_unused(pte_t pte)
853 return pte_val(pte) & _PAGE_UNUSED;
857 * pgd/pmd/pte modification functions
860 static inline void pgd_clear(pgd_t *pgd)
862 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R1)
863 pgd_val(*pgd) = _REGION1_ENTRY_EMPTY;
866 static inline void p4d_clear(p4d_t *p4d)
868 if ((p4d_val(*p4d) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
869 p4d_val(*p4d) = _REGION2_ENTRY_EMPTY;
872 static inline void pud_clear(pud_t *pud)
874 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
875 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
878 static inline void pmd_clear(pmd_t *pmdp)
880 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
883 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
885 pte_val(*ptep) = _PAGE_INVALID;
889 * The following pte modification functions only work if
890 * pte_present() is true. Undefined behaviour if not..
892 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
894 pte_val(pte) &= _PAGE_CHG_MASK;
895 pte_val(pte) |= pgprot_val(newprot);
897 * newprot for PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX
898 * has the invalid bit set, clear it again for readable, young pages
900 if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
901 pte_val(pte) &= ~_PAGE_INVALID;
903 * newprot for PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX has the page
904 * protection bit set, clear it again for writable, dirty pages
906 if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
907 pte_val(pte) &= ~_PAGE_PROTECT;
911 static inline pte_t pte_wrprotect(pte_t pte)
913 pte_val(pte) &= ~_PAGE_WRITE;
914 pte_val(pte) |= _PAGE_PROTECT;
918 static inline pte_t pte_mkwrite(pte_t pte)
920 pte_val(pte) |= _PAGE_WRITE;
921 if (pte_val(pte) & _PAGE_DIRTY)
922 pte_val(pte) &= ~_PAGE_PROTECT;
926 static inline pte_t pte_mkclean(pte_t pte)
928 pte_val(pte) &= ~_PAGE_DIRTY;
929 pte_val(pte) |= _PAGE_PROTECT;
933 static inline pte_t pte_mkdirty(pte_t pte)
935 pte_val(pte) |= _PAGE_DIRTY | _PAGE_SOFT_DIRTY;
936 if (pte_val(pte) & _PAGE_WRITE)
937 pte_val(pte) &= ~_PAGE_PROTECT;
941 static inline pte_t pte_mkold(pte_t pte)
943 pte_val(pte) &= ~_PAGE_YOUNG;
944 pte_val(pte) |= _PAGE_INVALID;
948 static inline pte_t pte_mkyoung(pte_t pte)
950 pte_val(pte) |= _PAGE_YOUNG;
951 if (pte_val(pte) & _PAGE_READ)
952 pte_val(pte) &= ~_PAGE_INVALID;
956 static inline pte_t pte_mkspecial(pte_t pte)
958 pte_val(pte) |= _PAGE_SPECIAL;
962 #ifdef CONFIG_HUGETLB_PAGE
963 static inline pte_t pte_mkhuge(pte_t pte)
965 pte_val(pte) |= _PAGE_LARGE;
970 #define IPTE_GLOBAL 0
973 #define IPTE_NODAT 0x400
974 #define IPTE_GUEST_ASCE 0x800
976 static inline void __ptep_ipte(unsigned long address, pte_t *ptep,
977 unsigned long opt, unsigned long asce,
980 unsigned long pto = (unsigned long) ptep;
982 if (__builtin_constant_p(opt) && opt == 0) {
983 /* Invalidation + TLB flush for the pte */
985 " .insn rrf,0xb2210000,%[r1],%[r2],0,%[m4]"
986 : "+m" (*ptep) : [r1] "a" (pto), [r2] "a" (address),
991 /* Invalidate ptes with options + TLB flush of the ptes */
992 opt = opt | (asce & _ASCE_ORIGIN);
994 " .insn rrf,0xb2210000,%[r1],%[r2],%[r3],%[m4]"
995 : [r2] "+a" (address), [r3] "+a" (opt)
996 : [r1] "a" (pto), [m4] "i" (local) : "memory");
999 static inline void __ptep_ipte_range(unsigned long address, int nr,
1000 pte_t *ptep, int local)
1002 unsigned long pto = (unsigned long) ptep;
1004 /* Invalidate a range of ptes + TLB flush of the ptes */
1007 " .insn rrf,0xb2210000,%[r1],%[r2],%[r3],%[m4]"
1008 : [r2] "+a" (address), [r3] "+a" (nr)
1009 : [r1] "a" (pto), [m4] "i" (local) : "memory");
1010 } while (nr != 255);
1014 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1015 * both clear the TLB for the unmapped pte. The reason is that
1016 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1017 * to modify an active pte. The sequence is
1018 * 1) ptep_get_and_clear
1020 * 3) flush_tlb_range
1021 * On s390 the tlb needs to get flushed with the modification of the pte
1022 * if the pte is active. The only way how this can be implemented is to
1023 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1026 pte_t ptep_xchg_direct(struct mm_struct *, unsigned long, pte_t *, pte_t);
1027 pte_t ptep_xchg_lazy(struct mm_struct *, unsigned long, pte_t *, pte_t);
1029 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1030 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
1031 unsigned long addr, pte_t *ptep)
1035 pte = ptep_xchg_direct(vma->vm_mm, addr, ptep, pte_mkold(pte));
1036 return pte_young(pte);
1039 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1040 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
1041 unsigned long address, pte_t *ptep)
1043 return ptep_test_and_clear_young(vma, address, ptep);
1046 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1047 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1048 unsigned long addr, pte_t *ptep)
1050 return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
1053 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1054 pte_t ptep_modify_prot_start(struct mm_struct *, unsigned long, pte_t *);
1055 void ptep_modify_prot_commit(struct mm_struct *, unsigned long, pte_t *, pte_t);
1057 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1058 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1059 unsigned long addr, pte_t *ptep)
1061 return ptep_xchg_direct(vma->vm_mm, addr, ptep, __pte(_PAGE_INVALID));
1065 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1066 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1067 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1068 * cannot be accessed while the batched unmap is running. In this case
1069 * full==1 and a simple pte_clear is enough. See tlb.h.
1071 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1072 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1074 pte_t *ptep, int full)
1078 *ptep = __pte(_PAGE_INVALID);
1081 return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
1084 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1085 static inline void ptep_set_wrprotect(struct mm_struct *mm,
1086 unsigned long addr, pte_t *ptep)
1091 ptep_xchg_lazy(mm, addr, ptep, pte_wrprotect(pte));
1094 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1095 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1096 unsigned long addr, pte_t *ptep,
1097 pte_t entry, int dirty)
1099 if (pte_same(*ptep, entry))
1101 ptep_xchg_direct(vma->vm_mm, addr, ptep, entry);
1106 * Additional functions to handle KVM guest page tables
1108 void ptep_set_pte_at(struct mm_struct *mm, unsigned long addr,
1109 pte_t *ptep, pte_t entry);
1110 void ptep_set_notify(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1111 void ptep_notify(struct mm_struct *mm, unsigned long addr,
1112 pte_t *ptep, unsigned long bits);
1113 int ptep_force_prot(struct mm_struct *mm, unsigned long gaddr,
1114 pte_t *ptep, int prot, unsigned long bit);
1115 void ptep_zap_unused(struct mm_struct *mm, unsigned long addr,
1116 pte_t *ptep , int reset);
1117 void ptep_zap_key(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1118 int ptep_shadow_pte(struct mm_struct *mm, unsigned long saddr,
1119 pte_t *sptep, pte_t *tptep, pte_t pte);
1120 void ptep_unshadow_pte(struct mm_struct *mm, unsigned long saddr, pte_t *ptep);
1122 bool ptep_test_and_clear_uc(struct mm_struct *mm, unsigned long address,
1124 int set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1125 unsigned char key, bool nq);
1126 int cond_set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1127 unsigned char key, unsigned char *oldkey,
1128 bool nq, bool mr, bool mc);
1129 int reset_guest_reference_bit(struct mm_struct *mm, unsigned long addr);
1130 int get_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1131 unsigned char *key);
1133 int set_pgste_bits(struct mm_struct *mm, unsigned long addr,
1134 unsigned long bits, unsigned long value);
1135 int get_pgste(struct mm_struct *mm, unsigned long hva, unsigned long *pgstep);
1136 int pgste_perform_essa(struct mm_struct *mm, unsigned long hva, int orc,
1137 unsigned long *oldpte, unsigned long *oldpgste);
1138 void gmap_pmdp_csp(struct mm_struct *mm, unsigned long vmaddr);
1139 void gmap_pmdp_invalidate(struct mm_struct *mm, unsigned long vmaddr);
1140 void gmap_pmdp_idte_local(struct mm_struct *mm, unsigned long vmaddr);
1141 void gmap_pmdp_idte_global(struct mm_struct *mm, unsigned long vmaddr);
1144 * Certain architectures need to do special things when PTEs
1145 * within a page table are directly modified. Thus, the following
1146 * hook is made available.
1148 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1149 pte_t *ptep, pte_t entry)
1151 if (!MACHINE_HAS_NX)
1152 pte_val(entry) &= ~_PAGE_NOEXEC;
1153 if (pte_present(entry))
1154 pte_val(entry) &= ~_PAGE_UNUSED;
1155 if (mm_has_pgste(mm))
1156 ptep_set_pte_at(mm, addr, ptep, entry);
1162 * Conversion functions: convert a page and protection to a page entry,
1163 * and a page entry and page directory to the page they refer to.
1165 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1168 pte_val(__pte) = physpage + pgprot_val(pgprot);
1169 return pte_mkyoung(__pte);
1172 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1174 unsigned long physpage = page_to_phys(page);
1175 pte_t __pte = mk_pte_phys(physpage, pgprot);
1177 if (pte_write(__pte) && PageDirty(page))
1178 __pte = pte_mkdirty(__pte);
1182 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1183 #define p4d_index(address) (((address) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
1184 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1185 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1186 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1188 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1189 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1190 #define pgd_offset_raw(pgd, addr) ((pgd) + pgd_index(addr))
1192 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1193 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1194 #define p4d_deref(pud) (p4d_val(pud) & _REGION_ENTRY_ORIGIN)
1195 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1197 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
1199 p4d_t *p4d = (p4d_t *) pgd;
1201 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R1)
1202 p4d = (p4d_t *) pgd_deref(*pgd);
1203 return p4d + p4d_index(address);
1206 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
1208 pud_t *pud = (pud_t *) p4d;
1210 if ((p4d_val(*p4d) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1211 pud = (pud_t *) p4d_deref(*p4d);
1212 return pud + pud_index(address);
1215 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1217 pmd_t *pmd = (pmd_t *) pud;
1219 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1220 pmd = (pmd_t *) pud_deref(*pud);
1221 return pmd + pmd_index(address);
1224 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1225 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1226 #define pte_page(x) pfn_to_page(pte_pfn(x))
1228 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1229 #define pud_page(pud) pfn_to_page(pud_pfn(pud))
1230 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
1231 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
1233 /* Find an entry in the lowest level page table.. */
1234 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1235 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1236 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1237 #define pte_unmap(pte) do { } while (0)
1239 static inline pmd_t pmd_wrprotect(pmd_t pmd)
1241 pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1242 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1246 static inline pmd_t pmd_mkwrite(pmd_t pmd)
1248 pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1249 if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1251 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1255 static inline pmd_t pmd_mkclean(pmd_t pmd)
1257 if (pmd_large(pmd)) {
1258 pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1259 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1264 static inline pmd_t pmd_mkdirty(pmd_t pmd)
1266 if (pmd_large(pmd)) {
1267 pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY |
1268 _SEGMENT_ENTRY_SOFT_DIRTY;
1269 if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1270 pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1275 static inline pud_t pud_wrprotect(pud_t pud)
1277 pud_val(pud) &= ~_REGION3_ENTRY_WRITE;
1278 pud_val(pud) |= _REGION_ENTRY_PROTECT;
1282 static inline pud_t pud_mkwrite(pud_t pud)
1284 pud_val(pud) |= _REGION3_ENTRY_WRITE;
1285 if (pud_large(pud) && !(pud_val(pud) & _REGION3_ENTRY_DIRTY))
1287 pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1291 static inline pud_t pud_mkclean(pud_t pud)
1293 if (pud_large(pud)) {
1294 pud_val(pud) &= ~_REGION3_ENTRY_DIRTY;
1295 pud_val(pud) |= _REGION_ENTRY_PROTECT;
1300 static inline pud_t pud_mkdirty(pud_t pud)
1302 if (pud_large(pud)) {
1303 pud_val(pud) |= _REGION3_ENTRY_DIRTY |
1304 _REGION3_ENTRY_SOFT_DIRTY;
1305 if (pud_val(pud) & _REGION3_ENTRY_WRITE)
1306 pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1311 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1312 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1315 * pgprot is PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW or PAGE_RWX
1316 * (see __Pxxx / __Sxxx). Convert to segment table entry format.
1318 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1319 return pgprot_val(SEGMENT_NONE);
1320 if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1321 return pgprot_val(SEGMENT_RO);
1322 if (pgprot_val(pgprot) == pgprot_val(PAGE_RX))
1323 return pgprot_val(SEGMENT_RX);
1324 if (pgprot_val(pgprot) == pgprot_val(PAGE_RW))
1325 return pgprot_val(SEGMENT_RW);
1326 return pgprot_val(SEGMENT_RWX);
1329 static inline pmd_t pmd_mkyoung(pmd_t pmd)
1331 if (pmd_large(pmd)) {
1332 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1333 if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1334 pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1339 static inline pmd_t pmd_mkold(pmd_t pmd)
1341 if (pmd_large(pmd)) {
1342 pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1343 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1348 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1350 if (pmd_large(pmd)) {
1351 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1352 _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1353 _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SOFT_DIRTY;
1354 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1355 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1356 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1357 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1358 pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1361 pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1362 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1366 static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1369 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1373 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1375 static inline void __pmdp_csp(pmd_t *pmdp)
1377 csp((unsigned int *)pmdp + 1, pmd_val(*pmdp),
1378 pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID);
1381 #define IDTE_GLOBAL 0
1382 #define IDTE_LOCAL 1
1384 #define IDTE_PTOA 0x0800
1385 #define IDTE_NODAT 0x1000
1386 #define IDTE_GUEST_ASCE 0x2000
1388 static inline void __pmdp_idte(unsigned long addr, pmd_t *pmdp,
1389 unsigned long opt, unsigned long asce,
1394 sto = (unsigned long) pmdp - pmd_index(addr) * sizeof(pmd_t);
1395 if (__builtin_constant_p(opt) && opt == 0) {
1396 /* flush without guest asce */
1398 " .insn rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1400 : [r1] "a" (sto), [r2] "a" ((addr & HPAGE_MASK)),
1404 /* flush with guest asce */
1406 " .insn rrf,0xb98e0000,%[r1],%[r2],%[r3],%[m4]"
1408 : [r1] "a" (sto), [r2] "a" ((addr & HPAGE_MASK) | opt),
1409 [r3] "a" (asce), [m4] "i" (local)
1414 static inline void __pudp_idte(unsigned long addr, pud_t *pudp,
1415 unsigned long opt, unsigned long asce,
1420 r3o = (unsigned long) pudp - pud_index(addr) * sizeof(pud_t);
1421 r3o |= _ASCE_TYPE_REGION3;
1422 if (__builtin_constant_p(opt) && opt == 0) {
1423 /* flush without guest asce */
1425 " .insn rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1427 : [r1] "a" (r3o), [r2] "a" ((addr & PUD_MASK)),
1431 /* flush with guest asce */
1433 " .insn rrf,0xb98e0000,%[r1],%[r2],%[r3],%[m4]"
1435 : [r1] "a" (r3o), [r2] "a" ((addr & PUD_MASK) | opt),
1436 [r3] "a" (asce), [m4] "i" (local)
1441 pmd_t pmdp_xchg_direct(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1442 pmd_t pmdp_xchg_lazy(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1443 pud_t pudp_xchg_direct(struct mm_struct *, unsigned long, pud_t *, pud_t);
1445 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1447 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1448 void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1451 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1452 pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1454 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1455 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
1456 unsigned long addr, pmd_t *pmdp,
1457 pmd_t entry, int dirty)
1459 VM_BUG_ON(addr & ~HPAGE_MASK);
1461 entry = pmd_mkyoung(entry);
1463 entry = pmd_mkdirty(entry);
1464 if (pmd_val(*pmdp) == pmd_val(entry))
1466 pmdp_xchg_direct(vma->vm_mm, addr, pmdp, entry);
1470 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1471 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1472 unsigned long addr, pmd_t *pmdp)
1476 pmd = pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd_mkold(pmd));
1477 return pmd_young(pmd);
1480 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1481 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
1482 unsigned long addr, pmd_t *pmdp)
1484 VM_BUG_ON(addr & ~HPAGE_MASK);
1485 return pmdp_test_and_clear_young(vma, addr, pmdp);
1488 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1489 pmd_t *pmdp, pmd_t entry)
1491 if (!MACHINE_HAS_NX)
1492 pmd_val(entry) &= ~_SEGMENT_ENTRY_NOEXEC;
1496 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1498 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1499 pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1500 pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1504 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1505 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
1506 unsigned long addr, pmd_t *pmdp)
1508 return pmdp_xchg_direct(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
1511 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
1512 static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
1514 pmd_t *pmdp, int full)
1518 *pmdp = __pmd(_SEGMENT_ENTRY_EMPTY);
1521 return pmdp_xchg_lazy(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
1524 #define __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
1525 static inline pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
1526 unsigned long addr, pmd_t *pmdp)
1528 return pmdp_huge_get_and_clear(vma->vm_mm, addr, pmdp);
1531 #define __HAVE_ARCH_PMDP_INVALIDATE
1532 static inline pmd_t pmdp_invalidate(struct vm_area_struct *vma,
1533 unsigned long addr, pmd_t *pmdp)
1535 pmd_t pmd = __pmd(pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID);
1537 return pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd);
1540 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1541 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1542 unsigned long addr, pmd_t *pmdp)
1547 pmd = pmdp_xchg_lazy(mm, addr, pmdp, pmd_wrprotect(pmd));
1550 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
1551 unsigned long address,
1554 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
1556 #define pmdp_collapse_flush pmdp_collapse_flush
1558 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1559 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1561 static inline int pmd_trans_huge(pmd_t pmd)
1563 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1566 #define has_transparent_hugepage has_transparent_hugepage
1567 static inline int has_transparent_hugepage(void)
1569 return MACHINE_HAS_EDAT1 ? 1 : 0;
1571 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1574 * 64 bit swap entry format:
1575 * A page-table entry has some bits we have to treat in a special way.
1576 * Bits 52 and bit 55 have to be zero, otherwise a specification
1577 * exception will occur instead of a page translation exception. The
1578 * specification exception has the bad habit not to store necessary
1579 * information in the lowcore.
1580 * Bits 54 and 63 are used to indicate the page type.
1581 * A swap pte is indicated by bit pattern (pte & 0x201) == 0x200
1582 * This leaves the bits 0-51 and bits 56-62 to store type and offset.
1583 * We use the 5 bits from 57-61 for the type and the 52 bits from 0-51
1585 * | offset |01100|type |00|
1586 * |0000000000111111111122222222223333333333444444444455|55555|55566|66|
1587 * |0123456789012345678901234567890123456789012345678901|23456|78901|23|
1590 #define __SWP_OFFSET_MASK ((1UL << 52) - 1)
1591 #define __SWP_OFFSET_SHIFT 12
1592 #define __SWP_TYPE_MASK ((1UL << 5) - 1)
1593 #define __SWP_TYPE_SHIFT 2
1595 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1599 pte_val(pte) = _PAGE_INVALID | _PAGE_PROTECT;
1600 pte_val(pte) |= (offset & __SWP_OFFSET_MASK) << __SWP_OFFSET_SHIFT;
1601 pte_val(pte) |= (type & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT;
1605 static inline unsigned long __swp_type(swp_entry_t entry)
1607 return (entry.val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK;
1610 static inline unsigned long __swp_offset(swp_entry_t entry)
1612 return (entry.val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK;
1615 static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
1617 return (swp_entry_t) { pte_val(mk_swap_pte(type, offset)) };
1620 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1621 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1623 #define kern_addr_valid(addr) (1)
1625 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1626 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1627 extern int s390_enable_sie(void);
1628 extern int s390_enable_skey(void);
1629 extern void s390_reset_cmma(struct mm_struct *mm);
1631 /* s390 has a private copy of get unmapped area to deal with cache synonyms */
1632 #define HAVE_ARCH_UNMAPPED_AREA
1633 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1636 * No page table caches to initialise
1638 static inline void pgtable_cache_init(void) { }
1639 static inline void check_pgt_cache(void) { }
1641 #include <asm-generic/pgtable.h>
1643 #endif /* _S390_PAGE_H */