1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
4 * Copyright (C) 2017 SiFive
5 * Copyright (C) 2020 Vitaly Wool, Konsulko AB
8 #include <asm/pgtable.h>
9 #define LOAD_OFFSET KERNEL_LINK_ADDR
10 /* No __ro_after_init data in the .rodata section - which will always be ro */
11 #define RO_AFTER_INIT_DATA
13 #include <asm/vmlinux.lds.h>
15 #include <asm/cache.h>
16 #include <asm/thread_info.h>
25 /* Beginning of code and text segment */
30 INIT_TEXT_SECTION(PAGE_SIZE)
31 /* we have to discard exit text and such at runtime, not link time */
51 RO_DATA(L1_CACHE_BYTES)
61 _exiprom = .; /* End of XIP ROM area */
65 * From this point, stuff is considered writable and will be copied to RAM
67 __data_loc = ALIGN(16); /* location in file */
68 . = LOAD_OFFSET + XIP_OFFSET; /* location in memory */
70 _sdata = .; /* Start of data section */
72 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
74 __start_ro_after_init = .;
75 .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
76 *(.data..ro_after_init)
78 __end_ro_after_init = .;
89 __soc_early_init_table : {
90 __soc_early_init_table_start = .;
91 KEEP(*(__soc_early_init_table))
92 __soc_early_init_table_end = .;
94 __soc_builtin_dtb_table : {
95 __soc_builtin_dtb_table_start = .;
96 KEEP(*(__soc_builtin_dtb_table))
97 __soc_builtin_dtb_table_end = .;
99 PERCPU_SECTION(L1_CACHE_BYTES)
101 . = ALIGN(PAGE_SIZE);
105 __global_pointer$ = . + 0x800;
110 BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0)
111 EXCEPTION_TABLE(0x10)
113 .rel.dyn : AT(ADDR(.rel.dyn) - LOAD_OFFSET) {
118 * End of copied data. We need a dummy section to get its LMA.
119 * Also located before final ALIGN() as trailing padding is not stored
120 * in the resulting binary file and useless to copy.
122 .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
123 _edata_loc = LOADADDR(.data.endmark);
125 . = ALIGN(PAGE_SIZE);