1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #include <asm/asm-offsets.h>
8 #include <linux/init.h>
9 #include <linux/linkage.h>
10 #include <asm/thread_info.h>
12 #include <asm/pgtable.h>
14 #include <asm/hwcap.h>
15 #include <asm/image.h>
16 #include "efi-header.S"
18 #ifdef CONFIG_XIP_KERNEL
19 .macro XIP_FIXUP_OFFSET reg
23 .macro XIP_FIXUP_FLASH_OFFSET reg
25 li t0, XIP_OFFSET_MASK
31 _xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
33 .macro XIP_FIXUP_OFFSET reg
35 .macro XIP_FIXUP_FLASH_OFFSET reg
37 #endif /* CONFIG_XIP_KERNEL */
42 * Image header expected by Linux boot-loaders. The image header data
43 * structure is described in asm/image.h.
44 * Do not modify it without modifying the structure and all bootloaders
45 * that expects this header format!!
49 * This instruction decodes to "MZ" ASCII required by UEFI.
54 /* jump to start kernel */
60 #ifdef CONFIG_RISCV_M_MODE
61 /* Image load offset (0MB) from start of RAM for M-mode */
64 #if __riscv_xlen == 64
65 /* Image load offset(2MB) from start of RAM */
68 /* Image load offset(4MB) from start of RAM */
72 /* Effective size of kernel image */
75 .word RISCV_HEADER_VERSION
78 .ascii RISCV_IMAGE_MAGIC
80 .ascii RISCV_IMAGE_MAGIC2
82 .word pe_head_start - _start
93 /* Relocate return address */
96 REG_L a1, KERNEL_MAP_VIRT_ADDR(a1)
101 /* Point stvec to virtual address of intruction after satp write */
106 /* Compute satp for kernel page tables, but don't load it yet */
107 srl a2, a0, PAGE_SHIFT
112 * Load trampoline page directory, which will cause us to trap to
113 * stvec if VA != PA, or simply fall through if VA == PA. We need a
114 * full fence here because setup_vm() just wrote these PTEs and we need
115 * to ensure the new translations are in use.
117 la a0, trampoline_pg_dir
119 srl a0, a0, PAGE_SHIFT
125 /* Set trap vector to spin forever to help debug */
126 la a0, .Lsecondary_park
129 /* Reload the global pointer */
132 la gp, __global_pointer$
136 * Switch to kernel page tables. A full fence is necessary in order to
137 * avoid using the trampoline translations, which are only correct for
138 * the first superpage. Fetching the fence is guarnteed to work
139 * because that first superpage is translated the same way.
145 #endif /* CONFIG_MMU */
147 .global secondary_start_sbi
149 /* Mask all interrupts */
153 /* Load the global pointer */
156 la gp, __global_pointer$
160 * Disable FPU to detect illegal usage of
161 * floating point in kernel space
166 /* Set trap vector to spin forever to help debug */
167 la a3, .Lsecondary_park
171 la a4, __cpu_up_stack_pointer
173 la a5, __cpu_up_task_pointer
180 .global secondary_start_common
181 secondary_start_common:
184 /* Enable virtual memory and relocate to virtual address */
185 la a0, swapper_pg_dir
189 call setup_trap_vector
191 #endif /* CONFIG_SMP */
195 /* Set trap vector to exception handler */
196 la a0, handle_exception
200 * Set sup0 scratch register to 0, indicating to exception vector that
201 * we are presently executing in kernel.
203 csrw CSR_SCRATCH, zero
208 /* We lack SMP support or have too many harts, so park this hart */
215 /* Mask all interrupts */
219 #ifdef CONFIG_RISCV_M_MODE
220 /* flush the instruction cache */
223 /* Reset all registers except ra, a0, a1 */
227 * Setup a PMP to permit access to all of memory. Some machines may
228 * not implement PMPs, so we set up a quick trap handler to just skip
229 * touching the PMPs on any trap.
235 csrw CSR_PMPADDR0, a0
236 li a0, (PMP_A_NAPOT | PMP_R | PMP_W | PMP_X)
242 * The hartid in a0 is expected later on, and we have no firmware
246 #endif /* CONFIG_RISCV_M_MODE */
248 /* Load the global pointer */
251 la gp, __global_pointer$
255 * Disable FPU to detect illegal usage of
256 * floating point in kernel space
262 li t0, CONFIG_NR_CPUS
263 blt a0, t0, .Lgood_cores
264 tail .Lsecondary_park
268 #ifndef CONFIG_XIP_KERNEL
269 /* Pick one hart to run the main boot sequence */
272 amoadd.w a3, a2, (a3)
273 bnez a3, .Lsecondary_start
276 /* hart_lottery in flash contains a magic number */
280 XIP_FIXUP_FLASH_OFFSET a3
282 amoswap.w t0, t1, (a2)
283 /* first time here if hart_lottery in RAM is not set */
284 beq t0, t1, .Lsecondary_start
286 la sp, _end + THREAD_SIZE
291 /* Restore a0 copy */
295 #ifndef CONFIG_XIP_KERNEL
296 /* Clear BSS for flat non-ELF images */
299 ble a4, a3, clear_bss_done
302 add a3, a3, RISCV_SZPTR
303 blt a3, a4, clear_bss
306 /* Save hart ID and DTB physical address */
310 la a2, boot_cpu_hartid
314 /* Initialize page tables and relocate to virtual addresses */
315 la sp, init_thread_union + THREAD_SIZE
317 #ifdef CONFIG_BUILTIN_DTB
322 #endif /* CONFIG_BUILTIN_DTB */
328 #endif /* CONFIG_MMU */
330 call setup_trap_vector
331 /* Restore C environment */
333 la sp, init_thread_union + THREAD_SIZE
336 call kasan_early_init
338 /* Start the kernel */
344 /* Set trap vector to spin forever to help debug */
345 la a3, .Lsecondary_park
349 la a1, __cpu_up_stack_pointer
351 la a2, __cpu_up_task_pointer
357 * This hart didn't win the lottery, so we wait for the winning hart to
358 * get far enough along the boot process that it should continue.
361 /* FIXME: We should WFI to save some energy here. */
364 beqz sp, .Lwait_for_cpu_up
365 beqz tp, .Lwait_for_cpu_up
368 tail secondary_start_common
373 #ifdef CONFIG_RISCV_M_MODE
407 andi t0, t0, (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)
408 beqz t0, .Lreset_regs_done
445 /* note that the caller must clear SR_FS */
446 #endif /* CONFIG_FPU */
450 #endif /* CONFIG_RISCV_M_MODE */
453 /* Empty zero page */