1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #ifndef _ASM_RISCV_PGTABLE_H
7 #define _ASM_RISCV_PGTABLE_H
9 #include <linux/mmzone.h>
10 #include <linux/sizes.h>
12 #include <asm/pgtable-bits.h>
15 #define KERNEL_LINK_ADDR PAGE_OFFSET
18 #define ADDRESS_SPACE_END (UL(-1))
21 /* Leave 2GB for kernel and BPF at the end of the address space */
22 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
24 #define KERNEL_LINK_ADDR PAGE_OFFSET
27 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
28 #define VMALLOC_END (PAGE_OFFSET - 1)
29 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
31 #define BPF_JIT_REGION_SIZE (SZ_128M)
33 /* KASLR should leave at least 128MB for BPF after the kernel */
34 #define BPF_JIT_REGION_START PFN_ALIGN((unsigned long)&_end)
35 #define BPF_JIT_REGION_END (BPF_JIT_REGION_START + BPF_JIT_REGION_SIZE)
37 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
38 #define BPF_JIT_REGION_END (VMALLOC_END)
41 /* Modules always live before the kernel */
43 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
44 #define MODULES_END (PFN_ALIGN((unsigned long)&_start))
48 * Roughly size the vmemmap space to be large enough to fit enough
49 * struct pages to map half the virtual address space. Then
50 * position vmemmap directly below the VMALLOC region.
52 #define VMEMMAP_SHIFT \
53 (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
54 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
55 #define VMEMMAP_END (VMALLOC_START - 1)
56 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
59 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
60 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
62 #define vmemmap ((struct page *)VMEMMAP_START)
64 #define PCI_IO_SIZE SZ_16M
65 #define PCI_IO_END VMEMMAP_START
66 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
68 #define FIXADDR_TOP PCI_IO_START
70 #define FIXADDR_SIZE PMD_SIZE
72 #define FIXADDR_SIZE PGDIR_SIZE
74 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
78 #ifdef CONFIG_XIP_KERNEL
79 #define XIP_OFFSET SZ_8M
84 /* Page Upper Directory not used in RISC-V */
85 #include <asm-generic/pgtable-nopud.h>
87 #include <asm/tlbflush.h>
88 #include <linux/mm_types.h>
91 #include <asm/pgtable-64.h>
93 #include <asm/pgtable-32.h>
94 #endif /* CONFIG_64BIT */
96 #ifdef CONFIG_XIP_KERNEL
97 #define XIP_FIXUP(addr) ({ \
98 uintptr_t __a = (uintptr_t)(addr); \
99 (__a >= CONFIG_XIP_PHYS_ADDR && __a < CONFIG_XIP_PHYS_ADDR + SZ_16M) ? \
100 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
104 #define XIP_FIXUP(addr) (addr)
105 #endif /* CONFIG_XIP_KERNEL */
108 /* Number of entries in the page global directory */
109 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
110 /* Number of entries in the page table */
111 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
113 /* Number of PGD entries that a user-mode program can use */
114 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
116 /* Page protection bits */
117 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
119 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE)
120 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
121 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
122 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
123 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
124 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
125 _PAGE_EXEC | _PAGE_WRITE)
127 #define PAGE_COPY PAGE_READ
128 #define PAGE_COPY_EXEC PAGE_EXEC
129 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC
130 #define PAGE_SHARED PAGE_WRITE
131 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
133 #define _PAGE_KERNEL (_PAGE_READ \
140 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
141 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
142 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
143 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
146 #define PAGE_TABLE __pgprot(_PAGE_TABLE)
149 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
150 * change the properties of memory regions.
152 #define _PAGE_IOREMAP _PAGE_KERNEL
154 extern pgd_t swapper_pg_dir[];
156 /* MAP_PRIVATE permissions: xwr (copy-on-write) */
157 #define __P000 PAGE_NONE
158 #define __P001 PAGE_READ
159 #define __P010 PAGE_COPY
160 #define __P011 PAGE_COPY
161 #define __P100 PAGE_EXEC
162 #define __P101 PAGE_READ_EXEC
163 #define __P110 PAGE_COPY_EXEC
164 #define __P111 PAGE_COPY_READ_EXEC
166 /* MAP_SHARED permissions: xwr */
167 #define __S000 PAGE_NONE
168 #define __S001 PAGE_READ
169 #define __S010 PAGE_SHARED
170 #define __S011 PAGE_SHARED
171 #define __S100 PAGE_EXEC
172 #define __S101 PAGE_READ_EXEC
173 #define __S110 PAGE_SHARED_EXEC
174 #define __S111 PAGE_SHARED_EXEC
176 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
177 static inline int pmd_present(pmd_t pmd)
180 * Checking for _PAGE_LEAF is needed too because:
181 * When splitting a THP, split_huge_page() will temporarily clear
182 * the present bit, in this situation, pmd_present() and
183 * pmd_trans_huge() still needs to return true.
185 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
188 static inline int pmd_present(pmd_t pmd)
190 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
194 static inline int pmd_none(pmd_t pmd)
196 return (pmd_val(pmd) == 0);
199 static inline int pmd_bad(pmd_t pmd)
201 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
204 #define pmd_leaf pmd_leaf
205 static inline int pmd_leaf(pmd_t pmd)
207 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
210 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
215 static inline void pmd_clear(pmd_t *pmdp)
217 set_pmd(pmdp, __pmd(0));
220 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
222 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
225 static inline unsigned long _pgd_pfn(pgd_t pgd)
227 return pgd_val(pgd) >> _PAGE_PFN_SHIFT;
230 static inline struct page *pmd_page(pmd_t pmd)
232 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
235 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
237 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
240 static inline pte_t pmd_pte(pmd_t pmd)
242 return __pte(pmd_val(pmd));
245 static inline pte_t pud_pte(pud_t pud)
247 return __pte(pud_val(pud));
250 /* Yields the page frame number (PFN) of a page table entry */
251 static inline unsigned long pte_pfn(pte_t pte)
253 return (pte_val(pte) >> _PAGE_PFN_SHIFT);
256 #define pte_page(x) pfn_to_page(pte_pfn(x))
258 /* Constructs a page table entry */
259 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
261 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
264 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
266 static inline int pte_present(pte_t pte)
268 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
271 static inline int pte_none(pte_t pte)
273 return (pte_val(pte) == 0);
276 static inline int pte_write(pte_t pte)
278 return pte_val(pte) & _PAGE_WRITE;
281 static inline int pte_exec(pte_t pte)
283 return pte_val(pte) & _PAGE_EXEC;
286 static inline int pte_huge(pte_t pte)
288 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
291 static inline int pte_dirty(pte_t pte)
293 return pte_val(pte) & _PAGE_DIRTY;
296 static inline int pte_young(pte_t pte)
298 return pte_val(pte) & _PAGE_ACCESSED;
301 static inline int pte_special(pte_t pte)
303 return pte_val(pte) & _PAGE_SPECIAL;
306 /* static inline pte_t pte_rdprotect(pte_t pte) */
308 static inline pte_t pte_wrprotect(pte_t pte)
310 return __pte(pte_val(pte) & ~(_PAGE_WRITE));
313 /* static inline pte_t pte_mkread(pte_t pte) */
315 static inline pte_t pte_mkwrite(pte_t pte)
317 return __pte(pte_val(pte) | _PAGE_WRITE);
320 /* static inline pte_t pte_mkexec(pte_t pte) */
322 static inline pte_t pte_mkdirty(pte_t pte)
324 return __pte(pte_val(pte) | _PAGE_DIRTY);
327 static inline pte_t pte_mkclean(pte_t pte)
329 return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
332 static inline pte_t pte_mkyoung(pte_t pte)
334 return __pte(pte_val(pte) | _PAGE_ACCESSED);
337 static inline pte_t pte_mkold(pte_t pte)
339 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
342 static inline pte_t pte_mkspecial(pte_t pte)
344 return __pte(pte_val(pte) | _PAGE_SPECIAL);
347 static inline pte_t pte_mkhuge(pte_t pte)
352 #ifdef CONFIG_NUMA_BALANCING
354 * See the comment in include/asm-generic/pgtable.h
356 static inline int pte_protnone(pte_t pte)
358 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
361 static inline int pmd_protnone(pmd_t pmd)
363 return pte_protnone(pmd_pte(pmd));
367 /* Modify page protection bits */
368 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
370 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
373 #define pgd_ERROR(e) \
374 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
377 /* Commit new configuration to MMU hardware */
378 static inline void update_mmu_cache(struct vm_area_struct *vma,
379 unsigned long address, pte_t *ptep)
382 * The kernel assumes that TLBs don't cache invalid entries, but
383 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
384 * cache flush; it is necessary even after writing invalid entries.
385 * Relying on flush_tlb_fix_spurious_fault would suffice, but
386 * the extra traps reduce performance. So, eagerly SFENCE.VMA.
388 local_flush_tlb_page(address);
391 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
392 unsigned long address, pmd_t *pmdp)
394 pte_t *ptep = (pte_t *)pmdp;
396 update_mmu_cache(vma, address, ptep);
399 #define __HAVE_ARCH_PTE_SAME
400 static inline int pte_same(pte_t pte_a, pte_t pte_b)
402 return pte_val(pte_a) == pte_val(pte_b);
406 * Certain architectures need to do special things when PTEs within
407 * a page table are directly modified. Thus, the following hook is
410 static inline void set_pte(pte_t *ptep, pte_t pteval)
415 void flush_icache_pte(pte_t pte);
417 static inline void set_pte_at(struct mm_struct *mm,
418 unsigned long addr, pte_t *ptep, pte_t pteval)
420 if (pte_present(pteval) && pte_exec(pteval))
421 flush_icache_pte(pteval);
423 set_pte(ptep, pteval);
426 static inline void pte_clear(struct mm_struct *mm,
427 unsigned long addr, pte_t *ptep)
429 set_pte_at(mm, addr, ptep, __pte(0));
432 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
433 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
434 unsigned long address, pte_t *ptep,
435 pte_t entry, int dirty)
437 if (!pte_same(*ptep, entry))
438 set_pte_at(vma->vm_mm, address, ptep, entry);
440 * update_mmu_cache will unconditionally execute, handling both
441 * the case that the PTE changed and the spurious fault case.
446 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
447 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
448 unsigned long address, pte_t *ptep)
450 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0));
453 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
454 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
455 unsigned long address,
458 if (!pte_young(*ptep))
460 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
463 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
464 static inline void ptep_set_wrprotect(struct mm_struct *mm,
465 unsigned long address, pte_t *ptep)
467 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep);
470 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
471 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
472 unsigned long address, pte_t *ptep)
475 * This comment is borrowed from x86, but applies equally to RISC-V:
477 * Clearing the accessed bit without a TLB flush
478 * doesn't cause data corruption. [ It could cause incorrect
479 * page aging and the (mistaken) reclaim of hot pages, but the
480 * chance of that should be relatively low. ]
482 * So as a performance optimization don't flush the TLB when
483 * clearing the accessed bit, it will eventually be flushed by
484 * a context switch or a VM operation anyway. [ In the rare
485 * event of it not getting flushed for a long time the delay
486 * shouldn't really matter because there's no real memory
487 * pressure for swapout to react to. ]
489 return ptep_test_and_clear_young(vma, address, ptep);
495 static inline pmd_t pte_pmd(pte_t pte)
497 return __pmd(pte_val(pte));
500 static inline pmd_t pmd_mkhuge(pmd_t pmd)
505 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
507 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
510 #define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT)
512 static inline unsigned long pmd_pfn(pmd_t pmd)
514 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
517 static inline pmd_t mk_pmd(struct page *page, pgprot_t prot)
519 return pfn_pmd(page_to_pfn(page), prot);
522 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
524 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
527 #define pmd_write pmd_write
528 static inline int pmd_write(pmd_t pmd)
530 return pte_write(pmd_pte(pmd));
533 static inline int pmd_dirty(pmd_t pmd)
535 return pte_dirty(pmd_pte(pmd));
538 static inline int pmd_young(pmd_t pmd)
540 return pte_young(pmd_pte(pmd));
543 static inline pmd_t pmd_mkold(pmd_t pmd)
545 return pte_pmd(pte_mkold(pmd_pte(pmd)));
548 static inline pmd_t pmd_mkyoung(pmd_t pmd)
550 return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
553 static inline pmd_t pmd_mkwrite(pmd_t pmd)
555 return pte_pmd(pte_mkwrite(pmd_pte(pmd)));
558 static inline pmd_t pmd_wrprotect(pmd_t pmd)
560 return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
563 static inline pmd_t pmd_mkclean(pmd_t pmd)
565 return pte_pmd(pte_mkclean(pmd_pte(pmd)));
568 static inline pmd_t pmd_mkdirty(pmd_t pmd)
570 return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
573 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
574 pmd_t *pmdp, pmd_t pmd)
576 return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));
579 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
580 pud_t *pudp, pud_t pud)
582 return set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud));
585 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
586 static inline int pmd_trans_huge(pmd_t pmd)
588 return pmd_leaf(pmd);
591 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
592 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
593 unsigned long address, pmd_t *pmdp,
594 pmd_t entry, int dirty)
596 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
599 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
600 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
601 unsigned long address, pmd_t *pmdp)
603 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
606 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
607 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
608 unsigned long address, pmd_t *pmdp)
610 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
613 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
614 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
615 unsigned long address, pmd_t *pmdp)
617 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
620 #define pmdp_establish pmdp_establish
621 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
622 unsigned long address, pmd_t *pmdp, pmd_t pmd)
624 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
627 #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
628 void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start,
631 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
634 * Encode and decode a swap entry
636 * Format of swap PTE:
637 * bit 0: _PAGE_PRESENT (zero)
638 * bit 1: _PAGE_PROT_NONE (zero)
639 * bits 2 to 6: swap type
640 * bits 7 to XLEN-1: swap offset
642 #define __SWP_TYPE_SHIFT 2
643 #define __SWP_TYPE_BITS 5
644 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
645 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
647 #define MAX_SWAPFILES_CHECK() \
648 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
650 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
651 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
652 #define __swp_entry(type, offset) ((swp_entry_t) \
653 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
655 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
656 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
659 * In the RV64 Linux scheme, we give the user half of the virtual-address space
660 * and give the kernel the other (upper) half.
663 #define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
665 #define KERN_VIRT_START FIXADDR_START
669 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
670 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
673 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
675 #define TASK_SIZE FIXADDR_START
678 #else /* CONFIG_MMU */
680 #define PAGE_SHARED __pgprot(0)
681 #define PAGE_KERNEL __pgprot(0)
682 #define swapper_pg_dir NULL
683 #define TASK_SIZE 0xffffffffUL
684 #define VMALLOC_START 0
685 #define VMALLOC_END TASK_SIZE
687 #endif /* !CONFIG_MMU */
689 #define kern_addr_valid(addr) (1) /* FIXME */
691 extern char _start[];
692 extern void *_dtb_early_va;
693 extern uintptr_t _dtb_early_pa;
694 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
695 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
696 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
698 #define dtb_early_va _dtb_early_va
699 #define dtb_early_pa _dtb_early_pa
700 #endif /* CONFIG_XIP_KERNEL */
702 void paging_init(void);
703 void misc_mem_init(void);
705 #define FIRST_USER_ADDRESS 0
708 * ZERO_PAGE is a global shared page that is always zero,
709 * used for zero-mapped memory areas, etc.
711 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
712 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
714 #endif /* !__ASSEMBLY__ */
716 #endif /* _ASM_RISCV_PGTABLE_H */