1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #ifndef _ASM_RISCV_PGTABLE_H
7 #define _ASM_RISCV_PGTABLE_H
9 #include <linux/mmzone.h>
10 #include <linux/sizes.h>
12 #include <asm/pgtable-bits.h>
15 #define KERNEL_LINK_ADDR PAGE_OFFSET
16 #define KERN_VIRT_SIZE (UL(-1))
19 #define ADDRESS_SPACE_END (UL(-1))
22 /* Leave 2GB for kernel and BPF at the end of the address space */
23 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
25 #define KERNEL_LINK_ADDR PAGE_OFFSET
28 /* Number of entries in the page global directory */
29 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
30 /* Number of entries in the page table */
31 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
34 * Half of the kernel address space (1/4 of the entries of the page global
35 * directory) is for the direct mapping.
37 #define KERN_VIRT_SIZE ((PTRS_PER_PGD / 2 * PGDIR_SIZE) / 2)
39 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
40 #define VMALLOC_END PAGE_OFFSET
41 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
43 #define BPF_JIT_REGION_SIZE (SZ_128M)
45 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE)
46 #define BPF_JIT_REGION_END (MODULES_END)
48 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
49 #define BPF_JIT_REGION_END (VMALLOC_END)
52 /* Modules always live before the kernel */
54 /* This is used to define the end of the KASAN shadow region */
55 #define MODULES_LOWEST_VADDR (KERNEL_LINK_ADDR - SZ_2G)
56 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
57 #define MODULES_END (PFN_ALIGN((unsigned long)&_start))
61 * Roughly size the vmemmap space to be large enough to fit enough
62 * struct pages to map half the virtual address space. Then
63 * position vmemmap directly below the VMALLOC region.
65 #define VA_BITS_SV32 32
67 #define VA_BITS_SV39 39
68 #define VA_BITS_SV48 48
69 #define VA_BITS_SV57 57
71 #define VA_BITS (pgtable_l5_enabled ? \
72 VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39))
74 #define VA_BITS VA_BITS_SV32
77 #define VMEMMAP_SHIFT \
78 (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
79 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
80 #define VMEMMAP_END VMALLOC_START
81 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
84 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
85 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
87 #define vmemmap ((struct page *)VMEMMAP_START)
89 #define PCI_IO_SIZE SZ_16M
90 #define PCI_IO_END VMEMMAP_START
91 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
93 #define FIXADDR_TOP PCI_IO_START
95 #define MAX_FDT_SIZE PMD_SIZE
96 #define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
97 #define FIXADDR_SIZE (PMD_SIZE + FIX_FDT_SIZE)
99 #define MAX_FDT_SIZE PGDIR_SIZE
100 #define FIX_FDT_SIZE MAX_FDT_SIZE
101 #define FIXADDR_SIZE (PGDIR_SIZE + FIX_FDT_SIZE)
103 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
107 #ifdef CONFIG_XIP_KERNEL
108 #define XIP_OFFSET SZ_32M
109 #define XIP_OFFSET_MASK (SZ_32M - 1)
116 #include <asm/page.h>
117 #include <asm/tlbflush.h>
118 #include <linux/mm_types.h>
119 #include <asm/compat.h>
121 #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT)
124 #include <asm/pgtable-64.h>
126 #define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1))
127 #define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1))
128 #define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1))
131 #define MMAP_VA_BITS_64 ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS)
132 #define MMAP_MIN_VA_BITS_64 (VA_BITS_SV39)
133 #define MMAP_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_VA_BITS_64)
134 #define MMAP_MIN_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_MIN_VA_BITS_64)
136 #define MMAP_VA_BITS ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS)
137 #define MMAP_MIN_VA_BITS (VA_BITS_SV39)
138 #endif /* CONFIG_COMPAT */
141 #include <asm/pgtable-32.h>
142 #endif /* CONFIG_64BIT */
144 #include <linux/page_table_check.h>
146 #ifdef CONFIG_XIP_KERNEL
147 #define XIP_FIXUP(addr) ({ \
148 uintptr_t __a = (uintptr_t)(addr); \
149 (__a >= CONFIG_XIP_PHYS_ADDR && \
150 __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \
151 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
155 #define XIP_FIXUP(addr) (addr)
156 #endif /* CONFIG_XIP_KERNEL */
158 struct pt_alloc_ops {
159 pte_t *(*get_pte_virt)(phys_addr_t pa);
160 phys_addr_t (*alloc_pte)(uintptr_t va);
161 #ifndef __PAGETABLE_PMD_FOLDED
162 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
163 phys_addr_t (*alloc_pmd)(uintptr_t va);
164 pud_t *(*get_pud_virt)(phys_addr_t pa);
165 phys_addr_t (*alloc_pud)(uintptr_t va);
166 p4d_t *(*get_p4d_virt)(phys_addr_t pa);
167 phys_addr_t (*alloc_p4d)(uintptr_t va);
171 extern struct pt_alloc_ops pt_ops __initdata;
174 /* Number of PGD entries that a user-mode program can use */
175 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
177 /* Page protection bits */
178 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
180 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE | _PAGE_READ)
181 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
182 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
183 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
184 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
185 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
186 _PAGE_EXEC | _PAGE_WRITE)
188 #define PAGE_COPY PAGE_READ
189 #define PAGE_COPY_EXEC PAGE_READ_EXEC
190 #define PAGE_SHARED PAGE_WRITE
191 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
193 #define _PAGE_KERNEL (_PAGE_READ \
200 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
201 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
202 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
203 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
206 #define PAGE_TABLE __pgprot(_PAGE_TABLE)
208 #define _PAGE_IOREMAP ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
209 #define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP)
211 extern pgd_t swapper_pg_dir[];
212 extern pgd_t trampoline_pg_dir[];
213 extern pgd_t early_pg_dir[];
215 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
216 static inline int pmd_present(pmd_t pmd)
219 * Checking for _PAGE_LEAF is needed too because:
220 * When splitting a THP, split_huge_page() will temporarily clear
221 * the present bit, in this situation, pmd_present() and
222 * pmd_trans_huge() still needs to return true.
224 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
227 static inline int pmd_present(pmd_t pmd)
229 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
233 static inline int pmd_none(pmd_t pmd)
235 return (pmd_val(pmd) == 0);
238 static inline int pmd_bad(pmd_t pmd)
240 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
243 #define pmd_leaf pmd_leaf
244 static inline int pmd_leaf(pmd_t pmd)
246 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
249 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
254 static inline void pmd_clear(pmd_t *pmdp)
256 set_pmd(pmdp, __pmd(0));
259 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
261 unsigned long prot_val = pgprot_val(prot);
263 ALT_THEAD_PMA(prot_val);
265 return __pgd((pfn << _PAGE_PFN_SHIFT) | prot_val);
268 static inline unsigned long _pgd_pfn(pgd_t pgd)
270 return __page_val_to_pfn(pgd_val(pgd));
273 static inline struct page *pmd_page(pmd_t pmd)
275 return pfn_to_page(__page_val_to_pfn(pmd_val(pmd)));
278 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
280 return (unsigned long)pfn_to_virt(__page_val_to_pfn(pmd_val(pmd)));
283 static inline pte_t pmd_pte(pmd_t pmd)
285 return __pte(pmd_val(pmd));
288 static inline pte_t pud_pte(pud_t pud)
290 return __pte(pud_val(pud));
293 #ifdef CONFIG_RISCV_ISA_SVNAPOT
294 #include <asm/cpufeature.h>
296 static __always_inline bool has_svnapot(void)
298 return riscv_has_extension_likely(RISCV_ISA_EXT_SVNAPOT);
301 static inline unsigned long pte_napot(pte_t pte)
303 return pte_val(pte) & _PAGE_NAPOT;
306 static inline pte_t pte_mknapot(pte_t pte, unsigned int order)
308 int pos = order - 1 + _PAGE_PFN_SHIFT;
309 unsigned long napot_bit = BIT(pos);
310 unsigned long napot_mask = ~GENMASK(pos, _PAGE_PFN_SHIFT);
312 return __pte((pte_val(pte) & napot_mask) | napot_bit | _PAGE_NAPOT);
317 static __always_inline bool has_svnapot(void) { return false; }
319 static inline unsigned long pte_napot(pte_t pte)
324 #endif /* CONFIG_RISCV_ISA_SVNAPOT */
326 /* Yields the page frame number (PFN) of a page table entry */
327 static inline unsigned long pte_pfn(pte_t pte)
329 unsigned long res = __page_val_to_pfn(pte_val(pte));
331 if (has_svnapot() && pte_napot(pte))
332 res = res & (res - 1UL);
337 #define pte_page(x) pfn_to_page(pte_pfn(x))
339 /* Constructs a page table entry */
340 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
342 unsigned long prot_val = pgprot_val(prot);
344 ALT_THEAD_PMA(prot_val);
346 return __pte((pfn << _PAGE_PFN_SHIFT) | prot_val);
349 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
351 static inline int pte_present(pte_t pte)
353 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
356 static inline int pte_none(pte_t pte)
358 return (pte_val(pte) == 0);
361 static inline int pte_write(pte_t pte)
363 return pte_val(pte) & _PAGE_WRITE;
366 static inline int pte_exec(pte_t pte)
368 return pte_val(pte) & _PAGE_EXEC;
371 static inline int pte_user(pte_t pte)
373 return pte_val(pte) & _PAGE_USER;
376 static inline int pte_huge(pte_t pte)
378 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
381 static inline int pte_dirty(pte_t pte)
383 return pte_val(pte) & _PAGE_DIRTY;
386 static inline int pte_young(pte_t pte)
388 return pte_val(pte) & _PAGE_ACCESSED;
391 static inline int pte_special(pte_t pte)
393 return pte_val(pte) & _PAGE_SPECIAL;
396 /* static inline pte_t pte_rdprotect(pte_t pte) */
398 static inline pte_t pte_wrprotect(pte_t pte)
400 return __pte(pte_val(pte) & ~(_PAGE_WRITE));
403 /* static inline pte_t pte_mkread(pte_t pte) */
405 static inline pte_t pte_mkwrite_novma(pte_t pte)
407 return __pte(pte_val(pte) | _PAGE_WRITE);
410 /* static inline pte_t pte_mkexec(pte_t pte) */
412 static inline pte_t pte_mkdirty(pte_t pte)
414 return __pte(pte_val(pte) | _PAGE_DIRTY);
417 static inline pte_t pte_mkclean(pte_t pte)
419 return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
422 static inline pte_t pte_mkyoung(pte_t pte)
424 return __pte(pte_val(pte) | _PAGE_ACCESSED);
427 static inline pte_t pte_mkold(pte_t pte)
429 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
432 static inline pte_t pte_mkspecial(pte_t pte)
434 return __pte(pte_val(pte) | _PAGE_SPECIAL);
437 static inline pte_t pte_mkhuge(pte_t pte)
442 #ifdef CONFIG_NUMA_BALANCING
444 * See the comment in include/asm-generic/pgtable.h
446 static inline int pte_protnone(pte_t pte)
448 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
451 static inline int pmd_protnone(pmd_t pmd)
453 return pte_protnone(pmd_pte(pmd));
457 /* Modify page protection bits */
458 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
460 unsigned long newprot_val = pgprot_val(newprot);
462 ALT_THEAD_PMA(newprot_val);
464 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | newprot_val);
467 #define pgd_ERROR(e) \
468 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
471 /* Commit new configuration to MMU hardware */
472 static inline void update_mmu_cache_range(struct vm_fault *vmf,
473 struct vm_area_struct *vma, unsigned long address,
474 pte_t *ptep, unsigned int nr)
477 * The kernel assumes that TLBs don't cache invalid entries, but
478 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
479 * cache flush; it is necessary even after writing invalid entries.
480 * Relying on flush_tlb_fix_spurious_fault would suffice, but
481 * the extra traps reduce performance. So, eagerly SFENCE.VMA.
484 local_flush_tlb_page(address + nr * PAGE_SIZE);
486 #define update_mmu_cache(vma, addr, ptep) \
487 update_mmu_cache_range(NULL, vma, addr, ptep, 1)
489 #define __HAVE_ARCH_UPDATE_MMU_TLB
490 #define update_mmu_tlb update_mmu_cache
492 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
493 unsigned long address, pmd_t *pmdp)
495 pte_t *ptep = (pte_t *)pmdp;
497 update_mmu_cache(vma, address, ptep);
500 #define __HAVE_ARCH_PTE_SAME
501 static inline int pte_same(pte_t pte_a, pte_t pte_b)
503 return pte_val(pte_a) == pte_val(pte_b);
507 * Certain architectures need to do special things when PTEs within
508 * a page table are directly modified. Thus, the following hook is
511 static inline void set_pte(pte_t *ptep, pte_t pteval)
516 void flush_icache_pte(pte_t pte);
518 static inline void __set_pte_at(pte_t *ptep, pte_t pteval)
520 if (pte_present(pteval) && pte_exec(pteval))
521 flush_icache_pte(pteval);
523 set_pte(ptep, pteval);
526 static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
527 pte_t *ptep, pte_t pteval, unsigned int nr)
529 page_table_check_ptes_set(mm, ptep, pteval, nr);
532 __set_pte_at(ptep, pteval);
536 pte_val(pteval) += 1 << _PAGE_PFN_SHIFT;
539 #define set_ptes set_ptes
541 static inline void pte_clear(struct mm_struct *mm,
542 unsigned long addr, pte_t *ptep)
544 __set_pte_at(ptep, __pte(0));
547 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
548 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
549 unsigned long address, pte_t *ptep,
550 pte_t entry, int dirty)
552 if (!pte_same(*ptep, entry))
553 __set_pte_at(ptep, entry);
555 * update_mmu_cache will unconditionally execute, handling both
556 * the case that the PTE changed and the spurious fault case.
561 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
562 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
563 unsigned long address, pte_t *ptep)
565 pte_t pte = __pte(atomic_long_xchg((atomic_long_t *)ptep, 0));
567 page_table_check_pte_clear(mm, pte);
572 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
573 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
574 unsigned long address,
577 if (!pte_young(*ptep))
579 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
582 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
583 static inline void ptep_set_wrprotect(struct mm_struct *mm,
584 unsigned long address, pte_t *ptep)
586 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep);
589 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
590 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
591 unsigned long address, pte_t *ptep)
594 * This comment is borrowed from x86, but applies equally to RISC-V:
596 * Clearing the accessed bit without a TLB flush
597 * doesn't cause data corruption. [ It could cause incorrect
598 * page aging and the (mistaken) reclaim of hot pages, but the
599 * chance of that should be relatively low. ]
601 * So as a performance optimization don't flush the TLB when
602 * clearing the accessed bit, it will eventually be flushed by
603 * a context switch or a VM operation anyway. [ In the rare
604 * event of it not getting flushed for a long time the delay
605 * shouldn't really matter because there's no real memory
606 * pressure for swapout to react to. ]
608 return ptep_test_and_clear_young(vma, address, ptep);
611 #define pgprot_noncached pgprot_noncached
612 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
614 unsigned long prot = pgprot_val(_prot);
616 prot &= ~_PAGE_MTMASK;
619 return __pgprot(prot);
622 #define pgprot_writecombine pgprot_writecombine
623 static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
625 unsigned long prot = pgprot_val(_prot);
627 prot &= ~_PAGE_MTMASK;
628 prot |= _PAGE_NOCACHE;
630 return __pgprot(prot);
636 static inline pmd_t pte_pmd(pte_t pte)
638 return __pmd(pte_val(pte));
641 static inline pmd_t pmd_mkhuge(pmd_t pmd)
646 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
648 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
651 #define __pmd_to_phys(pmd) (__page_val_to_pfn(pmd_val(pmd)) << PAGE_SHIFT)
653 static inline unsigned long pmd_pfn(pmd_t pmd)
655 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
658 #define __pud_to_phys(pud) (__page_val_to_pfn(pud_val(pud)) << PAGE_SHIFT)
660 static inline unsigned long pud_pfn(pud_t pud)
662 return ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT);
665 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
667 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
670 #define pmd_write pmd_write
671 static inline int pmd_write(pmd_t pmd)
673 return pte_write(pmd_pte(pmd));
676 static inline int pmd_dirty(pmd_t pmd)
678 return pte_dirty(pmd_pte(pmd));
681 #define pmd_young pmd_young
682 static inline int pmd_young(pmd_t pmd)
684 return pte_young(pmd_pte(pmd));
687 static inline int pmd_user(pmd_t pmd)
689 return pte_user(pmd_pte(pmd));
692 static inline pmd_t pmd_mkold(pmd_t pmd)
694 return pte_pmd(pte_mkold(pmd_pte(pmd)));
697 static inline pmd_t pmd_mkyoung(pmd_t pmd)
699 return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
702 static inline pmd_t pmd_mkwrite_novma(pmd_t pmd)
704 return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd)));
707 static inline pmd_t pmd_wrprotect(pmd_t pmd)
709 return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
712 static inline pmd_t pmd_mkclean(pmd_t pmd)
714 return pte_pmd(pte_mkclean(pmd_pte(pmd)));
717 static inline pmd_t pmd_mkdirty(pmd_t pmd)
719 return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
722 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
723 pmd_t *pmdp, pmd_t pmd)
725 page_table_check_pmd_set(mm, pmdp, pmd);
726 return __set_pte_at((pte_t *)pmdp, pmd_pte(pmd));
729 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
730 pud_t *pudp, pud_t pud)
732 page_table_check_pud_set(mm, pudp, pud);
733 return __set_pte_at((pte_t *)pudp, pud_pte(pud));
736 #ifdef CONFIG_PAGE_TABLE_CHECK
737 static inline bool pte_user_accessible_page(pte_t pte)
739 return pte_present(pte) && pte_user(pte);
742 static inline bool pmd_user_accessible_page(pmd_t pmd)
744 return pmd_leaf(pmd) && pmd_user(pmd);
747 static inline bool pud_user_accessible_page(pud_t pud)
749 return pud_leaf(pud) && pud_user(pud);
753 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
754 static inline int pmd_trans_huge(pmd_t pmd)
756 return pmd_leaf(pmd);
759 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
760 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
761 unsigned long address, pmd_t *pmdp,
762 pmd_t entry, int dirty)
764 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
767 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
768 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
769 unsigned long address, pmd_t *pmdp)
771 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
774 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
775 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
776 unsigned long address, pmd_t *pmdp)
778 pmd_t pmd = __pmd(atomic_long_xchg((atomic_long_t *)pmdp, 0));
780 page_table_check_pmd_clear(mm, pmd);
785 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
786 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
787 unsigned long address, pmd_t *pmdp)
789 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
792 #define pmdp_establish pmdp_establish
793 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
794 unsigned long address, pmd_t *pmdp, pmd_t pmd)
796 page_table_check_pmd_set(vma->vm_mm, pmdp, pmd);
797 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
800 #define pmdp_collapse_flush pmdp_collapse_flush
801 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
802 unsigned long address, pmd_t *pmdp);
803 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
806 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
807 * are !pte_none() && !pte_present().
809 * Format of swap PTE:
810 * bit 0: _PAGE_PRESENT (zero)
811 * bit 1 to 3: _PAGE_LEAF (zero)
812 * bit 5: _PAGE_PROT_NONE (zero)
813 * bit 6: exclusive marker
814 * bits 7 to 11: swap type
815 * bits 12 to XLEN-1: swap offset
817 #define __SWP_TYPE_SHIFT 7
818 #define __SWP_TYPE_BITS 5
819 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
820 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
822 #define MAX_SWAPFILES_CHECK() \
823 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
825 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
826 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
827 #define __swp_entry(type, offset) ((swp_entry_t) \
828 { (((type) & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT) | \
829 ((offset) << __SWP_OFFSET_SHIFT) })
831 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
832 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
834 static inline int pte_swp_exclusive(pte_t pte)
836 return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
839 static inline pte_t pte_swp_mkexclusive(pte_t pte)
841 return __pte(pte_val(pte) | _PAGE_SWP_EXCLUSIVE);
844 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
846 return __pte(pte_val(pte) & ~_PAGE_SWP_EXCLUSIVE);
849 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
850 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) })
851 #define __swp_entry_to_pmd(swp) __pmd((swp).val)
852 #endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */
855 * In the RV64 Linux scheme, we give the user half of the virtual-address space
856 * and give the kernel the other (upper) half.
859 #define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE)
861 #define KERN_VIRT_START FIXADDR_START
865 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
866 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
868 * - 0x9fc00000 (~2.5GB) for RV32.
869 * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
870 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
871 * - 0x100000000000000 ( 64PB) for RV64 using SV57 mmu
873 * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
874 * Instruction Set Manual Volume II: Privileged Architecture" states that
875 * "load and store effective addresses, which are 64bits, must have bits
876 * 63–48 all equal to bit 47, or else a page-fault exception will occur."
877 * Similarly for SV57, bits 63–57 must be equal to bit 56.
880 #define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)
881 #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
884 #define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
885 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
886 TASK_SIZE_32 : TASK_SIZE_64)
888 #define TASK_SIZE TASK_SIZE_64
892 #define TASK_SIZE FIXADDR_START
893 #define TASK_SIZE_MIN TASK_SIZE
896 #else /* CONFIG_MMU */
898 #define PAGE_SHARED __pgprot(0)
899 #define PAGE_KERNEL __pgprot(0)
900 #define swapper_pg_dir NULL
901 #define TASK_SIZE 0xffffffffUL
902 #define VMALLOC_START 0
903 #define VMALLOC_END TASK_SIZE
905 #endif /* !CONFIG_MMU */
907 extern char _start[];
908 extern void *_dtb_early_va;
909 extern uintptr_t _dtb_early_pa;
910 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
911 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
912 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
914 #define dtb_early_va _dtb_early_va
915 #define dtb_early_pa _dtb_early_pa
916 #endif /* CONFIG_XIP_KERNEL */
917 extern u64 satp_mode;
919 void paging_init(void);
920 void misc_mem_init(void);
923 * ZERO_PAGE is a global shared page that is always zero,
924 * used for zero-mapped memory areas, etc.
926 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
927 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
929 #endif /* !__ASSEMBLY__ */
931 #endif /* _ASM_RISCV_PGTABLE_H */