Merge branch 'address-masking'
[linux-2.6-microblaze.git] / arch / riscv / boot / dts / canaan / sipeed_maix_bit.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4  * Copyright (C) 2020 Western Digital Corporation or its affiliates.
5  */
6
7 /dts-v1/;
8
9 #include "k210.dtsi"
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14
15 / {
16         model = "SiPeed MAIX BiT";
17         compatible = "sipeed,maix-bit", "sipeed,maix-bitm",
18                      "canaan,kendryte-k210";
19
20         aliases {
21                 serial0 = &uarths0;
22         };
23
24         chosen {
25                 bootargs = "earlycon console=ttySIF0";
26                 stdout-path = "serial0:115200n8";
27         };
28
29         gpio-leds {
30                 compatible = "gpio-leds";
31
32                 led0 {
33                         color = <LED_COLOR_ID_GREEN>;
34                         label = "green";
35                         gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>;
36                 };
37
38                 led1 {
39                         color = <LED_COLOR_ID_RED>;
40                         label = "red";
41                         gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>;
42                 };
43
44                 led2 {
45                         color = <LED_COLOR_ID_BLUE>;
46                         label = "blue";
47                         gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>;
48                 };
49         };
50
51         gpio-keys {
52                 compatible = "gpio-keys";
53
54                 key-boot {
55                         label = "BOOT";
56                         linux,code = <BTN_0>;
57                         gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
58                 };
59         };
60 };
61
62 &fpioa {
63         pinctrl-names = "default";
64         pinctrl-0 = <&jtag_pinctrl>;
65
66         jtag_pinctrl: jtag-pinmux {
67                 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
68                          <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
69                          <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
70                          <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
71         };
72
73         uarths_pinctrl: uarths-pinmux {
74                 pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>,
75                          <K210_FPIOA(5, K210_PCF_UARTHS_TX)>;
76         };
77
78         gpio_pinctrl: gpio-pinmux {
79                 pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
80                          <K210_FPIOA(9, K210_PCF_GPIO1)>,
81                          <K210_FPIOA(10, K210_PCF_GPIO2)>,
82                          <K210_FPIOA(11, K210_PCF_GPIO3)>,
83                          <K210_FPIOA(12, K210_PCF_GPIO4)>,
84                          <K210_FPIOA(13, K210_PCF_GPIO5)>,
85                          <K210_FPIOA(14, K210_PCF_GPIO6)>,
86                          <K210_FPIOA(15, K210_PCF_GPIO7)>;
87         };
88
89         gpiohs_pinctrl: gpiohs-pinmux {
90                 pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>,
91                          <K210_FPIOA(17, K210_PCF_GPIOHS1)>,
92                          <K210_FPIOA(21, K210_PCF_GPIOHS5)>,
93                          <K210_FPIOA(22, K210_PCF_GPIOHS6)>,
94                          <K210_FPIOA(23, K210_PCF_GPIOHS7)>,
95                          <K210_FPIOA(24, K210_PCF_GPIOHS8)>,
96                          <K210_FPIOA(25, K210_PCF_GPIOHS9)>,
97                          <K210_FPIOA(32, K210_PCF_GPIOHS16)>,
98                          <K210_FPIOA(33, K210_PCF_GPIOHS17)>,
99                          <K210_FPIOA(34, K210_PCF_GPIOHS18)>,
100                          <K210_FPIOA(35, K210_PCF_GPIOHS19)>;
101         };
102
103         i2s0_pinctrl: i2s0-pinmux {
104                 pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>,
105                          <K210_FPIOA(19, K210_PCF_I2S0_WS)>,
106                          <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>;
107         };
108
109         dvp_pinctrl: dvp-pinmux {
110                 pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>,
111                          <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>,
112                          <K210_FPIOA(42, K210_PCF_DVP_RST)>,
113                          <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>,
114                          <K210_FPIOA(44, K210_PCF_DVP_PWDN)>,
115                          <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>,
116                          <K210_FPIOA(46, K210_PCF_DVP_XCLK)>,
117                          <K210_FPIOA(47, K210_PCF_DVP_PCLK)>;
118         };
119
120         spi0_pinctrl: spi0-pinmux {
121                 pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>,  /* cs */
122                          <K210_FPIOA(37, K210_PCF_GPIOHS21)>,  /* rst */
123                          <K210_FPIOA(38, K210_PCF_GPIOHS22)>,  /* dc */
124                          <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */
125         };
126
127         spi1_pinctrl: spi1-pinmux {
128                 pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
129                          <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
130                          <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
131                          <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
132         };
133
134         i2c1_pinctrl: i2c1-pinmux {
135                 pinmux = <K210_FPIOA(30, K210_PCF_I2C1_SCLK)>,
136                          <K210_FPIOA(31, K210_PCF_I2C1_SDA)>;
137         };
138 };
139
140 &uarths0 {
141         pinctrl-0 = <&uarths_pinctrl>;
142         pinctrl-names = "default";
143         status = "okay";
144 };
145
146 &gpio0 {
147         pinctrl-0 = <&gpiohs_pinctrl>;
148         pinctrl-names = "default";
149         status = "okay";
150 };
151
152 &gpio1 {
153         pinctrl-0 = <&gpio_pinctrl>;
154         pinctrl-names = "default";
155         status = "okay";
156 };
157
158 &i2s0 {
159         #sound-dai-cells = <1>;
160         pinctrl-0 = <&i2s0_pinctrl>;
161         pinctrl-names = "default";
162         status = "okay";
163 };
164
165 &i2c1 {
166         pinctrl-0 = <&i2c1_pinctrl>;
167         pinctrl-names = "default";
168         clock-frequency = <400000>;
169         status = "okay";
170 };
171
172 &spi0 {
173         pinctrl-0 = <&spi0_pinctrl>;
174         pinctrl-names = "default";
175         num-cs = <1>;
176         cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
177         status = "okay";
178
179         panel@0 {
180                 compatible = "sitronix,st7789v";
181                 reg = <0>;
182                 reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
183                 dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
184                 spi-max-frequency = <15000000>;
185                 spi-cs-high;
186                 status = "disabled";
187         };
188 };
189
190 &spi1 {
191         pinctrl-0 = <&spi1_pinctrl>;
192         pinctrl-names = "default";
193         num-cs = <1>;
194         cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
195         status = "okay";
196
197         mmc@0 {
198                 compatible = "mmc-spi-slot";
199                 reg = <0>;
200                 voltage-ranges = <3300 3300>;
201                 spi-max-frequency = <25000000>;
202                 broken-cd;
203         };
204 };
205
206 &spi3 {
207         status = "okay";
208
209         flash@0 {
210                 compatible = "jedec,spi-nor";
211                 reg = <0>;
212                 spi-max-frequency = <50000000>;
213                 spi-tx-bus-width = <4>;
214                 spi-rx-bus-width = <4>;
215                 m25p,fast-read;
216                 broken-flash-reset;
217         };
218 };