4 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
5 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
7 * pSeries specific routines for PCI.
9 * Based on code from pci.c and chrp_pci.c
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/kernel.h>
27 #include <linux/threads.h>
28 #include <linux/pci.h>
29 #include <linux/string.h>
30 #include <linux/init.h>
31 #include <linux/bootmem.h>
34 #include <asm/pgtable.h>
37 #include <asm/machdep.h>
38 #include <asm/pci-bridge.h>
39 #include <asm/iommu.h>
46 static int read_pci_config;
47 static int write_pci_config;
48 static int ibm_read_pci_config;
49 static int ibm_write_pci_config;
51 static int s7a_workaround;
53 extern struct mpic *pSeries_mpic;
55 static int config_access_valid(struct device_node *dn, int where)
59 if (where < 4096 && dn->pci_ext_config_space)
65 static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
68 unsigned long buid, addr;
72 return PCIBIOS_DEVICE_NOT_FOUND;
73 if (!config_access_valid(dn, where))
74 return PCIBIOS_BAD_REGISTER_NUMBER;
76 addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
77 (dn->devfn << 8) | (where & 0xff);
80 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
81 addr, buid >> 32, buid & 0xffffffff, size);
83 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
88 return PCIBIOS_DEVICE_NOT_FOUND;
90 if (returnval == EEH_IO_ERROR_VALUE(size)
91 && eeh_dn_check_failure (dn, NULL))
92 return PCIBIOS_DEVICE_NOT_FOUND;
94 return PCIBIOS_SUCCESSFUL;
97 static int rtas_pci_read_config(struct pci_bus *bus,
99 int where, int size, u32 *val)
101 struct device_node *busdn, *dn;
104 busdn = pci_device_to_OF_node(bus->self);
106 busdn = bus->sysdata; /* must be a phb */
108 /* Search only direct children of the bus */
109 for (dn = busdn->child; dn; dn = dn->sibling)
110 if (dn->devfn == devfn)
111 return rtas_read_config(dn, where, size, val);
112 return PCIBIOS_DEVICE_NOT_FOUND;
115 static int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
117 unsigned long buid, addr;
121 return PCIBIOS_DEVICE_NOT_FOUND;
122 if (!config_access_valid(dn, where))
123 return PCIBIOS_BAD_REGISTER_NUMBER;
125 addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
126 (dn->devfn << 8) | (where & 0xff);
127 buid = dn->phb->buid;
129 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
131 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
135 return PCIBIOS_DEVICE_NOT_FOUND;
137 return PCIBIOS_SUCCESSFUL;
140 static int rtas_pci_write_config(struct pci_bus *bus,
142 int where, int size, u32 val)
144 struct device_node *busdn, *dn;
147 busdn = pci_device_to_OF_node(bus->self);
149 busdn = bus->sysdata; /* must be a phb */
151 /* Search only direct children of the bus */
152 for (dn = busdn->child; dn; dn = dn->sibling)
153 if (dn->devfn == devfn)
154 return rtas_write_config(dn, where, size, val);
155 return PCIBIOS_DEVICE_NOT_FOUND;
158 struct pci_ops rtas_pci_ops = {
159 rtas_pci_read_config,
160 rtas_pci_write_config
163 int is_python(struct device_node *dev)
165 char *model = (char *)get_property(dev, "model", NULL);
167 if (model && strstr(model, "Python"))
173 static int get_phb_reg_prop(struct device_node *dev,
174 unsigned int addr_size_words,
175 struct reg_property64 *reg)
177 unsigned int *ui_ptr = NULL, len;
179 /* Found a PHB, now figure out where his registers are mapped. */
180 ui_ptr = (unsigned int *)get_property(dev, "reg", &len);
184 if (addr_size_words == 1) {
185 reg->address = ((struct reg_property32 *)ui_ptr)->address;
186 reg->size = ((struct reg_property32 *)ui_ptr)->size;
188 *reg = *((struct reg_property64 *)ui_ptr);
194 static void python_countermeasures(struct device_node *dev,
195 unsigned int addr_size_words)
197 struct reg_property64 reg_struct;
198 void __iomem *chip_regs;
201 if (get_phb_reg_prop(dev, addr_size_words, ®_struct))
204 /* Python's register file is 1 MB in size. */
205 chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
208 * Firmware doesn't always clear this bit which is critical
209 * for good performance - Anton
212 #define PRG_CL_RESET_VALID 0x00010000
214 val = in_be32(chip_regs + 0xf6030);
215 if (val & PRG_CL_RESET_VALID) {
216 printk(KERN_INFO "Python workaround: ");
217 val &= ~PRG_CL_RESET_VALID;
218 out_be32(chip_regs + 0xf6030, val);
220 * We must read it back for changes to
223 val = in_be32(chip_regs + 0xf6030);
224 printk("reg0: %x\n", val);
230 void __init init_pci_config_tokens (void)
232 read_pci_config = rtas_token("read-pci-config");
233 write_pci_config = rtas_token("write-pci-config");
234 ibm_read_pci_config = rtas_token("ibm,read-pci-config");
235 ibm_write_pci_config = rtas_token("ibm,write-pci-config");
238 unsigned long __devinit get_phb_buid (struct device_node *phb)
241 unsigned int *buid_vals;
245 if (ibm_read_pci_config == -1) return 0;
247 /* PHB's will always be children of the root node,
248 * or so it is promised by the current firmware. */
249 if (phb->parent == NULL)
251 if (phb->parent->parent)
254 buid_vals = (unsigned int *) get_property(phb, "reg", &len);
255 if (buid_vals == NULL)
258 addr_cells = prom_n_addr_cells(phb);
259 if (addr_cells == 1) {
260 buid = (unsigned long) buid_vals[0];
262 buid = (((unsigned long)buid_vals[0]) << 32UL) |
263 (((unsigned long)buid_vals[1]) & 0xffffffff);
268 static int phb_set_bus_ranges(struct device_node *dev,
269 struct pci_controller *phb)
274 bus_range = (int *) get_property(dev, "bus-range", &len);
275 if (bus_range == NULL || len < 2 * sizeof(int)) {
279 phb->first_busno = bus_range[0];
280 phb->last_busno = bus_range[1];
285 static int __devinit setup_phb(struct device_node *dev,
286 struct pci_controller *phb,
287 unsigned int addr_size_words)
289 pci_setup_pci_controller(phb);
292 python_countermeasures(dev, addr_size_words);
294 if (phb_set_bus_ranges(dev, phb))
297 phb->arch_data = dev;
298 phb->ops = &rtas_pci_ops;
299 phb->buid = get_phb_buid(dev);
304 static void __devinit add_linux_pci_domain(struct device_node *dev,
305 struct pci_controller *phb,
306 struct property *of_prop)
308 memset(of_prop, 0, sizeof(struct property));
309 of_prop->name = "linux,pci-domain";
310 of_prop->length = sizeof(phb->global_number);
311 of_prop->value = (unsigned char *)&of_prop[1];
312 memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
313 prom_add_property(dev, of_prop);
316 static struct pci_controller * __init alloc_phb(struct device_node *dev,
317 unsigned int addr_size_words)
319 struct pci_controller *phb;
320 struct property *of_prop;
322 phb = alloc_bootmem(sizeof(struct pci_controller));
326 of_prop = alloc_bootmem(sizeof(struct property) +
327 sizeof(phb->global_number));
331 if (setup_phb(dev, phb, addr_size_words))
334 add_linux_pci_domain(dev, phb, of_prop);
339 static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node *dev, unsigned int addr_size_words)
341 struct pci_controller *phb;
343 phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller),
348 if (setup_phb(dev, phb, addr_size_words))
353 /* TODO: linux,pci-domain? */
358 unsigned long __init find_and_init_phbs(void)
360 struct device_node *node;
361 struct pci_controller *phb;
362 unsigned int root_size_cells = 0;
364 unsigned int *opprop = NULL;
365 struct device_node *root = of_find_node_by_path("/");
367 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
368 opprop = (unsigned int *)get_property(root,
369 "platform-open-pic", NULL);
372 root_size_cells = prom_n_size_cells(root);
376 for (node = of_get_next_child(root, NULL);
378 node = of_get_next_child(root, node)) {
379 if (node->type == NULL || strcmp(node->type, "pci") != 0)
382 phb = alloc_phb(node, root_size_cells);
386 pci_process_bridge_OF_ranges(phb, node);
387 pci_setup_phb_io(phb, index == 0);
389 if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
390 int addr = root_size_cells * (index + 2) - 1;
391 mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
401 * pci_probe_only and pci_assign_all_buses can be set via properties
407 prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
410 pci_probe_only = *prop;
412 prop = (int *)get_property(of_chosen,
413 "linux,pci-assign-all-buses", NULL);
415 pci_assign_all_buses = *prop;
421 struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
423 struct device_node *root = of_find_node_by_path("/");
424 unsigned int root_size_cells = 0;
425 struct pci_controller *phb;
429 root_size_cells = prom_n_size_cells(root);
431 primary = list_empty(&hose_list);
432 phb = alloc_phb_dynamic(dn, root_size_cells);
436 pci_process_bridge_OF_ranges(phb, dn);
438 pci_setup_phb_io_dynamic(phb, primary);
441 pci_devs_phb_init_dynamic(phb);
442 phb->last_busno = 0xff;
443 bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data);
445 phb->last_busno = bus->subordinate;
449 EXPORT_SYMBOL(init_phb_dynamic);
452 void pcibios_name_device(struct pci_dev *dev)
454 struct device_node *dn;
457 * Add IBM loc code (slot) as a prefix to the device names for service
459 dn = pci_device_to_OF_node(dev);
461 char *loc_code = get_property(dn, "ibm,loc-code", 0);
463 int loc_len = strlen(loc_code);
464 if (loc_len < sizeof(dev->dev.name)) {
465 memmove(dev->dev.name+loc_len+1, dev->dev.name,
466 sizeof(dev->dev.name)-loc_len-1);
467 memcpy(dev->dev.name, loc_code, loc_len);
468 dev->dev.name[loc_len] = ' ';
469 dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
474 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
477 static void check_s7a(void)
479 struct device_node *root;
482 root = of_find_node_by_path("/");
484 model = get_property(root, "model", NULL);
485 if (model && !strcmp(model, "IBM,7013-S7A"))
491 /* RPA-specific bits for removing PHBs */
492 int pcibios_remove_root_bus(struct pci_controller *phb)
494 struct pci_bus *b = phb->bus;
495 struct resource *res;
498 res = b->resource[0];
500 printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
505 rc = unmap_bus_range(b);
507 printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
508 __FUNCTION__, b->name);
512 if (release_resource(res)) {
513 printk(KERN_ERR "%s: failed to release IO on bus %s\n",
514 __FUNCTION__, b->name);
518 for (i = 1; i < 3; ++i) {
519 res = b->resource[i];
520 if (!res->flags && i == 0) {
521 printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
522 __FUNCTION__, b->name);
525 if (res->flags && release_resource(res)) {
527 "%s: failed to release IO %d on bus %s\n",
528 __FUNCTION__, i, b->name);
533 list_del(&phb->list_node);
539 EXPORT_SYMBOL(pcibios_remove_root_bus);
541 static void __init pSeries_request_regions(void)
546 request_region(0x20,0x20,"pic1");
547 request_region(0xa0,0x20,"pic2");
548 request_region(0x00,0x20,"dma1");
549 request_region(0x40,0x20,"timer");
550 request_region(0x80,0x10,"dma page reg");
551 request_region(0xc0,0x20,"dma2");
554 void __init pSeries_final_fixup(void)
556 struct pci_dev *dev = NULL;
560 for_each_pci_dev(dev) {
561 pci_read_irq_line(dev);
562 if (s7a_workaround) {
565 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
571 pSeries_request_regions();
573 pci_addr_cache_build();
577 * Assume the winbond 82c105 is the IDE controller on a
578 * p610. We should probably be more careful in case
579 * someone tries to plug in a similar adapter.
581 static void fixup_winbond_82c105(struct pci_dev* dev)
586 if (!(systemcfg->platform & PLATFORM_PSERIES))
589 printk("Using INTC for W82c105 IDE controller.\n");
590 pci_read_config_dword(dev, 0x40, ®);
591 /* Enable LEGIRQ to use INTC instead of ISA interrupts */
592 pci_write_config_dword(dev, 0x40, reg | (1<<11));
594 for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
595 /* zap the 2nd function of the winbond chip */
596 if (dev->resource[i].flags & IORESOURCE_IO
597 && dev->bus->number == 0 && dev->devfn == 0x81)
598 dev->resource[i].flags &= ~IORESOURCE_IO;
601 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
602 fixup_winbond_82c105);