2 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
3 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
5 * pSeries specific routines for PCI.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/string.h>
29 #include <asm/pci-bridge.h>
31 #include <asm/ppc-pci.h>
36 void pcibios_name_device(struct pci_dev *dev)
38 struct device_node *dn;
41 * Add IBM loc code (slot) as a prefix to the device names for service
43 dn = pci_device_to_OF_node(dev);
45 const char *loc_code = of_get_property(dn, "ibm,loc-code",
48 int loc_len = strlen(loc_code);
49 if (loc_len < sizeof(dev->dev.name)) {
50 memmove(dev->dev.name+loc_len+1, dev->dev.name,
51 sizeof(dev->dev.name)-loc_len-1);
52 memcpy(dev->dev.name, loc_code, loc_len);
53 dev->dev.name[loc_len] = ' ';
54 dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
59 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
63 #define MAX_VFS_FOR_MAP_PE 256
64 struct pe_map_bar_entry {
65 __be64 bar; /* Input: Virtual Function BAR */
66 __be16 rid; /* Input: Virtual Function Router ID */
67 __be16 pe_num; /* Output: Virtual Function PE Number */
68 __be32 reserved; /* Reserved Space */
71 int pseries_send_map_pe(struct pci_dev *pdev,
73 struct pe_map_bar_entry *vf_pe_array)
77 unsigned long buid, addr;
78 int ibm_map_pes = rtas_token("ibm,open-sriov-map-pe-number");
80 if (ibm_map_pes == RTAS_UNKNOWN_SERVICE)
83 pdn = pci_get_pdn(pdev);
84 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
85 buid = pdn->phb->buid;
86 spin_lock(&rtas_data_buf_lock);
87 memcpy(rtas_data_buf, vf_pe_array,
89 rc = rtas_call(ibm_map_pes, 5, 1, NULL, addr,
90 BUID_HI(buid), BUID_LO(buid),
92 num_vfs * sizeof(struct pe_map_bar_entry));
93 memcpy(vf_pe_array, rtas_data_buf, RTAS_DATA_BUF_SIZE);
94 spin_unlock(&rtas_data_buf_lock);
98 "%s: Failed to associate pes PE#%lx, rc=%x\n",
104 void pseries_set_pe_num(struct pci_dev *pdev, u16 vf_index, __be16 pe_num)
108 pdn = pci_get_pdn(pdev);
109 pdn->pe_num_map[vf_index] = be16_to_cpu(pe_num);
110 dev_dbg(&pdev->dev, "VF %04x:%02x:%02x.%x associated with PE#%x\n",
111 pci_domain_nr(pdev->bus),
113 PCI_SLOT(pci_iov_virtfn_devfn(pdev, vf_index)),
114 PCI_FUNC(pci_iov_virtfn_devfn(pdev, vf_index)),
115 pdn->pe_num_map[vf_index]);
118 int pseries_associate_pes(struct pci_dev *pdev, u16 num_vfs)
122 struct pe_map_bar_entry *vf_pe_array;
123 struct resource *res;
126 vf_pe_array = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
130 pdn = pci_get_pdn(pdev);
131 /* create firmware structure to associate pes */
132 for (vf_index = 0; vf_index < num_vfs; vf_index++) {
133 pdn->pe_num_map[vf_index] = IODA_INVALID_PE;
134 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
135 res = &pdev->resource[i + PCI_IOV_RESOURCES];
138 size = pcibios_iov_resource_alignment(pdev, i +
140 vf_pe_array[vf_index].bar =
141 cpu_to_be64(res->start + size * vf_index);
142 vf_pe_array[vf_index].rid =
143 cpu_to_be16((pci_iov_virtfn_bus(pdev, vf_index)
144 << 8) | pci_iov_virtfn_devfn(pdev,
146 vf_pe_array[vf_index].pe_num =
147 cpu_to_be16(IODA_INVALID_PE);
151 rc = pseries_send_map_pe(pdev, num_vfs, vf_pe_array);
152 /* Only zero is success */
154 for (vf_index = 0; vf_index < num_vfs; vf_index++)
155 pseries_set_pe_num(pdev, vf_index,
156 vf_pe_array[vf_index].pe_num);
162 int pseries_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
168 struct device_node *dn = pci_device_to_OF_node(pdev);
170 max_vfs = of_get_property(dn, "ibm,number-of-configurable-vfs", NULL);
175 /* First integer stores max config */
176 max_config_vfs = of_read_number(&max_vfs[0], 1);
177 if (max_config_vfs < num_vfs && num_vfs > MAX_VFS_FOR_MAP_PE) {
179 "Num VFs %x > %x Configurable VFs\n",
180 num_vfs, (num_vfs > MAX_VFS_FOR_MAP_PE) ?
181 MAX_VFS_FOR_MAP_PE : max_config_vfs);
185 pdn = pci_get_pdn(pdev);
186 pdn->pe_num_map = kmalloc_array(num_vfs,
187 sizeof(*pdn->pe_num_map),
189 if (!pdn->pe_num_map)
192 rc = pseries_associate_pes(pdev, num_vfs);
194 /* Anything other than zero is failure */
196 dev_err(&pdev->dev, "Failure to enable sriov: %x\n", rc);
197 kfree(pdn->pe_num_map);
199 pci_vf_drivers_autoprobe(pdev, false);
205 int pseries_pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
207 /* Allocate PCI data */
208 add_dev_pci_data(pdev);
209 return pseries_pci_sriov_enable(pdev, num_vfs);
212 int pseries_pcibios_sriov_disable(struct pci_dev *pdev)
216 pdn = pci_get_pdn(pdev);
217 /* Releasing pe_num_map */
218 kfree(pdn->pe_num_map);
219 /* Release PCI data */
220 remove_dev_pci_data(pdev);
221 pci_vf_drivers_autoprobe(pdev, true);
226 static void __init pSeries_request_regions(void)
231 request_region(0x20,0x20,"pic1");
232 request_region(0xa0,0x20,"pic2");
233 request_region(0x00,0x20,"dma1");
234 request_region(0x40,0x20,"timer");
235 request_region(0x80,0x10,"dma page reg");
236 request_region(0xc0,0x20,"dma2");
239 void __init pSeries_final_fixup(void)
241 struct pci_controller *hose;
243 pSeries_request_regions();
246 eeh_addr_cache_build();
248 #ifdef CONFIG_PCI_IOV
249 ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable;
250 ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable;
252 list_for_each_entry(hose, &hose_list, list_node) {
253 struct device_node *dn = hose->dn, *nvdn;
256 dn = of_find_all_nodes(dn);
259 nvdn = of_parse_phandle(dn, "ibm,nvlink", 0);
262 if (!of_device_is_compatible(nvdn, "ibm,npu-link"))
264 if (!of_device_is_compatible(nvdn->parent,
267 #ifdef CONFIG_PPC_POWERNV
268 WARN_ON_ONCE(pnv_npu2_init(hose));
276 * Assume the winbond 82c105 is the IDE controller on a
277 * p610/p615/p630. We should probably be more careful in case
278 * someone tries to plug in a similar adapter.
280 static void fixup_winbond_82c105(struct pci_dev* dev)
285 if (!machine_is(pseries))
288 printk("Using INTC for W82c105 IDE controller.\n");
289 pci_read_config_dword(dev, 0x40, ®);
290 /* Enable LEGIRQ to use INTC instead of ISA interrupts */
291 pci_write_config_dword(dev, 0x40, reg | (1<<11));
293 for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
294 /* zap the 2nd function of the winbond chip */
295 if (dev->resource[i].flags & IORESOURCE_IO
296 && dev->bus->number == 0 && dev->devfn == 0x81)
297 dev->resource[i].flags &= ~IORESOURCE_IO;
298 if (dev->resource[i].start == 0 && dev->resource[i].end) {
299 dev->resource[i].flags = 0;
300 dev->resource[i].end = 0;
304 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
305 fixup_winbond_82c105);
307 int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
309 struct device_node *dn, *pdn;
311 u32 pcie_link_speed_stats[2];
316 /* Rely on the pcibios_free_controller_deferred() callback. */
317 pci_set_host_bridge_release(bridge, pcibios_free_controller_deferred,
318 (void *) pci_bus_to_host(bus));
320 dn = pcibios_get_phb_of_node(bus);
324 for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
325 rc = of_property_read_u32_array(pdn,
326 "ibm,pcie-link-speed-stats",
327 &pcie_link_speed_stats[0], 2);
335 pr_debug("no ibm,pcie-link-speed-stats property\n");
339 switch (pcie_link_speed_stats[0]) {
341 bus->max_bus_speed = PCIE_SPEED_2_5GT;
344 bus->max_bus_speed = PCIE_SPEED_5_0GT;
347 bus->max_bus_speed = PCIE_SPEED_8_0GT;
350 bus->max_bus_speed = PCI_SPEED_UNKNOWN;
354 switch (pcie_link_speed_stats[1]) {
356 bus->cur_bus_speed = PCIE_SPEED_2_5GT;
359 bus->cur_bus_speed = PCIE_SPEED_5_0GT;
362 bus->cur_bus_speed = PCIE_SPEED_8_0GT;
365 bus->cur_bus_speed = PCI_SPEED_UNKNOWN;