1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * The file intends to implement the platform dependent EEH operations on pseries.
4 * Actually, the pseries platform is built based on RTAS heavily. That means the
5 * pseries platform dependent EEH operations will be built on RTAS calls. The functions
6 * are derived from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
9 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
10 * Copyright IBM Corporation 2001, 2005, 2006
11 * Copyright Dave Engebretsen & Todd Inglett 2001
12 * Copyright Linas Vepstas 2005, 2006
15 #include <linux/atomic.h>
16 #include <linux/delay.h>
17 #include <linux/export.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
21 #include <linux/pci.h>
22 #include <linux/proc_fs.h>
23 #include <linux/rbtree.h>
24 #include <linux/sched.h>
25 #include <linux/seq_file.h>
26 #include <linux/spinlock.h>
27 #include <linux/crash_dump.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
36 static int pseries_eeh_get_pe_addr(struct pci_dn *pdn);
39 static int ibm_set_eeh_option;
40 static int ibm_set_slot_reset;
41 static int ibm_read_slot_reset_state;
42 static int ibm_read_slot_reset_state2;
43 static int ibm_slot_error_detail;
44 static int ibm_get_config_addr_info;
45 static int ibm_get_config_addr_info2;
46 static int ibm_configure_pe;
48 void pseries_pcibios_bus_add_device(struct pci_dev *pdev)
50 struct pci_dn *pdn = pci_get_pdn(pdev);
52 if (eeh_has_flag(EEH_FORCE_DISABLED))
55 dev_dbg(&pdev->dev, "EEH: Setting up device\n");
57 if (pdev->is_virtfn) {
58 pdn->device_id = pdev->device;
59 pdn->vendor_id = pdev->vendor;
60 pdn->class_code = pdev->class;
62 * Last allow unfreeze return code used for retrieval
63 * by user space in eeh-sysfs to show the last command
64 * completion from platform.
66 pdn->last_allow_rc = 0;
69 pseries_eeh_init_edev(pdn);
71 if (pdev->is_virtfn) {
72 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
74 edev->pe_config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
75 eeh_rmv_from_parent_pe(edev); /* Remove as it is adding to bus pe */
76 eeh_add_to_parent_pe(edev); /* Add as VF PE type */
79 eeh_probe_device(pdev);
84 * pseries_eeh_get_config_addr - Retrieve config address
86 * Retrieve the assocated config address. Actually, there're 2 RTAS
87 * function calls dedicated for the purpose. We need implement
88 * it through the new function and then the old one. Besides,
89 * you should make sure the config address is figured out from
90 * FDT node before calling the function.
92 * It's notable that zero'ed return value means invalid PE config
95 static int pseries_eeh_get_config_addr(struct pci_controller *phb, int config_addr)
100 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
102 * First of all, we need to make sure there has one PE
103 * associated with the device. Otherwise, PE address is
106 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
107 config_addr, BUID_HI(phb->buid),
108 BUID_LO(phb->buid), 1);
109 if (ret || (rets[0] == 0))
112 /* Retrieve the associated PE config address */
113 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
114 config_addr, BUID_HI(phb->buid),
115 BUID_LO(phb->buid), 0);
117 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
118 __func__, phb->global_number, config_addr);
125 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
126 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
127 config_addr, BUID_HI(phb->buid),
128 BUID_LO(phb->buid), 0);
130 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
131 __func__, phb->global_number, config_addr);
142 * pseries_eeh_phb_reset - Reset the specified PHB
143 * @phb: PCI controller
144 * @config_adddr: the associated config address
145 * @option: reset option
147 * Reset the specified PHB/PE
149 static int pseries_eeh_phb_reset(struct pci_controller *phb, int config_addr, int option)
153 /* Reset PE through RTAS call */
154 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
155 config_addr, BUID_HI(phb->buid),
156 BUID_LO(phb->buid), option);
158 /* If fundamental-reset not supported, try hot-reset */
159 if (option == EEH_RESET_FUNDAMENTAL &&
161 option = EEH_RESET_HOT;
162 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
163 config_addr, BUID_HI(phb->buid),
164 BUID_LO(phb->buid), option);
167 /* We need reset hold or settlement delay */
168 if (option == EEH_RESET_FUNDAMENTAL ||
169 option == EEH_RESET_HOT)
170 msleep(EEH_PE_RST_HOLD_TIME);
172 msleep(EEH_PE_RST_SETTLE_TIME);
178 * pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE
179 * @phb: PCI controller
180 * @config_adddr: the associated config address
182 * The function will be called to reconfigure the bridges included
183 * in the specified PE so that the mulfunctional PE would be recovered
186 static int pseries_eeh_phb_configure_bridge(struct pci_controller *phb, int config_addr)
189 /* Waiting 0.2s maximum before skipping configuration */
192 while (max_wait > 0) {
193 ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
194 config_addr, BUID_HI(phb->buid),
203 * If RTAS returns a delay value that's above 100ms, cut it
204 * down to 100ms in case firmware made a mistake. For more
205 * on how these delay values work see rtas_busy_delay_time
207 if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
208 ret <= RTAS_EXTENDED_DELAY_MAX)
209 ret = RTAS_EXTENDED_DELAY_MIN+2;
211 max_wait -= rtas_busy_delay_time(ret);
216 rtas_busy_delay(ret);
219 pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n",
220 __func__, phb->global_number, config_addr, ret);
221 /* PAPR defines -3 as "Parameter Error" for this function: */
229 * Buffer for reporting slot-error-detail rtas calls. Its here
230 * in BSS, and not dynamically alloced, so that it ends up in
231 * RMO where RTAS can access it.
233 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
234 static DEFINE_SPINLOCK(slot_errbuf_lock);
235 static int eeh_error_buf_size;
238 * pseries_eeh_init - EEH platform dependent initialization
240 * EEH platform dependent initialization on pseries.
242 static int pseries_eeh_init(void)
244 struct pci_controller *phb;
246 int addr, config_addr;
248 /* figure out EEH RTAS function call tokens */
249 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
250 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
251 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
252 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
253 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
254 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
255 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
256 ibm_configure_pe = rtas_token("ibm,configure-pe");
259 * ibm,configure-pe and ibm,configure-bridge have the same semantics,
260 * however ibm,configure-pe can be faster. If we can't find
261 * ibm,configure-pe then fall back to using ibm,configure-bridge.
263 if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE)
264 ibm_configure_pe = rtas_token("ibm,configure-bridge");
267 * Necessary sanity check. We needn't check "get-config-addr-info"
268 * and its variant since the old firmware probably support address
269 * of domain/bus/slot/function for EEH RTAS operations.
271 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE ||
272 ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE ||
273 (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
274 ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) ||
275 ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE ||
276 ibm_configure_pe == RTAS_UNKNOWN_SERVICE) {
277 pr_info("EEH functionality not supported\n");
281 /* Initialize error log lock and size */
282 spin_lock_init(&slot_errbuf_lock);
283 eeh_error_buf_size = rtas_token("rtas-error-log-max");
284 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
285 pr_info("%s: unknown EEH error log size\n",
287 eeh_error_buf_size = 1024;
288 } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
289 pr_info("%s: EEH error log size %d exceeds the maximal %d\n",
290 __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
291 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
294 /* Set EEH probe mode */
295 eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
297 /* Set EEH machine dependent code */
298 ppc_md.pcibios_bus_add_device = pseries_pcibios_bus_add_device;
300 if (is_kdump_kernel() || reset_devices) {
301 pr_info("Issue PHB reset ...\n");
302 list_for_each_entry(phb, &hose_list, list_node) {
303 pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list);
304 addr = (pdn->busno << 16) | (pdn->devfn << 8);
305 config_addr = pseries_eeh_get_config_addr(phb, addr);
306 /* invalid PE config addr */
307 if (config_addr == 0)
310 pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_FUNDAMENTAL);
311 pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_DEACTIVATE);
312 pseries_eeh_phb_configure_bridge(phb, config_addr);
319 static int pseries_eeh_cap_start(struct pci_dn *pdn)
326 rtas_read_config(pdn, PCI_STATUS, 2, &status);
327 if (!(status & PCI_STATUS_CAP_LIST))
330 return PCI_CAPABILITY_LIST;
334 static int pseries_eeh_find_cap(struct pci_dn *pdn, int cap)
336 int pos = pseries_eeh_cap_start(pdn);
337 int cnt = 48; /* Maximal number of capabilities */
344 rtas_read_config(pdn, pos, 1, &pos);
348 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
353 pos += PCI_CAP_LIST_NEXT;
359 static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
361 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
364 int ttl = (4096 - 256) / 8;
366 if (!edev || !edev->pcie_cap)
368 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
374 if (PCI_EXT_CAP_ID(header) == cap && pos)
377 pos = PCI_EXT_CAP_NEXT(header);
381 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
389 * pseries_eeh_init_edev - initialise the eeh_dev and eeh_pe for a pci_dn
391 * @pdn: PCI device node
393 * When we discover a new PCI device via the device-tree we create a
394 * corresponding pci_dn and we allocate, but don't initialise, an eeh_dev.
395 * This function takes care of the initialisation and inserts the eeh_dev
396 * into the correct eeh_pe. If no eeh_pe exists we'll allocate one.
398 void pseries_eeh_init_edev(struct pci_dn *pdn)
400 struct eeh_dev *edev;
406 if (WARN_ON_ONCE(!eeh_has_flag(EEH_PROBE_MODE_DEVTREE)))
410 * Find the eeh_dev for this pdn. The storage for the eeh_dev was
411 * allocated at the same time as the pci_dn.
413 * XXX: We should probably re-visit that.
415 edev = pdn_to_eeh_dev(pdn);
420 * If ->pe is set then we've already probed this device. We hit
421 * this path when a pci_dev is removed and rescanned while recovering
422 * a PE (i.e. for devices where the driver doesn't support error
428 /* Check class/vendor/device IDs */
429 if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code)
432 /* Skip for PCI-ISA bridge */
433 if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
436 eeh_edev_dbg(edev, "Probing device\n");
439 * Update class code and mode of eeh device. We need
440 * correctly reflects that current device is root port
441 * or PCIe switch downstream port.
443 edev->class_code = pdn->class_code;
444 edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
445 edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
446 edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
447 edev->mode &= 0xFFFFFF00;
448 if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
449 edev->mode |= EEH_DEV_BRIDGE;
450 if (edev->pcie_cap) {
451 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
453 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
454 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
455 edev->mode |= EEH_DEV_ROOT_PORT;
456 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
457 edev->mode |= EEH_DEV_DS_PORT;
461 /* Initialize the fake PE */
462 memset(&pe, 0, sizeof(struct eeh_pe));
464 pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
466 /* Enable EEH on the device */
467 eeh_edev_dbg(edev, "Enabling EEH on device\n");
468 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
470 eeh_edev_dbg(edev, "EEH failed to enable on device (code %d)\n", ret);
472 /* Retrieve PE address */
473 edev->pe_config_addr = pseries_eeh_get_pe_addr(pdn);
474 pe.addr = edev->pe_config_addr;
476 /* Some older systems (Power4) allow the ibm,set-eeh-option
477 * call to succeed even on nodes where EEH is not supported.
478 * Verify support explicitly.
480 ret = eeh_ops->get_state(&pe, NULL);
481 if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
485 eeh_add_flag(EEH_ENABLED);
486 eeh_add_to_parent_pe(edev);
487 } else if (pdn->parent && pdn_to_eeh_dev(pdn->parent) &&
488 (pdn_to_eeh_dev(pdn->parent))->pe) {
489 /* This device doesn't support EEH, but it may have an
490 * EEH parent, in which case we mark it as supported.
492 edev->pe_config_addr = pdn_to_eeh_dev(pdn->parent)->pe_config_addr;
493 eeh_add_to_parent_pe(edev);
495 eeh_edev_dbg(edev, "EEH is %s on device (code %d)\n",
496 (enable ? "enabled" : "unsupported"), ret);
499 /* Save memory bars */
503 static struct eeh_dev *pseries_eeh_probe(struct pci_dev *pdev)
505 struct eeh_dev *edev;
508 pdn = pci_get_pdn_by_devfn(pdev->bus, pdev->devfn);
513 * If the system supports EEH on this device then the eeh_dev was
514 * configured and inserted into a PE in pseries_eeh_init_edev()
516 edev = pdn_to_eeh_dev(pdn);
517 if (!edev || !edev->pe)
524 * pseries_eeh_init_edev_recursive - Enable EEH for the indicated device
525 * @pdn: PCI device node
527 * This routine must be used to perform EEH initialization for the
528 * indicated PCI device that was added after system boot (e.g.
531 void pseries_eeh_init_edev_recursive(struct pci_dn *pdn)
538 list_for_each_entry(n, &pdn->child_list, list)
539 pseries_eeh_init_edev_recursive(n);
541 pseries_eeh_init_edev(pdn);
543 EXPORT_SYMBOL_GPL(pseries_eeh_init_edev_recursive);
546 * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
548 * @option: operation to be issued
550 * The function is used to control the EEH functionality globally.
551 * Currently, following options are support according to PAPR:
552 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
554 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
560 * When we're enabling or disabling EEH functioality on
561 * the particular PE, the PE config address is possibly
562 * unavailable. Therefore, we have to figure it out from
566 case EEH_OPT_DISABLE:
568 case EEH_OPT_THAW_MMIO:
569 case EEH_OPT_THAW_DMA:
570 config_addr = pe->config_addr;
572 config_addr = pe->addr;
574 case EEH_OPT_FREEZE_PE:
578 pr_err("%s: Invalid option %d\n",
583 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
584 config_addr, BUID_HI(pe->phb->buid),
585 BUID_LO(pe->phb->buid), option);
591 * pseries_eeh_get_pe_addr - Retrieve PE address
594 * Retrieve the assocated PE address. Actually, there're 2 RTAS
595 * function calls dedicated for the purpose. We need implement
596 * it through the new function and then the old one. Besides,
597 * you should make sure the config address is figured out from
598 * FDT node before calling the function.
600 * It's notable that zero'ed return value means invalid PE config
603 static int pseries_eeh_get_pe_addr(struct pci_dn *pdn)
605 int config_addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
606 unsigned long buid = pdn->phb->buid;
610 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
612 * First of all, we need to make sure there has one PE
613 * associated with the device. Otherwise, PE address is
616 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
617 config_addr, BUID_HI(buid), BUID_LO(buid), 1);
618 if (ret || (rets[0] == 0))
621 /* Retrieve the associated PE config address */
622 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
623 config_addr, BUID_HI(buid), BUID_LO(buid), 0);
625 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
626 __func__, pdn->phb->global_number, config_addr);
633 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
634 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
635 config_addr, BUID_HI(buid), BUID_LO(buid), 0);
637 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
638 __func__, pdn->phb->global_number, config_addr);
649 * pseries_eeh_get_state - Retrieve PE state
651 * @delay: suggested time to wait if state is unavailable
653 * Retrieve the state of the specified PE. On RTAS compliant
654 * pseries platform, there already has one dedicated RTAS function
655 * for the purpose. It's notable that the associated PE config address
656 * might be ready when calling the function. Therefore, endeavour to
657 * use the PE config address if possible. Further more, there're 2
658 * RTAS calls for the purpose, we need to try the new one and back
659 * to the old one if the new one couldn't work properly.
661 static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay)
668 /* Figure out PE config address if possible */
669 config_addr = pe->config_addr;
671 config_addr = pe->addr;
673 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
674 ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
675 config_addr, BUID_HI(pe->phb->buid),
676 BUID_LO(pe->phb->buid));
677 } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
678 /* Fake PE unavailable info */
680 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
681 config_addr, BUID_HI(pe->phb->buid),
682 BUID_LO(pe->phb->buid));
684 return EEH_STATE_NOT_SUPPORT;
690 /* Parse the result out */
692 return EEH_STATE_NOT_SUPPORT;
696 result = EEH_STATE_MMIO_ACTIVE |
697 EEH_STATE_DMA_ACTIVE;
700 result = EEH_STATE_RESET_ACTIVE |
701 EEH_STATE_MMIO_ACTIVE |
702 EEH_STATE_DMA_ACTIVE;
708 result = EEH_STATE_MMIO_ENABLED;
714 result = EEH_STATE_UNAVAILABLE;
716 result = EEH_STATE_NOT_SUPPORT;
720 result = EEH_STATE_NOT_SUPPORT;
727 * pseries_eeh_reset - Reset the specified PE
729 * @option: reset option
731 * Reset the specified PE
733 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
737 /* Figure out PE address */
738 config_addr = pe->config_addr;
740 config_addr = pe->addr;
742 return pseries_eeh_phb_reset(pe->phb, config_addr, option);
746 * pseries_eeh_get_log - Retrieve error log
748 * @severity: temporary or permanent error log
749 * @drv_log: driver log to be combined with retrieved error log
750 * @len: length of driver log
752 * Retrieve the temporary or permanent error from the PE.
753 * Actually, the error will be retrieved through the dedicated
756 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
762 spin_lock_irqsave(&slot_errbuf_lock, flags);
763 memset(slot_errbuf, 0, eeh_error_buf_size);
765 /* Figure out the PE address */
766 config_addr = pe->config_addr;
768 config_addr = pe->addr;
770 ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
771 BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
772 virt_to_phys(drv_log), len,
773 virt_to_phys(slot_errbuf), eeh_error_buf_size,
776 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
777 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
783 * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
787 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
791 /* Figure out the PE address */
792 config_addr = pe->config_addr;
794 config_addr = pe->addr;
796 return pseries_eeh_phb_configure_bridge(pe->phb, config_addr);
800 * pseries_eeh_read_config - Read PCI config space
801 * @pdn: PCI device node
802 * @where: PCI address
803 * @size: size to read
806 * Read config space from the speicifed device
808 static int pseries_eeh_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
810 return rtas_read_config(pdn, where, size, val);
814 * pseries_eeh_write_config - Write PCI config space
815 * @pdn: PCI device node
816 * @where: PCI address
817 * @size: size to write
818 * @val: value to be written
820 * Write config space to the specified device
822 static int pseries_eeh_write_config(struct pci_dn *pdn, int where, int size, u32 val)
824 return rtas_write_config(pdn, where, size, val);
827 #ifdef CONFIG_PCI_IOV
828 int pseries_send_allow_unfreeze(struct pci_dn *pdn,
829 u16 *vf_pe_array, int cur_vfs)
832 int ibm_allow_unfreeze = rtas_token("ibm,open-sriov-allow-unfreeze");
833 unsigned long buid, addr;
835 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
836 buid = pdn->phb->buid;
837 spin_lock(&rtas_data_buf_lock);
838 memcpy(rtas_data_buf, vf_pe_array, RTAS_DATA_BUF_SIZE);
839 rc = rtas_call(ibm_allow_unfreeze, 5, 1, NULL,
843 rtas_data_buf, cur_vfs * sizeof(u16));
844 spin_unlock(&rtas_data_buf_lock);
846 pr_warn("%s: Failed to allow unfreeze for PHB#%x-PE#%lx, rc=%x\n",
848 pdn->phb->global_number, addr, rc);
852 static int pseries_call_allow_unfreeze(struct eeh_dev *edev)
854 int cur_vfs = 0, rc = 0, vf_index, bus, devfn, vf_pe_num;
855 struct pci_dn *pdn, *tmp, *parent, *physfn_pdn;
858 vf_pe_array = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
861 if (pci_num_vf(edev->physfn ? edev->physfn : edev->pdev)) {
862 if (edev->pdev->is_physfn) {
863 cur_vfs = pci_num_vf(edev->pdev);
864 pdn = eeh_dev_to_pdn(edev);
865 parent = pdn->parent;
866 for (vf_index = 0; vf_index < cur_vfs; vf_index++)
867 vf_pe_array[vf_index] =
868 cpu_to_be16(pdn->pe_num_map[vf_index]);
869 rc = pseries_send_allow_unfreeze(pdn, vf_pe_array,
871 pdn->last_allow_rc = rc;
872 for (vf_index = 0; vf_index < cur_vfs; vf_index++) {
873 list_for_each_entry_safe(pdn, tmp,
876 bus = pci_iov_virtfn_bus(edev->pdev,
878 devfn = pci_iov_virtfn_devfn(edev->pdev,
880 if (pdn->busno != bus ||
883 pdn->last_allow_rc = rc;
887 pdn = pci_get_pdn(edev->pdev);
888 physfn_pdn = pci_get_pdn(edev->physfn);
890 vf_pe_num = physfn_pdn->pe_num_map[edev->vf_index];
891 vf_pe_array[0] = cpu_to_be16(vf_pe_num);
892 rc = pseries_send_allow_unfreeze(physfn_pdn,
894 pdn->last_allow_rc = rc;
902 static int pseries_notify_resume(struct pci_dn *pdn)
904 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
909 if (rtas_token("ibm,open-sriov-allow-unfreeze")
910 == RTAS_UNKNOWN_SERVICE)
913 if (edev->pdev->is_physfn || edev->pdev->is_virtfn)
914 return pseries_call_allow_unfreeze(edev);
920 static struct eeh_ops pseries_eeh_ops = {
922 .init = pseries_eeh_init,
923 .probe = pseries_eeh_probe,
924 .set_option = pseries_eeh_set_option,
925 .get_state = pseries_eeh_get_state,
926 .reset = pseries_eeh_reset,
927 .get_log = pseries_eeh_get_log,
928 .configure_bridge = pseries_eeh_configure_bridge,
930 .read_config = pseries_eeh_read_config,
931 .write_config = pseries_eeh_write_config,
933 .restore_config = NULL, /* NB: configure_bridge() does this */
934 #ifdef CONFIG_PCI_IOV
935 .notify_resume = pseries_notify_resume
940 * eeh_pseries_init - Register platform dependent EEH operations
942 * EEH initialization on pseries platform. This function should be
943 * called before any EEH related functions.
945 static int __init eeh_pseries_init(void)
949 ret = eeh_ops_register(&pseries_eeh_ops);
951 pr_info("EEH: pSeries platform initialized\n");
953 pr_info("EEH: pSeries platform initialization failure (%d)\n",
958 machine_early_initcall(pseries, eeh_pseries_init);