1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * The file intends to implement the platform dependent EEH operations on pseries.
4 * Actually, the pseries platform is built based on RTAS heavily. That means the
5 * pseries platform dependent EEH operations will be built on RTAS calls. The functions
6 * are derived from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
9 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
10 * Copyright IBM Corporation 2001, 2005, 2006
11 * Copyright Dave Engebretsen & Todd Inglett 2001
12 * Copyright Linas Vepstas 2005, 2006
15 #include <linux/atomic.h>
16 #include <linux/delay.h>
17 #include <linux/export.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
21 #include <linux/pci.h>
22 #include <linux/proc_fs.h>
23 #include <linux/rbtree.h>
24 #include <linux/sched.h>
25 #include <linux/seq_file.h>
26 #include <linux/spinlock.h>
27 #include <linux/crash_dump.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
36 static int pseries_eeh_get_pe_addr(struct pci_dn *pdn);
39 static int ibm_set_eeh_option;
40 static int ibm_set_slot_reset;
41 static int ibm_read_slot_reset_state;
42 static int ibm_read_slot_reset_state2;
43 static int ibm_slot_error_detail;
44 static int ibm_get_config_addr_info;
45 static int ibm_get_config_addr_info2;
46 static int ibm_configure_pe;
48 void pseries_pcibios_bus_add_device(struct pci_dev *pdev)
50 struct pci_dn *pdn = pci_get_pdn(pdev);
52 if (eeh_has_flag(EEH_FORCE_DISABLED))
55 dev_dbg(&pdev->dev, "EEH: Setting up device\n");
57 if (pdev->is_virtfn) {
58 pdn->device_id = pdev->device;
59 pdn->vendor_id = pdev->vendor;
60 pdn->class_code = pdev->class;
62 * Last allow unfreeze return code used for retrieval
63 * by user space in eeh-sysfs to show the last command
64 * completion from platform.
66 pdn->last_allow_rc = 0;
69 pseries_eeh_init_edev(pdn);
71 if (pdev->is_virtfn) {
73 * FIXME: This really should be handled by choosing the right
74 * parent PE in in pseries_eeh_init_edev().
76 struct eeh_pe *physfn_pe = pci_dev_to_eeh_dev(pdev->physfn)->pe;
77 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
79 edev->pe_config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
80 eeh_pe_tree_remove(edev); /* Remove as it is adding to bus pe */
81 eeh_pe_tree_insert(edev, physfn_pe); /* Add as VF PE type */
84 eeh_probe_device(pdev);
89 * pseries_eeh_get_config_addr - Retrieve config address
91 * Retrieve the assocated config address. Actually, there're 2 RTAS
92 * function calls dedicated for the purpose. We need implement
93 * it through the new function and then the old one. Besides,
94 * you should make sure the config address is figured out from
95 * FDT node before calling the function.
97 * It's notable that zero'ed return value means invalid PE config
100 static int pseries_eeh_get_config_addr(struct pci_controller *phb, int config_addr)
105 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
107 * First of all, we need to make sure there has one PE
108 * associated with the device. Otherwise, PE address is
111 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
112 config_addr, BUID_HI(phb->buid),
113 BUID_LO(phb->buid), 1);
114 if (ret || (rets[0] == 0))
117 /* Retrieve the associated PE config address */
118 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
119 config_addr, BUID_HI(phb->buid),
120 BUID_LO(phb->buid), 0);
122 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
123 __func__, phb->global_number, config_addr);
130 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
131 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
132 config_addr, BUID_HI(phb->buid),
133 BUID_LO(phb->buid), 0);
135 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
136 __func__, phb->global_number, config_addr);
147 * pseries_eeh_phb_reset - Reset the specified PHB
148 * @phb: PCI controller
149 * @config_adddr: the associated config address
150 * @option: reset option
152 * Reset the specified PHB/PE
154 static int pseries_eeh_phb_reset(struct pci_controller *phb, int config_addr, int option)
158 /* Reset PE through RTAS call */
159 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
160 config_addr, BUID_HI(phb->buid),
161 BUID_LO(phb->buid), option);
163 /* If fundamental-reset not supported, try hot-reset */
164 if (option == EEH_RESET_FUNDAMENTAL && ret == -8) {
165 option = EEH_RESET_HOT;
166 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
167 config_addr, BUID_HI(phb->buid),
168 BUID_LO(phb->buid), option);
171 /* We need reset hold or settlement delay */
172 if (option == EEH_RESET_FUNDAMENTAL || option == EEH_RESET_HOT)
173 msleep(EEH_PE_RST_HOLD_TIME);
175 msleep(EEH_PE_RST_SETTLE_TIME);
181 * pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE
182 * @phb: PCI controller
183 * @config_adddr: the associated config address
185 * The function will be called to reconfigure the bridges included
186 * in the specified PE so that the mulfunctional PE would be recovered
189 static int pseries_eeh_phb_configure_bridge(struct pci_controller *phb, int config_addr)
192 /* Waiting 0.2s maximum before skipping configuration */
195 while (max_wait > 0) {
196 ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
197 config_addr, BUID_HI(phb->buid),
206 * If RTAS returns a delay value that's above 100ms, cut it
207 * down to 100ms in case firmware made a mistake. For more
208 * on how these delay values work see rtas_busy_delay_time
210 if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
211 ret <= RTAS_EXTENDED_DELAY_MAX)
212 ret = RTAS_EXTENDED_DELAY_MIN+2;
214 max_wait -= rtas_busy_delay_time(ret);
219 rtas_busy_delay(ret);
222 pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n",
223 __func__, phb->global_number, config_addr, ret);
224 /* PAPR defines -3 as "Parameter Error" for this function: */
232 * Buffer for reporting slot-error-detail rtas calls. Its here
233 * in BSS, and not dynamically alloced, so that it ends up in
234 * RMO where RTAS can access it.
236 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
237 static DEFINE_SPINLOCK(slot_errbuf_lock);
238 static int eeh_error_buf_size;
240 static int pseries_eeh_cap_start(struct pci_dn *pdn)
247 rtas_read_config(pdn, PCI_STATUS, 2, &status);
248 if (!(status & PCI_STATUS_CAP_LIST))
251 return PCI_CAPABILITY_LIST;
255 static int pseries_eeh_find_cap(struct pci_dn *pdn, int cap)
257 int pos = pseries_eeh_cap_start(pdn);
258 int cnt = 48; /* Maximal number of capabilities */
265 rtas_read_config(pdn, pos, 1, &pos);
269 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
274 pos += PCI_CAP_LIST_NEXT;
280 static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
282 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
285 int ttl = (4096 - 256) / 8;
287 if (!edev || !edev->pcie_cap)
289 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
295 if (PCI_EXT_CAP_ID(header) == cap && pos)
298 pos = PCI_EXT_CAP_NEXT(header);
302 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
310 * pseries_eeh_pe_get_parent - Retrieve the parent PE
313 * The whole PEs existing in the system are organized as hierarchy
314 * tree. The function is used to retrieve the parent PE according
315 * to the parent EEH device.
317 static struct eeh_pe *pseries_eeh_pe_get_parent(struct eeh_dev *edev)
319 struct eeh_dev *parent;
320 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
323 * It might have the case for the indirect parent
324 * EEH device already having associated PE, but
325 * the direct parent EEH device doesn't have yet.
328 pdn = pci_get_pdn(edev->physfn);
330 pdn = pdn ? pdn->parent : NULL;
332 /* We're poking out of PCI territory */
333 parent = pdn_to_eeh_dev(pdn);
347 * pseries_eeh_init_edev - initialise the eeh_dev and eeh_pe for a pci_dn
349 * @pdn: PCI device node
351 * When we discover a new PCI device via the device-tree we create a
352 * corresponding pci_dn and we allocate, but don't initialise, an eeh_dev.
353 * This function takes care of the initialisation and inserts the eeh_dev
354 * into the correct eeh_pe. If no eeh_pe exists we'll allocate one.
356 void pseries_eeh_init_edev(struct pci_dn *pdn)
358 struct eeh_dev *edev;
364 if (WARN_ON_ONCE(!eeh_has_flag(EEH_PROBE_MODE_DEVTREE)))
368 * Find the eeh_dev for this pdn. The storage for the eeh_dev was
369 * allocated at the same time as the pci_dn.
371 * XXX: We should probably re-visit that.
373 edev = pdn_to_eeh_dev(pdn);
378 * If ->pe is set then we've already probed this device. We hit
379 * this path when a pci_dev is removed and rescanned while recovering
380 * a PE (i.e. for devices where the driver doesn't support error
386 /* Check class/vendor/device IDs */
387 if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code)
390 /* Skip for PCI-ISA bridge */
391 if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
394 eeh_edev_dbg(edev, "Probing device\n");
397 * Update class code and mode of eeh device. We need
398 * correctly reflects that current device is root port
399 * or PCIe switch downstream port.
401 edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
402 edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
403 edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
404 edev->mode &= 0xFFFFFF00;
405 if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
406 edev->mode |= EEH_DEV_BRIDGE;
407 if (edev->pcie_cap) {
408 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
410 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
411 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
412 edev->mode |= EEH_DEV_ROOT_PORT;
413 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
414 edev->mode |= EEH_DEV_DS_PORT;
418 /* Initialize the fake PE */
419 memset(&pe, 0, sizeof(struct eeh_pe));
421 pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
423 /* Enable EEH on the device */
424 eeh_edev_dbg(edev, "Enabling EEH on device\n");
425 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
427 eeh_edev_dbg(edev, "EEH failed to enable on device (code %d)\n", ret);
429 struct eeh_pe *parent;
431 /* Retrieve PE address */
432 edev->pe_config_addr = pseries_eeh_get_pe_addr(pdn);
433 pe.addr = edev->pe_config_addr;
435 /* Some older systems (Power4) allow the ibm,set-eeh-option
436 * call to succeed even on nodes where EEH is not supported.
437 * Verify support explicitly.
439 ret = eeh_ops->get_state(&pe, NULL);
440 if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
444 * This device doesn't support EEH, but it may have an
445 * EEH parent. In this case any error on the device will
446 * freeze the PE of it's upstream bridge, so added it to
449 parent = pseries_eeh_pe_get_parent(edev);
450 if (parent && !enable)
451 edev->pe_config_addr = parent->addr;
453 if (enable || parent) {
454 eeh_add_flag(EEH_ENABLED);
455 eeh_pe_tree_insert(edev, parent);
457 eeh_edev_dbg(edev, "EEH is %s on device (code %d)\n",
458 (enable ? "enabled" : "unsupported"), ret);
461 /* Save memory bars */
465 static struct eeh_dev *pseries_eeh_probe(struct pci_dev *pdev)
467 struct eeh_dev *edev;
470 pdn = pci_get_pdn_by_devfn(pdev->bus, pdev->devfn);
475 * If the system supports EEH on this device then the eeh_dev was
476 * configured and inserted into a PE in pseries_eeh_init_edev()
478 edev = pdn_to_eeh_dev(pdn);
479 if (!edev || !edev->pe)
486 * pseries_eeh_init_edev_recursive - Enable EEH for the indicated device
487 * @pdn: PCI device node
489 * This routine must be used to perform EEH initialization for the
490 * indicated PCI device that was added after system boot (e.g.
493 void pseries_eeh_init_edev_recursive(struct pci_dn *pdn)
500 list_for_each_entry(n, &pdn->child_list, list)
501 pseries_eeh_init_edev_recursive(n);
503 pseries_eeh_init_edev(pdn);
505 EXPORT_SYMBOL_GPL(pseries_eeh_init_edev_recursive);
508 * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
510 * @option: operation to be issued
512 * The function is used to control the EEH functionality globally.
513 * Currently, following options are support according to PAPR:
514 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
516 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
522 * When we're enabling or disabling EEH functioality on
523 * the particular PE, the PE config address is possibly
524 * unavailable. Therefore, we have to figure it out from
528 case EEH_OPT_DISABLE:
530 case EEH_OPT_THAW_MMIO:
531 case EEH_OPT_THAW_DMA:
532 config_addr = pe->config_addr;
534 config_addr = pe->addr;
536 case EEH_OPT_FREEZE_PE:
540 pr_err("%s: Invalid option %d\n", __func__, option);
544 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
545 config_addr, BUID_HI(pe->phb->buid),
546 BUID_LO(pe->phb->buid), option);
552 * pseries_eeh_get_pe_addr - Retrieve PE address
555 * Retrieve the assocated PE address. Actually, there're 2 RTAS
556 * function calls dedicated for the purpose. We need implement
557 * it through the new function and then the old one. Besides,
558 * you should make sure the config address is figured out from
559 * FDT node before calling the function.
561 * It's notable that zero'ed return value means invalid PE config
564 static int pseries_eeh_get_pe_addr(struct pci_dn *pdn)
566 int config_addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
567 unsigned long buid = pdn->phb->buid;
571 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
573 * First of all, we need to make sure there has one PE
574 * associated with the device. Otherwise, PE address is
577 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
578 config_addr, BUID_HI(buid), BUID_LO(buid), 1);
579 if (ret || (rets[0] == 0))
582 /* Retrieve the associated PE config address */
583 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
584 config_addr, BUID_HI(buid), BUID_LO(buid), 0);
586 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
587 __func__, pdn->phb->global_number, config_addr);
594 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
595 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
596 config_addr, BUID_HI(buid), BUID_LO(buid), 0);
598 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
599 __func__, pdn->phb->global_number, config_addr);
610 * pseries_eeh_get_state - Retrieve PE state
612 * @delay: suggested time to wait if state is unavailable
614 * Retrieve the state of the specified PE. On RTAS compliant
615 * pseries platform, there already has one dedicated RTAS function
616 * for the purpose. It's notable that the associated PE config address
617 * might be ready when calling the function. Therefore, endeavour to
618 * use the PE config address if possible. Further more, there're 2
619 * RTAS calls for the purpose, we need to try the new one and back
620 * to the old one if the new one couldn't work properly.
622 static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay)
629 /* Figure out PE config address if possible */
630 config_addr = pe->config_addr;
632 config_addr = pe->addr;
634 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
635 ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
636 config_addr, BUID_HI(pe->phb->buid),
637 BUID_LO(pe->phb->buid));
638 } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
639 /* Fake PE unavailable info */
641 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
642 config_addr, BUID_HI(pe->phb->buid),
643 BUID_LO(pe->phb->buid));
645 return EEH_STATE_NOT_SUPPORT;
651 /* Parse the result out */
653 return EEH_STATE_NOT_SUPPORT;
657 result = EEH_STATE_MMIO_ACTIVE |
658 EEH_STATE_DMA_ACTIVE;
661 result = EEH_STATE_RESET_ACTIVE |
662 EEH_STATE_MMIO_ACTIVE |
663 EEH_STATE_DMA_ACTIVE;
669 result = EEH_STATE_MMIO_ENABLED;
675 result = EEH_STATE_UNAVAILABLE;
677 result = EEH_STATE_NOT_SUPPORT;
681 result = EEH_STATE_NOT_SUPPORT;
688 * pseries_eeh_reset - Reset the specified PE
690 * @option: reset option
692 * Reset the specified PE
694 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
698 /* Figure out PE address */
699 config_addr = pe->config_addr;
701 config_addr = pe->addr;
703 return pseries_eeh_phb_reset(pe->phb, config_addr, option);
707 * pseries_eeh_get_log - Retrieve error log
709 * @severity: temporary or permanent error log
710 * @drv_log: driver log to be combined with retrieved error log
711 * @len: length of driver log
713 * Retrieve the temporary or permanent error from the PE.
714 * Actually, the error will be retrieved through the dedicated
717 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
723 spin_lock_irqsave(&slot_errbuf_lock, flags);
724 memset(slot_errbuf, 0, eeh_error_buf_size);
726 /* Figure out the PE address */
727 config_addr = pe->config_addr;
729 config_addr = pe->addr;
731 ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
732 BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
733 virt_to_phys(drv_log), len,
734 virt_to_phys(slot_errbuf), eeh_error_buf_size,
737 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
738 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
744 * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
748 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
752 /* Figure out the PE address */
753 config_addr = pe->config_addr;
755 config_addr = pe->addr;
757 return pseries_eeh_phb_configure_bridge(pe->phb, config_addr);
761 * pseries_eeh_read_config - Read PCI config space
762 * @edev: EEH device handle
763 * @where: PCI config space offset
764 * @size: size to read
767 * Read config space from the speicifed device
769 static int pseries_eeh_read_config(struct eeh_dev *edev, int where, int size, u32 *val)
771 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
773 return rtas_read_config(pdn, where, size, val);
777 * pseries_eeh_write_config - Write PCI config space
778 * @edev: EEH device handle
779 * @where: PCI config space offset
780 * @size: size to write
781 * @val: value to be written
783 * Write config space to the specified device
785 static int pseries_eeh_write_config(struct eeh_dev *edev, int where, int size, u32 val)
787 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
789 return rtas_write_config(pdn, where, size, val);
792 #ifdef CONFIG_PCI_IOV
793 int pseries_send_allow_unfreeze(struct pci_dn *pdn,
794 u16 *vf_pe_array, int cur_vfs)
797 int ibm_allow_unfreeze = rtas_token("ibm,open-sriov-allow-unfreeze");
798 unsigned long buid, addr;
800 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
801 buid = pdn->phb->buid;
802 spin_lock(&rtas_data_buf_lock);
803 memcpy(rtas_data_buf, vf_pe_array, RTAS_DATA_BUF_SIZE);
804 rc = rtas_call(ibm_allow_unfreeze, 5, 1, NULL,
808 rtas_data_buf, cur_vfs * sizeof(u16));
809 spin_unlock(&rtas_data_buf_lock);
811 pr_warn("%s: Failed to allow unfreeze for PHB#%x-PE#%lx, rc=%x\n",
813 pdn->phb->global_number, addr, rc);
817 static int pseries_call_allow_unfreeze(struct eeh_dev *edev)
819 int cur_vfs = 0, rc = 0, vf_index, bus, devfn, vf_pe_num;
820 struct pci_dn *pdn, *tmp, *parent, *physfn_pdn;
823 vf_pe_array = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
826 if (pci_num_vf(edev->physfn ? edev->physfn : edev->pdev)) {
827 if (edev->pdev->is_physfn) {
828 cur_vfs = pci_num_vf(edev->pdev);
829 pdn = eeh_dev_to_pdn(edev);
830 parent = pdn->parent;
831 for (vf_index = 0; vf_index < cur_vfs; vf_index++)
832 vf_pe_array[vf_index] =
833 cpu_to_be16(pdn->pe_num_map[vf_index]);
834 rc = pseries_send_allow_unfreeze(pdn, vf_pe_array,
836 pdn->last_allow_rc = rc;
837 for (vf_index = 0; vf_index < cur_vfs; vf_index++) {
838 list_for_each_entry_safe(pdn, tmp,
841 bus = pci_iov_virtfn_bus(edev->pdev,
843 devfn = pci_iov_virtfn_devfn(edev->pdev,
845 if (pdn->busno != bus ||
848 pdn->last_allow_rc = rc;
852 pdn = pci_get_pdn(edev->pdev);
853 physfn_pdn = pci_get_pdn(edev->physfn);
855 vf_pe_num = physfn_pdn->pe_num_map[edev->vf_index];
856 vf_pe_array[0] = cpu_to_be16(vf_pe_num);
857 rc = pseries_send_allow_unfreeze(physfn_pdn,
859 pdn->last_allow_rc = rc;
867 static int pseries_notify_resume(struct eeh_dev *edev)
872 if (rtas_token("ibm,open-sriov-allow-unfreeze") == RTAS_UNKNOWN_SERVICE)
875 if (edev->pdev->is_physfn || edev->pdev->is_virtfn)
876 return pseries_call_allow_unfreeze(edev);
882 static struct eeh_ops pseries_eeh_ops = {
884 .probe = pseries_eeh_probe,
885 .set_option = pseries_eeh_set_option,
886 .get_state = pseries_eeh_get_state,
887 .reset = pseries_eeh_reset,
888 .get_log = pseries_eeh_get_log,
889 .configure_bridge = pseries_eeh_configure_bridge,
891 .read_config = pseries_eeh_read_config,
892 .write_config = pseries_eeh_write_config,
894 .restore_config = NULL, /* NB: configure_bridge() does this */
895 #ifdef CONFIG_PCI_IOV
896 .notify_resume = pseries_notify_resume
901 * eeh_pseries_init - Register platform dependent EEH operations
903 * EEH initialization on pseries platform. This function should be
904 * called before any EEH related functions.
906 static int __init eeh_pseries_init(void)
908 struct pci_controller *phb;
910 int ret, addr, config_addr;
912 /* figure out EEH RTAS function call tokens */
913 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
914 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
915 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
916 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
917 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
918 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
919 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
920 ibm_configure_pe = rtas_token("ibm,configure-pe");
923 * ibm,configure-pe and ibm,configure-bridge have the same semantics,
924 * however ibm,configure-pe can be faster. If we can't find
925 * ibm,configure-pe then fall back to using ibm,configure-bridge.
927 if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE)
928 ibm_configure_pe = rtas_token("ibm,configure-bridge");
931 * Necessary sanity check. We needn't check "get-config-addr-info"
932 * and its variant since the old firmware probably support address
933 * of domain/bus/slot/function for EEH RTAS operations.
935 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE ||
936 ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE ||
937 (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
938 ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) ||
939 ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE ||
940 ibm_configure_pe == RTAS_UNKNOWN_SERVICE) {
941 pr_info("EEH functionality not supported\n");
945 /* Initialize error log lock and size */
946 spin_lock_init(&slot_errbuf_lock);
947 eeh_error_buf_size = rtas_token("rtas-error-log-max");
948 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
949 pr_info("%s: unknown EEH error log size\n",
951 eeh_error_buf_size = 1024;
952 } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
953 pr_info("%s: EEH error log size %d exceeds the maximal %d\n",
954 __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
955 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
958 /* Set EEH probe mode */
959 eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
961 /* Set EEH machine dependent code */
962 ppc_md.pcibios_bus_add_device = pseries_pcibios_bus_add_device;
964 if (is_kdump_kernel() || reset_devices) {
965 pr_info("Issue PHB reset ...\n");
966 list_for_each_entry(phb, &hose_list, list_node) {
967 pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list);
968 addr = (pdn->busno << 16) | (pdn->devfn << 8);
969 config_addr = pseries_eeh_get_config_addr(phb, addr);
970 /* invalid PE config addr */
971 if (config_addr == 0)
974 pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_FUNDAMENTAL);
975 pseries_eeh_phb_reset(phb, config_addr, EEH_RESET_DEACTIVATE);
976 pseries_eeh_phb_configure_bridge(phb, config_addr);
980 ret = eeh_init(&pseries_eeh_ops);
982 pr_info("EEH: pSeries platform initialized\n");
984 pr_info("EEH: pSeries platform initialization failure (%d)\n",
988 machine_core_initcall_sync(pseries, eeh_pseries_init);