arch/powerpc/platforms/powernv/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * PowerNV setup code.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7
   8 #undef DEBUG
   9
  10 #include <linux/cpu.h>
  11 #include <linux/errno.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/tty.h>
  15 #include <linux/reboot.h>
  16 #include <linux/init.h>
  17 #include <linux/console.h>
  18 #include <linux/delay.h>
  19 #include <linux/irq.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/of.h>
  22 #include <linux/of_fdt.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bug.h>
  25 #include <linux/pci.h>
  26 #include <linux/cpufreq.h>
  27 #include <linux/memblock.h>
  28
  29 #include <asm/machdep.h>
  30 #include <asm/firmware.h>
  31 #include <asm/xics.h>
  32 #include <asm/xive.h>
  33 #include <asm/opal.h>
  34 #include <asm/kexec.h>
  35 #include <asm/smp.h>
  36 #include <asm/tm.h>
  37 #include <asm/setup.h>
  38 #include <asm/security_features.h>
  39
  40 #include "powernv.h"
  41
  42
  43 static bool fw_feature_is(const char *state, const char *name,
  44                           struct device_node *fw_features)
  45 {
  46         struct device_node *np;
  47         bool rc = false;
  48
  49         np = of_get_child_by_name(fw_features, name);
  50         if (np) {
  51                 rc = of_property_read_bool(np, state);
  52                 of_node_put(np);
  53         }
  54
  55         return rc;
  56 }
  57
  58 static void init_fw_feat_flags(struct device_node *np)
  59 {
  60         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  61                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  62
  63         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  64                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  65
  66         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  67                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  71
  72         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  73                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  74
  75         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  76                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  79                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  80
  81         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  82                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  83
  84         /*
  85          * The features below are enabled by default, so we instead look to see
  86          * if firmware has *disabled* them, and clear them if so.
  87          */
  88         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  89                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  93
  94         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  95                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  96
  97         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  98                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  99 }
 100
 101 static void pnv_setup_rfi_flush(void)
 102 {
 103         struct device_node *np, *fw_features;
 104         enum l1d_flush_type type;
 105         bool enable;
 106
 107         /* Default to fallback in case fw-features are not available */
 108         type = L1D_FLUSH_FALLBACK;
 109
 110         np = of_find_node_by_name(NULL, "ibm,opal");
 111         fw_features = of_get_child_by_name(np, "fw-features");
 112         of_node_put(np);
 113
 114         if (fw_features) {
 115                 init_fw_feat_flags(fw_features);
 116                 of_node_put(fw_features);
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 119                         type = L1D_FLUSH_MTTRIG;
 120
 121                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 122                         type = L1D_FLUSH_ORI;
 123         }
 124
 125         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 126                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 127                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 128
 129         setup_rfi_flush(type, enable);
 130         setup_count_cache_flush();
 131 }
 132
 133 static void __init pnv_setup_arch(void)
 134 {
 135         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 136
 137         pnv_setup_rfi_flush();
 138         setup_stf_barrier();
 139
 140         /* Initialize SMP */
 141         pnv_smp_init();
 142
 143         /* Setup PCI */
 144         pnv_pci_init();
 145
 146         /* Setup RTC and NVRAM callbacks */
 147         if (firmware_has_feature(FW_FEATURE_OPAL))
 148                 opal_nvram_init();
 149
 150         /* Enable NAP mode */
 151         powersave_nap = 1;
 152
 153         /* XXX PMCS */
 154 }
 155
 156 static void __init pnv_init(void)
 157 {
 158         /*
 159          * Initialize the LPC bus now so that legacy serial
 160          * ports can be found on it
 161          */
 162         opal_lpc_init();
 163
 164 #ifdef CONFIG_HVC_OPAL
 165         if (firmware_has_feature(FW_FEATURE_OPAL))
 166                 hvc_opal_init_early();
 167         else
 168 #endif
 169                 add_preferred_console("hvc", 0, NULL);
 170
 171         if (!radix_enabled()) {
 172                 int i;
 173
 174                 /* Allocate per cpu area to save old slb contents during MCE */
 175                 for_each_possible_cpu(i)
 176                         paca_ptrs[i]->mce_faulty_slbs = memblock_alloc_node(mmu_slb_size, __alignof__(*paca_ptrs[i]->mce_faulty_slbs), cpu_to_node(i));
 177         }
 178 }
 179
 180 static void __init pnv_init_IRQ(void)
 181 {
 182         /* Try using a XIVE if available, otherwise use a XICS */
 183         if (!xive_native_init())
 184                 xics_init();
 185
 186         WARN_ON(!ppc_md.get_irq);
 187 }
 188
 189 static void pnv_show_cpuinfo(struct seq_file *m)
 190 {
 191         struct device_node *root;
 192         const char *model = "";
 193
 194         root = of_find_node_by_path("/");
 195         if (root)
 196                 model = of_get_property(root, "model", NULL);
 197         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 198         if (firmware_has_feature(FW_FEATURE_OPAL))
 199                 seq_printf(m, "firmware\t: OPAL\n");
 200         else
 201                 seq_printf(m, "firmware\t: BML\n");
 202         of_node_put(root);
 203         if (radix_enabled())
 204                 seq_printf(m, "MMU\t\t: Radix\n");
 205         else
 206                 seq_printf(m, "MMU\t\t: Hash\n");
 207 }
 208
 209 static void pnv_prepare_going_down(void)
 210 {
 211         /*
 212          * Disable all notifiers from OPAL, we can't
 213          * service interrupts anymore anyway
 214          */
 215         opal_event_shutdown();
 216
 217         /* Print flash update message if one is scheduled. */
 218         opal_flash_update_print_message();
 219
 220         smp_send_stop();
 221
 222         hard_irq_disable();
 223 }
 224
 225 static void  __noreturn pnv_restart(char *cmd)
 226 {
 227         long rc;
 228
 229         pnv_prepare_going_down();
 230
 231         do {
 232                 if (!cmd || !strlen(cmd))
 233                         rc = opal_cec_reboot();
 234                 else if (strcmp(cmd, "full") == 0)
 235                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 236                 else if (strcmp(cmd, "mpipl") == 0)
 237                         rc = opal_cec_reboot2(OPAL_REBOOT_MPIPL, NULL);
 238                 else if (strcmp(cmd, "error") == 0)
 239                         rc = opal_cec_reboot2(OPAL_REBOOT_PLATFORM_ERROR, NULL);
 240                 else if (strcmp(cmd, "fast") == 0)
 241                         rc = opal_cec_reboot2(OPAL_REBOOT_FAST, NULL);
 242                 else
 243                         rc = OPAL_UNSUPPORTED;
 244
 245                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 246                         /* Opal is busy wait for some time and retry */
 247                         opal_poll_events(NULL);
 248                         mdelay(10);
 249
 250                 } else  if (cmd && rc) {
 251                         /* Unknown error while issuing reboot */
 252                         if (rc == OPAL_UNSUPPORTED)
 253                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 254                         else
 255                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 256                                        cmd, rc);
 257                         pr_info("Forcing a cec-reboot\n");
 258                         cmd = NULL;
 259                         rc = OPAL_BUSY;
 260
 261                 } else if (rc != OPAL_SUCCESS) {
 262                         /* Unknown error while issuing cec-reboot */
 263                         pr_err("Unable to reboot. Err=%ld\n", rc);
 264                 }
 265
 266         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 267
 268         for (;;)
 269                 opal_poll_events(NULL);
 270 }
 271
 272 static void __noreturn pnv_power_off(void)
 273 {
 274         long rc = OPAL_BUSY;
 275
 276         pnv_prepare_going_down();
 277
 278         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 279                 rc = opal_cec_power_down(0);
 280                 if (rc == OPAL_BUSY_EVENT)
 281                         opal_poll_events(NULL);
 282                 else
 283                         mdelay(10);
 284         }
 285         for (;;)
 286                 opal_poll_events(NULL);
 287 }
 288
 289 static void __noreturn pnv_halt(void)
 290 {
 291         pnv_power_off();
 292 }
 293
 294 static void pnv_progress(char *s, unsigned short hex)
 295 {
 296 }
 297
 298 static void pnv_shutdown(void)
 299 {
 300         /* Let the PCI code clear up IODA tables */
 301         pnv_pci_shutdown();
 302
 303         /*
 304          * Stop OPAL activity: Unregister all OPAL interrupts so they
 305          * don't fire up while we kexec and make sure all potentially
 306          * DMA'ing ops are complete (such as dump retrieval).
 307          */
 308         opal_shutdown();
 309 }
 310
 311 #ifdef CONFIG_KEXEC_CORE
 312 static void pnv_kexec_wait_secondaries_down(void)
 313 {
 314         int my_cpu, i, notified = -1;
 315
 316         my_cpu = get_cpu();
 317
 318         for_each_online_cpu(i) {
 319                 uint8_t status;
 320                 int64_t rc, timeout = 1000;
 321
 322                 if (i == my_cpu)
 323                         continue;
 324
 325                 for (;;) {
 326                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 327                                                    &status);
 328                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 329                                 break;
 330                         barrier();
 331                         if (i != notified) {
 332                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 333                                        "(physical %d) to enter OPAL\n",
 334                                        i, paca_ptrs[i]->hw_cpu_id);
 335                                 notified = i;
 336                         }
 337
 338                         /*
 339                          * On crash secondaries might be unreachable or hung,
 340                          * so timeout if we've waited too long
 341                          * */
 342                         mdelay(1);
 343                         if (timeout-- == 0) {
 344                                 printk(KERN_ERR "kexec: timed out waiting for "
 345                                        "cpu %d (physical %d) to enter OPAL\n",
 346                                        i, paca_ptrs[i]->hw_cpu_id);
 347                                 break;
 348                         }
 349                 }
 350         }
 351 }
 352
 353 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 354 {
 355         u64 reinit_flags;
 356
 357         if (xive_enabled())
 358                 xive_teardown_cpu();
 359         else
 360                 xics_kexec_teardown_cpu(secondary);
 361
 362         /* On OPAL, we return all CPUs to firmware */
 363         if (!firmware_has_feature(FW_FEATURE_OPAL))
 364                 return;
 365
 366         if (secondary) {
 367                 /* Return secondary CPUs to firmware on OPAL v3 */
 368                 mb();
 369                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 370                 mb();
 371
 372                 /* Return the CPU to OPAL */
 373                 opal_return_cpu();
 374         } else {
 375                 /* Primary waits for the secondaries to have reached OPAL */
 376                 pnv_kexec_wait_secondaries_down();
 377
 378                 /* Switch XIVE back to emulation mode */
 379                 if (xive_enabled())
 380                         xive_shutdown();
 381
 382                 /*
 383                  * We might be running as little-endian - now that interrupts
 384                  * are disabled, reset the HILE bit to big-endian so we don't
 385                  * take interrupts in the wrong endian later
 386                  *
 387                  * We reinit to enable both radix and hash on P9 to ensure
 388                  * the mode used by the next kernel is always supported.
 389                  */
 390                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 391                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 392                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 393                                 OPAL_REINIT_CPUS_MMU_HASH;
 394                 opal_reinit_cpus(reinit_flags);
 395         }
 396 }
 397 #endif /* CONFIG_KEXEC_CORE */
 398
 399 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 400 static unsigned long pnv_memory_block_size(void)
 401 {
 402         /*
 403          * We map the kernel linear region with 1GB large pages on radix. For
 404          * memory hot unplug to work our memory block size must be at least
 405          * this size.
 406          */
 407         if (radix_enabled())
 408                 return radix_mem_block_size;
 409         else
 410                 return 256UL * 1024 * 1024;
 411 }
 412 #endif
 413
 414 static void __init pnv_setup_machdep_opal(void)
 415 {
 416         ppc_md.get_boot_time = opal_get_boot_time;
 417         ppc_md.restart = pnv_restart;
 418         pm_power_off = pnv_power_off;
 419         ppc_md.halt = pnv_halt;
 420         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 421         ppc_md.machine_check_exception = opal_machine_check;
 422         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 423         if (opal_check_token(OPAL_HANDLE_HMI2))
 424                 ppc_md.hmi_exception_early = opal_hmi_exception_early2;
 425         else
 426                 ppc_md.hmi_exception_early = opal_hmi_exception_early;
 427         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 428 }
 429
 430 static int __init pnv_probe(void)
 431 {
 432         if (!of_machine_is_compatible("ibm,powernv"))
 433                 return 0;
 434
 435         if (firmware_has_feature(FW_FEATURE_OPAL))
 436                 pnv_setup_machdep_opal();
 437
 438         pr_debug("PowerNV detected !\n");
 439
 440         pnv_init();
 441
 442         return 1;
 443 }
 444
 445 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 446 void __init pnv_tm_init(void)
 447 {
 448         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 449             !pvr_version_is(PVR_POWER9) ||
 450             early_cpu_has_feature(CPU_FTR_TM))
 451                 return;
 452
 453         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 454                 return;
 455
 456         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 457         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 458         /* Make sure "normal" HTM is off (it should be) */
 459         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 460         /* Turn on no suspend mode, and HTM no SC */
 461         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 462                                             PPC_FEATURE2_HTM_NOSC;
 463         tm_suspend_disabled = true;
 464 }
 465 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 466
 467 /*
 468  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 469  * /proc/cpuinfo
 470  */
 471 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 472 {
 473         unsigned long ret_freq;
 474
 475         ret_freq = cpufreq_get(cpu) * 1000ul;
 476
 477         /*
 478          * If the backend cpufreq driver does not exist,
 479          * then fallback to old way of reporting the clockrate.
 480          */
 481         if (!ret_freq)
 482                 ret_freq = ppc_proc_freq;
 483         return ret_freq;
 484 }
 485
 486 static long pnv_machine_check_early(struct pt_regs *regs)
 487 {
 488         long handled = 0;
 489
 490         if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
 491                 handled = cur_cpu_spec->machine_check_early(regs);
 492
 493         return handled;
 494 }
 495
 496 define_machine(powernv) {
 497         .name                   = "PowerNV",
 498         .probe                  = pnv_probe,
 499         .setup_arch             = pnv_setup_arch,
 500         .init_IRQ               = pnv_init_IRQ,
 501         .show_cpuinfo           = pnv_show_cpuinfo,
 502         .get_proc_freq          = pnv_get_proc_freq,
 503         .progress               = pnv_progress,
 504         .machine_shutdown       = pnv_shutdown,
 505         .power_save             = NULL,
 506         .calibrate_decr         = generic_calibrate_decr,
 507         .machine_check_early    = pnv_machine_check_early,
 508 #ifdef CONFIG_KEXEC_CORE
 509         .kexec_cpu_down         = pnv_kexec_cpu_down,
 510 #endif
 511 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 512         .memory_block_size      = pnv_memory_block_size,
 513 #endif
 514 };