2 * The file intends to implement the platform dependent EEH operations on
3 * powernv platform. Actually, the powernv was created in order to fully
6 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/atomic.h>
15 #include <linux/delay.h>
16 #include <linux/export.h>
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/msi.h>
21 #include <linux/pci.h>
22 #include <linux/proc_fs.h>
23 #include <linux/rbtree.h>
24 #include <linux/sched.h>
25 #include <linux/seq_file.h>
26 #include <linux/spinlock.h>
29 #include <asm/eeh_event.h>
30 #include <asm/firmware.h>
32 #include <asm/iommu.h>
33 #include <asm/machdep.h>
34 #include <asm/msi_bitmap.h>
36 #include <asm/ppc-pci.h>
42 * powernv_eeh_init - EEH platform dependent initialization
44 * EEH platform dependent initialization on powernv
46 static int powernv_eeh_init(void)
48 /* We require OPALv3 */
49 if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
50 pr_warning("%s: OPALv3 is required !\n", __func__);
54 /* Set EEH probe mode */
55 eeh_probe_mode_set(EEH_PROBE_MODE_DEV);
61 * powernv_eeh_post_init - EEH platform dependent post initialization
63 * EEH platform dependent post initialization on powernv. When
64 * the function is called, the EEH PEs and devices should have
65 * been built. If the I/O cache staff has been built, EEH is
66 * ready to supply service.
68 static int powernv_eeh_post_init(void)
70 struct pci_controller *hose;
74 list_for_each_entry(hose, &hose_list, list_node) {
75 phb = hose->private_data;
77 if (phb->eeh_ops && phb->eeh_ops->post_init) {
78 ret = phb->eeh_ops->post_init(hose);
88 * powernv_eeh_dev_probe - Do probe on PCI device
92 * When EEH module is installed during system boot, all PCI devices
93 * are checked one by one to see if it supports EEH. The function
94 * is introduced for the purpose. By default, EEH has been enabled
95 * on all PCI devices. That's to say, we only need do necessary
96 * initialization on the corresponding eeh device and create PE
99 * It's notable that's unsafe to retrieve the EEH device through
100 * the corresponding PCI device. During the PCI device hotplug, which
101 * was possiblly triggered by EEH core, the binding between EEH device
102 * and the PCI device isn't built yet.
104 static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
106 struct pci_controller *hose = pci_bus_to_host(dev->bus);
107 struct pnv_phb *phb = hose->private_data;
108 struct device_node *dn = pci_device_to_OF_node(dev);
109 struct eeh_dev *edev = of_node_to_eeh_dev(dn);
112 * When probing the root bridge, which doesn't have any
113 * subordinate PCI devices. We don't have OF node for
114 * the root bridge. So it's not reasonable to continue
117 if (!dn || !edev || edev->pe)
120 /* Skip for PCI-ISA bridge */
121 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
124 /* Initialize eeh device */
125 edev->class_code = dev->class;
126 edev->mode &= 0xFFFFFF00;
127 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
128 edev->mode |= EEH_DEV_BRIDGE;
129 if (pci_is_pcie(dev)) {
130 edev->pcie_cap = pci_pcie_cap(dev);
132 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
133 edev->mode |= EEH_DEV_ROOT_PORT;
134 else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
135 edev->mode |= EEH_DEV_DS_PORT;
138 edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
139 edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
142 eeh_add_to_parent_pe(edev);
145 * Enable EEH explicitly so that we will do EEH check
146 * while accessing I/O stuff
148 eeh_subsystem_enabled = 1;
150 /* Save memory bars */
157 * powernv_eeh_set_option - Initialize EEH or MMIO/DMA reenable
159 * @option: operation to be issued
161 * The function is used to control the EEH functionality globally.
162 * Currently, following options are support according to PAPR:
163 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
165 static int powernv_eeh_set_option(struct eeh_pe *pe, int option)
167 struct pci_controller *hose = pe->phb;
168 struct pnv_phb *phb = hose->private_data;
172 * What we need do is pass it down for hardware
173 * implementation to handle it.
175 if (phb->eeh_ops && phb->eeh_ops->set_option)
176 ret = phb->eeh_ops->set_option(pe, option);
182 * powernv_eeh_get_pe_addr - Retrieve PE address
185 * Retrieve the PE address according to the given tranditional
186 * PCI BDF (Bus/Device/Function) address.
188 static int powernv_eeh_get_pe_addr(struct eeh_pe *pe)
194 * powernv_eeh_get_state - Retrieve PE state
196 * @delay: delay while PE state is temporarily unavailable
198 * Retrieve the state of the specified PE. For IODA-compitable
199 * platform, it should be retrieved from IODA table. Therefore,
200 * we prefer passing down to hardware implementation to handle
203 static int powernv_eeh_get_state(struct eeh_pe *pe, int *delay)
205 struct pci_controller *hose = pe->phb;
206 struct pnv_phb *phb = hose->private_data;
207 int ret = EEH_STATE_NOT_SUPPORT;
209 if (phb->eeh_ops && phb->eeh_ops->get_state) {
210 ret = phb->eeh_ops->get_state(pe);
213 * If the PE state is temporarily unavailable,
214 * to inform the EEH core delay for default
219 if (ret & EEH_STATE_UNAVAILABLE)
228 * powernv_eeh_reset - Reset the specified PE
230 * @option: reset option
232 * Reset the specified PE
234 static int powernv_eeh_reset(struct eeh_pe *pe, int option)
236 struct pci_controller *hose = pe->phb;
237 struct pnv_phb *phb = hose->private_data;
240 if (phb->eeh_ops && phb->eeh_ops->reset)
241 ret = phb->eeh_ops->reset(pe, option);
247 * powernv_eeh_wait_state - Wait for PE state
249 * @max_wait: maximal period in microsecond
251 * Wait for the state of associated PE. It might take some time
252 * to retrieve the PE's state.
254 static int powernv_eeh_wait_state(struct eeh_pe *pe, int max_wait)
260 ret = powernv_eeh_get_state(pe, &mwait);
263 * If the PE's state is temporarily unavailable,
264 * we have to wait for the specified time. Otherwise,
265 * the PE's state will be returned immediately.
267 if (ret != EEH_STATE_UNAVAILABLE)
272 pr_warning("%s: Timeout getting PE#%x's state (%d)\n",
273 __func__, pe->addr, max_wait);
274 return EEH_STATE_NOT_SUPPORT;
280 return EEH_STATE_NOT_SUPPORT;
284 * powernv_eeh_get_log - Retrieve error log
286 * @severity: temporary or permanent error log
287 * @drv_log: driver log to be combined with retrieved error log
288 * @len: length of driver log
290 * Retrieve the temporary or permanent error from the PE.
292 static int powernv_eeh_get_log(struct eeh_pe *pe, int severity,
293 char *drv_log, unsigned long len)
295 struct pci_controller *hose = pe->phb;
296 struct pnv_phb *phb = hose->private_data;
299 if (phb->eeh_ops && phb->eeh_ops->get_log)
300 ret = phb->eeh_ops->get_log(pe, severity, drv_log, len);
306 * powernv_eeh_configure_bridge - Configure PCI bridges in the indicated PE
309 * The function will be called to reconfigure the bridges included
310 * in the specified PE so that the mulfunctional PE would be recovered
313 static int powernv_eeh_configure_bridge(struct eeh_pe *pe)
315 struct pci_controller *hose = pe->phb;
316 struct pnv_phb *phb = hose->private_data;
319 if (phb->eeh_ops && phb->eeh_ops->configure_bridge)
320 ret = phb->eeh_ops->configure_bridge(pe);
326 * powernv_eeh_next_error - Retrieve next EEH error to handle
329 * Using OPAL API, to retrieve next EEH error for EEH core to handle
331 static int powernv_eeh_next_error(struct eeh_pe **pe)
333 struct pci_controller *hose;
334 struct pnv_phb *phb = NULL;
336 list_for_each_entry(hose, &hose_list, list_node) {
337 phb = hose->private_data;
341 if (phb && phb->eeh_ops->next_error)
342 return phb->eeh_ops->next_error(pe);
347 static int powernv_eeh_restore_config(struct device_node *dn)
349 struct eeh_dev *edev = of_node_to_eeh_dev(dn);
356 phb = edev->phb->private_data;
357 ret = opal_pci_reinit(phb->opal_id,
358 OPAL_REINIT_PCI_DEV, edev->config_addr);
360 pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
361 __func__, edev->config_addr, ret);
368 static struct eeh_ops powernv_eeh_ops = {
370 .init = powernv_eeh_init,
371 .post_init = powernv_eeh_post_init,
373 .dev_probe = powernv_eeh_dev_probe,
374 .set_option = powernv_eeh_set_option,
375 .get_pe_addr = powernv_eeh_get_pe_addr,
376 .get_state = powernv_eeh_get_state,
377 .reset = powernv_eeh_reset,
378 .wait_state = powernv_eeh_wait_state,
379 .get_log = powernv_eeh_get_log,
380 .configure_bridge = powernv_eeh_configure_bridge,
381 .read_config = pnv_pci_cfg_read,
382 .write_config = pnv_pci_cfg_write,
383 .next_error = powernv_eeh_next_error,
384 .restore_config = powernv_eeh_restore_config
388 * eeh_powernv_init - Register platform dependent EEH operations
390 * EEH initialization on powernv platform. This function should be
391 * called before any EEH related functions.
393 static int __init eeh_powernv_init(void)
397 if (!machine_is(powernv))
400 ret = eeh_ops_register(&powernv_eeh_ops);
402 pr_info("EEH: PowerNV platform initialized\n");
404 pr_info("EEH: Failed to initialize PowerNV platform (%d)\n", ret);
409 early_initcall(eeh_powernv_init);