4 select HAVE_VIRT_CPU_ACCOUNTING
6 This option selects whether a 32-bit or a 64-bit kernel
9 menu "Processor support"
11 prompt "Processor Type"
14 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
17 embedded 512x/52xx/82xx/83xx/86xx counterparts.
18 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
46 bool "AMCC 44x, 46x or 47x"
59 prompt "Processor Type"
62 There are two families of 64 bit PowerPC chips supported.
63 The most common ones are the desktop and server CPUs
64 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
66 The other are the "embedded" processors compliant with the
67 "Book 3E" variant of the architecture
70 bool "Server processors"
72 select PPC_HAVE_PMU_SUPPORT
73 select SYS_SUPPORTS_HUGETLBFS
76 bool "Embedded processors"
77 select PPC_FPU # Make it a choice ?
78 select PPC_SMP_MUXED_IPI
84 prompt "CPU selection"
88 This will create a kernel which is optimised for a particular CPU.
89 The resulting kernel may not run on other CPUs, so use this with care.
91 If unsure, select Generic.
97 bool "Cell Broadband Engine"
115 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
119 depends on PPC_BOOK3E_64
123 depends on PPC32 && PPC_BOOK3S
124 select PPC_HAVE_PMU_SUPPORT
127 depends on PPC64 && PPC_BOOK3S
131 depends on PPC64 && PPC_BOOK3S
136 depends on PPC_BOOK3E_64
139 bool "Optimize for Cell Broadband Engine"
140 depends on PPC64 && PPC_BOOK3S
142 Cause the compiler to optimize for the PPE of the Cell Broadband
143 Engine. This will make the code run considerably faster on Cell
144 but somewhat slower on other machines. This option only changes
145 the scheduling of instructions, not the selection of instructions
146 itself, so the resulting kernel will keep running on all other
149 # this is temp to handle compat with arch=ppc
154 select FSL_EMB_PERFMON
155 select PPC_FSL_BOOK3E
159 bool "e500mc Support"
163 This must be enabled for running on e500mc (and derivatives
164 such as e5500/e6500), and must be disabled for running on
171 config FSL_EMB_PERFMON
172 bool "Freescale Embedded Perfmon"
173 depends on E500 || PPC_83xx
175 This is the Performance Monitor support found on the e500 core
176 and some e300 cores (c3 and c4). Select this only if your
177 core supports the Embedded Performance Monitor APU
179 config FSL_EMB_PERF_EVENT
181 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
184 config FSL_EMB_PERF_EVENT_E500
186 depends on FSL_EMB_PERF_EVENT && E500
191 depends on 40x || 44x
196 depends on E200 || E500 || 44x || PPC_BOOK3E
201 depends on (E200 || E500) && PPC32
204 # this is for common code between PPC32 & PPC64 FSL BOOKE
205 config PPC_FSL_BOOK3E
207 select FSL_EMB_PERFMON
208 select PPC_SMP_MUXED_IPI
209 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
211 default y if FSL_BOOKE
215 depends on 44x || E500 || PPC_86xx
216 default y if PHYS_64BIT
219 bool 'Large physical address support' if E500 || PPC_86xx
220 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
222 This option enables kernel support for larger than 32-bit physical
223 addresses. This feature may not be available on all cores.
225 If you have more than 3.5GB of RAM or so, you also need to enable
226 SWIOTLB under Kernel Options for this to work. The actual number
227 is platform-dependent.
229 If in doubt, say N here.
232 bool "AltiVec Support"
233 depends on 6xx || POWER4
235 This option enables kernel support for the Altivec extensions to the
236 PowerPC processor. The kernel currently supports saving and restoring
237 altivec registers, and turning on the 'altivec enable' bit so user
238 processes can execute altivec instructions.
240 This option is only usefully if you have a processor that supports
241 altivec (G4, otherwise known as 74xx series), but does not have
242 any affect on a non-altivec cpu (it does, however add code to the
245 If in doubt, say Y here.
249 depends on POWER4 && ALTIVEC && PPC_FPU
252 This option enables kernel support for the Vector Scaler extensions
253 to the PowerPC processor. The kernel currently supports saving and
254 restoring VSX registers, and turning on the 'VSX enable' bit so user
255 processes can execute VSX instructions.
257 This option is only useful if you have a processor that supports
258 VSX (P7 and above), but does not have any affect on a non-VSX
259 CPUs (it does, however add code to the kernel).
261 If in doubt, say Y here.
264 bool "Support for PowerPC icswx coprocessor instruction"
265 depends on POWER4 || PPC_A2
269 This option enables kernel support for the PowerPC Initiate
270 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
273 This option is only useful if you have a processor that supports
274 the icswx coprocessor instruction. It does not have any effect
275 on processors without the icswx coprocessor instruction.
277 This option slightly increases kernel memory usage.
279 If in doubt, say N here.
282 bool "icswx requires direct PID management"
283 depends on PPC_ICSWX && POWER4
286 The PID register in server is used explicitly for ICSWX. In
287 embedded systems PID management is done by the system.
289 config PPC_ICSWX_USE_SIGILL
290 bool "Should a bad CT cause a SIGILL?"
294 Should a bad CT used for "non-record form ICSWX" cause an
295 illegal instruction signal or should it be silent as
298 If in doubt, say N here.
302 depends on E200 || (E500 && !PPC_E500MC)
305 This option enables kernel support for the Signal Processing
306 Extensions (SPE) to the PowerPC processor. The kernel currently
307 supports saving and restoring SPE registers, and turning on the
308 'spe enable' bit so user processes can execute SPE instructions.
310 This option is only useful if you have a processor that supports
311 SPE (e500, otherwise known as 85xx series), but does not have any
312 effect on a non-spe cpu (it does, however add code to the kernel).
314 If in doubt, say Y here.
318 depends on PPC_BOOK3S
320 config PPC_STD_MMU_32
322 depends on PPC_STD_MMU && PPC32
324 config PPC_STD_MMU_64
326 depends on PPC_STD_MMU && PPC64
328 config PPC_MMU_NOHASH
330 depends on !PPC_STD_MMU
332 config PPC_BOOK3E_MMU
334 depends on FSL_BOOKE || PPC_BOOK3E
338 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
341 config PPC_HAVE_PMU_SUPPORT
346 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
348 This enables the powerpc-specific perf_event back-end.
351 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
352 bool "Symmetric multi-processing support"
354 This enables support for systems with more than one CPU. If you have
355 a system with only one CPU, say N. If you have a system with more
356 than one CPU, say Y. Note that the kernel does not currently
357 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
358 since they have inadequate hardware support for multiprocessor
361 If you say N here, the kernel will run on single and multiprocessor
362 machines, but will use only one CPU of a multiprocessor machine. If
363 you say Y here, the kernel will run on single-processor machines.
364 On a single-processor machine, the kernel will run faster if you say
367 If you don't know what to do here, say N.
370 int "Maximum number of CPUs (2-8192)"
373 default "32" if PPC64
376 config NOT_COHERENT_CACHE
378 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
382 config CHECK_CACHE_COHERENCY