1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Floating-point, VMX/Altivec and VSX loads and stores
4 * for use in instruction emulation.
6 * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
9 #include <asm/processor.h>
10 #include <asm/ppc_asm.h>
11 #include <asm/ppc-opcode.h>
13 #include <asm/asm-offsets.h>
14 #include <asm/asm-compat.h>
15 #include <linux/errno.h>
19 #define STKFRM (PPC_MIN_STKFRM + 16)
21 /* Get the contents of frN into *p; N is in r3 and p is in r4. */
45 /* Put the contents of *p into frN; N is in r3 and p is in r4. */
70 /* Get the contents of vrN into *p; N is in r3 and p is in r4. */
74 oris r7, r6, MSR_VEC@h
94 /* Put the contents of *p into vrN; N is in r3 and p is in r4. */
98 oris r7, r6, MSR_VEC@h
117 #endif /* CONFIG_ALTIVEC */
120 /* Get the contents of vsN into vs0; N is in r3. */
125 blr /* vs0 is already in vs0 */
139 /* Put the contents of vs0 into vsN; N is in r3. */
144 blr /* v0 is already in v0 */
158 /* Load VSX reg N from vector doubleword *p. N is in r3, p in r4. */
160 PPC_STLU r1,-STKFRM(r1)
162 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
172 #ifdef __LITTLE_ENDIAN__
178 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
185 /* Store VSX reg N to vector doubleword *p. N is in r3, p in r4. */
187 PPC_STLU r1,-STKFRM(r1)
189 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
197 #ifdef __LITTLE_ENDIAN__
202 PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
209 #endif /* CONFIG_VSX */
211 /* Convert single-precision to double, without disturbing FPRs. */
212 /* conv_sp_to_dp(float *sp, double *dp) */
213 _GLOBAL(conv_sp_to_dp)
226 /* Convert single-precision to double, without disturbing FPRs. */
227 /* conv_sp_to_dp(double *dp, float *sp) */
228 _GLOBAL(conv_dp_to_sp)
241 #endif /* CONFIG_PPC_FPU */