Merge tag 'tty-4.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
[linux-2.6-microblaze.git] / arch / powerpc / kvm / booke.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17  *
18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20  *          Scott Wood <scottwood@freescale.com>
21  *          Varun Sethi <varun.sethi@freescale.com>
22  */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <linux/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
46
47 unsigned long kvmppc_booke_handlers;
48
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
51
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53         { "mmio",       VCPU_STAT(mmio_exits) },
54         { "sig",        VCPU_STAT(signal_exits) },
55         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
56         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
57         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
58         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
59         { "sysc",       VCPU_STAT(syscall_exits) },
60         { "isi",        VCPU_STAT(isi_exits) },
61         { "dsi",        VCPU_STAT(dsi_exits) },
62         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
63         { "dec",        VCPU_STAT(dec_exits) },
64         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
65         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
67         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
68         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
69         { "doorbell", VCPU_STAT(dbell_exits) },
70         { "guest doorbell", VCPU_STAT(gdbell_exits) },
71         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
72         { NULL }
73 };
74
75 /* TODO: use vcpu_printf() */
76 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
77 {
78         int i;
79
80         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
81         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
82         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
83                                             vcpu->arch.shared->srr1);
84
85         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
86
87         for (i = 0; i < 32; i += 4) {
88                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
89                        kvmppc_get_gpr(vcpu, i),
90                        kvmppc_get_gpr(vcpu, i+1),
91                        kvmppc_get_gpr(vcpu, i+2),
92                        kvmppc_get_gpr(vcpu, i+3));
93         }
94 }
95
96 #ifdef CONFIG_SPE
97 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
98 {
99         preempt_disable();
100         enable_kernel_spe();
101         kvmppc_save_guest_spe(vcpu);
102         disable_kernel_spe();
103         vcpu->arch.shadow_msr &= ~MSR_SPE;
104         preempt_enable();
105 }
106
107 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
108 {
109         preempt_disable();
110         enable_kernel_spe();
111         kvmppc_load_guest_spe(vcpu);
112         disable_kernel_spe();
113         vcpu->arch.shadow_msr |= MSR_SPE;
114         preempt_enable();
115 }
116
117 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
118 {
119         if (vcpu->arch.shared->msr & MSR_SPE) {
120                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
121                         kvmppc_vcpu_enable_spe(vcpu);
122         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
123                 kvmppc_vcpu_disable_spe(vcpu);
124         }
125 }
126 #else
127 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
128 {
129 }
130 #endif
131
132 /*
133  * Load up guest vcpu FP state if it's needed.
134  * It also set the MSR_FP in thread so that host know
135  * we're holding FPU, and then host can help to save
136  * guest vcpu FP state if other threads require to use FPU.
137  * This simulates an FP unavailable fault.
138  *
139  * It requires to be called with preemption disabled.
140  */
141 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
142 {
143 #ifdef CONFIG_PPC_FPU
144         if (!(current->thread.regs->msr & MSR_FP)) {
145                 enable_kernel_fp();
146                 load_fp_state(&vcpu->arch.fp);
147                 disable_kernel_fp();
148                 current->thread.fp_save_area = &vcpu->arch.fp;
149                 current->thread.regs->msr |= MSR_FP;
150         }
151 #endif
152 }
153
154 /*
155  * Save guest vcpu FP state into thread.
156  * It requires to be called with preemption disabled.
157  */
158 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
159 {
160 #ifdef CONFIG_PPC_FPU
161         if (current->thread.regs->msr & MSR_FP)
162                 giveup_fpu(current);
163         current->thread.fp_save_area = NULL;
164 #endif
165 }
166
167 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
168 {
169 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
170         /* We always treat the FP bit as enabled from the host
171            perspective, so only need to adjust the shadow MSR */
172         vcpu->arch.shadow_msr &= ~MSR_FP;
173         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
174 #endif
175 }
176
177 /*
178  * Simulate AltiVec unavailable fault to load guest state
179  * from thread to AltiVec unit.
180  * It requires to be called with preemption disabled.
181  */
182 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
183 {
184 #ifdef CONFIG_ALTIVEC
185         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
186                 if (!(current->thread.regs->msr & MSR_VEC)) {
187                         enable_kernel_altivec();
188                         load_vr_state(&vcpu->arch.vr);
189                         disable_kernel_altivec();
190                         current->thread.vr_save_area = &vcpu->arch.vr;
191                         current->thread.regs->msr |= MSR_VEC;
192                 }
193         }
194 #endif
195 }
196
197 /*
198  * Save guest vcpu AltiVec state into thread.
199  * It requires to be called with preemption disabled.
200  */
201 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
202 {
203 #ifdef CONFIG_ALTIVEC
204         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
205                 if (current->thread.regs->msr & MSR_VEC)
206                         giveup_altivec(current);
207                 current->thread.vr_save_area = NULL;
208         }
209 #endif
210 }
211
212 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
213 {
214         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
215 #ifndef CONFIG_KVM_BOOKE_HV
216         vcpu->arch.shadow_msr &= ~MSR_DE;
217         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
218 #endif
219
220         /* Force enable debug interrupts when user space wants to debug */
221         if (vcpu->guest_debug) {
222 #ifdef CONFIG_KVM_BOOKE_HV
223                 /*
224                  * Since there is no shadow MSR, sync MSR_DE into the guest
225                  * visible MSR.
226                  */
227                 vcpu->arch.shared->msr |= MSR_DE;
228 #else
229                 vcpu->arch.shadow_msr |= MSR_DE;
230                 vcpu->arch.shared->msr &= ~MSR_DE;
231 #endif
232         }
233 }
234
235 /*
236  * Helper function for "full" MSR writes.  No need to call this if only
237  * EE/CE/ME/DE/RI are changing.
238  */
239 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
240 {
241         u32 old_msr = vcpu->arch.shared->msr;
242
243 #ifdef CONFIG_KVM_BOOKE_HV
244         new_msr |= MSR_GS;
245 #endif
246
247         vcpu->arch.shared->msr = new_msr;
248
249         kvmppc_mmu_msr_notify(vcpu, old_msr);
250         kvmppc_vcpu_sync_spe(vcpu);
251         kvmppc_vcpu_sync_fpu(vcpu);
252         kvmppc_vcpu_sync_debug(vcpu);
253 }
254
255 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
256                                        unsigned int priority)
257 {
258         trace_kvm_booke_queue_irqprio(vcpu, priority);
259         set_bit(priority, &vcpu->arch.pending_exceptions);
260 }
261
262 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
263                                  ulong dear_flags, ulong esr_flags)
264 {
265         vcpu->arch.queued_dear = dear_flags;
266         vcpu->arch.queued_esr = esr_flags;
267         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
268 }
269
270 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
271                                     ulong dear_flags, ulong esr_flags)
272 {
273         vcpu->arch.queued_dear = dear_flags;
274         vcpu->arch.queued_esr = esr_flags;
275         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
276 }
277
278 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
279 {
280         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
281 }
282
283 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
284 {
285         vcpu->arch.queued_esr = esr_flags;
286         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
287 }
288
289 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
290                                         ulong esr_flags)
291 {
292         vcpu->arch.queued_dear = dear_flags;
293         vcpu->arch.queued_esr = esr_flags;
294         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
295 }
296
297 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
298 {
299         vcpu->arch.queued_esr = esr_flags;
300         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
301 }
302
303 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
304 {
305         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
306 }
307
308 #ifdef CONFIG_ALTIVEC
309 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
310 {
311         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
312 }
313 #endif
314
315 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
316 {
317         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
318 }
319
320 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
321 {
322         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
323 }
324
325 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
326 {
327         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
328 }
329
330 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
331                                 struct kvm_interrupt *irq)
332 {
333         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
334
335         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
336                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
337
338         kvmppc_booke_queue_irqprio(vcpu, prio);
339 }
340
341 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
342 {
343         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
344         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
345 }
346
347 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
348 {
349         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
350 }
351
352 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
353 {
354         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
355 }
356
357 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
358 {
359         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
360 }
361
362 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
363 {
364         clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
365 }
366
367 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
368 {
369         kvmppc_set_srr0(vcpu, srr0);
370         kvmppc_set_srr1(vcpu, srr1);
371 }
372
373 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
374 {
375         vcpu->arch.csrr0 = srr0;
376         vcpu->arch.csrr1 = srr1;
377 }
378
379 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
380 {
381         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
382                 vcpu->arch.dsrr0 = srr0;
383                 vcpu->arch.dsrr1 = srr1;
384         } else {
385                 set_guest_csrr(vcpu, srr0, srr1);
386         }
387 }
388
389 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
390 {
391         vcpu->arch.mcsrr0 = srr0;
392         vcpu->arch.mcsrr1 = srr1;
393 }
394
395 /* Deliver the interrupt of the corresponding priority, if possible. */
396 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
397                                         unsigned int priority)
398 {
399         int allowed = 0;
400         ulong msr_mask = 0;
401         bool update_esr = false, update_dear = false, update_epr = false;
402         ulong crit_raw = vcpu->arch.shared->critical;
403         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
404         bool crit;
405         bool keep_irq = false;
406         enum int_class int_class;
407         ulong new_msr = vcpu->arch.shared->msr;
408
409         /* Truncate crit indicators in 32 bit mode */
410         if (!(vcpu->arch.shared->msr & MSR_SF)) {
411                 crit_raw &= 0xffffffff;
412                 crit_r1 &= 0xffffffff;
413         }
414
415         /* Critical section when crit == r1 */
416         crit = (crit_raw == crit_r1);
417         /* ... and we're in supervisor mode */
418         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
419
420         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
421                 priority = BOOKE_IRQPRIO_EXTERNAL;
422                 keep_irq = true;
423         }
424
425         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
426                 update_epr = true;
427
428         switch (priority) {
429         case BOOKE_IRQPRIO_DTLB_MISS:
430         case BOOKE_IRQPRIO_DATA_STORAGE:
431         case BOOKE_IRQPRIO_ALIGNMENT:
432                 update_dear = true;
433                 /* fall through */
434         case BOOKE_IRQPRIO_INST_STORAGE:
435         case BOOKE_IRQPRIO_PROGRAM:
436                 update_esr = true;
437                 /* fall through */
438         case BOOKE_IRQPRIO_ITLB_MISS:
439         case BOOKE_IRQPRIO_SYSCALL:
440         case BOOKE_IRQPRIO_FP_UNAVAIL:
441 #ifdef CONFIG_SPE_POSSIBLE
442         case BOOKE_IRQPRIO_SPE_UNAVAIL:
443         case BOOKE_IRQPRIO_SPE_FP_DATA:
444         case BOOKE_IRQPRIO_SPE_FP_ROUND:
445 #endif
446 #ifdef CONFIG_ALTIVEC
447         case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
448         case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
449 #endif
450         case BOOKE_IRQPRIO_AP_UNAVAIL:
451                 allowed = 1;
452                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
453                 int_class = INT_CLASS_NONCRIT;
454                 break;
455         case BOOKE_IRQPRIO_WATCHDOG:
456         case BOOKE_IRQPRIO_CRITICAL:
457         case BOOKE_IRQPRIO_DBELL_CRIT:
458                 allowed = vcpu->arch.shared->msr & MSR_CE;
459                 allowed = allowed && !crit;
460                 msr_mask = MSR_ME;
461                 int_class = INT_CLASS_CRIT;
462                 break;
463         case BOOKE_IRQPRIO_MACHINE_CHECK:
464                 allowed = vcpu->arch.shared->msr & MSR_ME;
465                 allowed = allowed && !crit;
466                 int_class = INT_CLASS_MC;
467                 break;
468         case BOOKE_IRQPRIO_DECREMENTER:
469         case BOOKE_IRQPRIO_FIT:
470                 keep_irq = true;
471                 /* fall through */
472         case BOOKE_IRQPRIO_EXTERNAL:
473         case BOOKE_IRQPRIO_DBELL:
474                 allowed = vcpu->arch.shared->msr & MSR_EE;
475                 allowed = allowed && !crit;
476                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
477                 int_class = INT_CLASS_NONCRIT;
478                 break;
479         case BOOKE_IRQPRIO_DEBUG:
480                 allowed = vcpu->arch.shared->msr & MSR_DE;
481                 allowed = allowed && !crit;
482                 msr_mask = MSR_ME;
483                 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
484                         int_class = INT_CLASS_DBG;
485                 else
486                         int_class = INT_CLASS_CRIT;
487
488                 break;
489         }
490
491         if (allowed) {
492                 switch (int_class) {
493                 case INT_CLASS_NONCRIT:
494                         set_guest_srr(vcpu, vcpu->arch.pc,
495                                       vcpu->arch.shared->msr);
496                         break;
497                 case INT_CLASS_CRIT:
498                         set_guest_csrr(vcpu, vcpu->arch.pc,
499                                        vcpu->arch.shared->msr);
500                         break;
501                 case INT_CLASS_DBG:
502                         set_guest_dsrr(vcpu, vcpu->arch.pc,
503                                        vcpu->arch.shared->msr);
504                         break;
505                 case INT_CLASS_MC:
506                         set_guest_mcsrr(vcpu, vcpu->arch.pc,
507                                         vcpu->arch.shared->msr);
508                         break;
509                 }
510
511                 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
512                 if (update_esr == true)
513                         kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
514                 if (update_dear == true)
515                         kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
516                 if (update_epr == true) {
517                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
518                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
519                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
520                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
521                                 kvmppc_mpic_set_epr(vcpu);
522                         }
523                 }
524
525                 new_msr &= msr_mask;
526 #if defined(CONFIG_64BIT)
527                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
528                         new_msr |= MSR_CM;
529 #endif
530                 kvmppc_set_msr(vcpu, new_msr);
531
532                 if (!keep_irq)
533                         clear_bit(priority, &vcpu->arch.pending_exceptions);
534         }
535
536 #ifdef CONFIG_KVM_BOOKE_HV
537         /*
538          * If an interrupt is pending but masked, raise a guest doorbell
539          * so that we are notified when the guest enables the relevant
540          * MSR bit.
541          */
542         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
543                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
544         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
545                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
546         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
547                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
548 #endif
549
550         return allowed;
551 }
552
553 /*
554  * Return the number of jiffies until the next timeout.  If the timeout is
555  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
556  * because the larger value can break the timer APIs.
557  */
558 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
559 {
560         u64 tb, wdt_tb, wdt_ticks = 0;
561         u64 nr_jiffies = 0;
562         u32 period = TCR_GET_WP(vcpu->arch.tcr);
563
564         wdt_tb = 1ULL << (63 - period);
565         tb = get_tb();
566         /*
567          * The watchdog timeout will hapeen when TB bit corresponding
568          * to watchdog will toggle from 0 to 1.
569          */
570         if (tb & wdt_tb)
571                 wdt_ticks = wdt_tb;
572
573         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
574
575         /* Convert timebase ticks to jiffies */
576         nr_jiffies = wdt_ticks;
577
578         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
579                 nr_jiffies++;
580
581         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
582 }
583
584 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
585 {
586         unsigned long nr_jiffies;
587         unsigned long flags;
588
589         /*
590          * If TSR_ENW and TSR_WIS are not set then no need to exit to
591          * userspace, so clear the KVM_REQ_WATCHDOG request.
592          */
593         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
594                 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu);
595
596         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
597         nr_jiffies = watchdog_next_timeout(vcpu);
598         /*
599          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
600          * then do not run the watchdog timer as this can break timer APIs.
601          */
602         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
603                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
604         else
605                 del_timer(&vcpu->arch.wdt_timer);
606         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
607 }
608
609 void kvmppc_watchdog_func(struct timer_list *t)
610 {
611         struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
612         u32 tsr, new_tsr;
613         int final;
614
615         do {
616                 new_tsr = tsr = vcpu->arch.tsr;
617                 final = 0;
618
619                 /* Time out event */
620                 if (tsr & TSR_ENW) {
621                         if (tsr & TSR_WIS)
622                                 final = 1;
623                         else
624                                 new_tsr = tsr | TSR_WIS;
625                 } else {
626                         new_tsr = tsr | TSR_ENW;
627                 }
628         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
629
630         if (new_tsr & TSR_WIS) {
631                 smp_wmb();
632                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
633                 kvm_vcpu_kick(vcpu);
634         }
635
636         /*
637          * If this is final watchdog expiry and some action is required
638          * then exit to userspace.
639          */
640         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
641             vcpu->arch.watchdog_enabled) {
642                 smp_wmb();
643                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
644                 kvm_vcpu_kick(vcpu);
645         }
646
647         /*
648          * Stop running the watchdog timer after final expiration to
649          * prevent the host from being flooded with timers if the
650          * guest sets a short period.
651          * Timers will resume when TSR/TCR is updated next time.
652          */
653         if (!final)
654                 arm_next_watchdog(vcpu);
655 }
656
657 static void update_timer_ints(struct kvm_vcpu *vcpu)
658 {
659         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
660                 kvmppc_core_queue_dec(vcpu);
661         else
662                 kvmppc_core_dequeue_dec(vcpu);
663
664         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
665                 kvmppc_core_queue_watchdog(vcpu);
666         else
667                 kvmppc_core_dequeue_watchdog(vcpu);
668 }
669
670 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
671 {
672         unsigned long *pending = &vcpu->arch.pending_exceptions;
673         unsigned int priority;
674
675         priority = __ffs(*pending);
676         while (priority < BOOKE_IRQPRIO_MAX) {
677                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
678                         break;
679
680                 priority = find_next_bit(pending,
681                                          BITS_PER_BYTE * sizeof(*pending),
682                                          priority + 1);
683         }
684
685         /* Tell the guest about our interrupt status */
686         vcpu->arch.shared->int_pending = !!*pending;
687 }
688
689 /* Check pending exceptions and deliver one, if possible. */
690 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
691 {
692         int r = 0;
693         WARN_ON_ONCE(!irqs_disabled());
694
695         kvmppc_core_check_exceptions(vcpu);
696
697         if (kvm_request_pending(vcpu)) {
698                 /* Exception delivery raised request; start over */
699                 return 1;
700         }
701
702         if (vcpu->arch.shared->msr & MSR_WE) {
703                 local_irq_enable();
704                 kvm_vcpu_block(vcpu);
705                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
706                 hard_irq_disable();
707
708                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
709                 r = 1;
710         };
711
712         return r;
713 }
714
715 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
716 {
717         int r = 1; /* Indicate we want to get back into the guest */
718
719         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
720                 update_timer_ints(vcpu);
721 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
722         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
723                 kvmppc_core_flush_tlb(vcpu);
724 #endif
725
726         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
727                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
728                 r = 0;
729         }
730
731         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
732                 vcpu->run->epr.epr = 0;
733                 vcpu->arch.epr_needed = true;
734                 vcpu->run->exit_reason = KVM_EXIT_EPR;
735                 r = 0;
736         }
737
738         return r;
739 }
740
741 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
742 {
743         int ret, s;
744         struct debug_reg debug;
745
746         if (!vcpu->arch.sane) {
747                 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
748                 return -EINVAL;
749         }
750
751         s = kvmppc_prepare_to_enter(vcpu);
752         if (s <= 0) {
753                 ret = s;
754                 goto out;
755         }
756         /* interrupts now hard-disabled */
757
758 #ifdef CONFIG_PPC_FPU
759         /* Save userspace FPU state in stack */
760         enable_kernel_fp();
761
762         /*
763          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
764          * as always using the FPU.
765          */
766         kvmppc_load_guest_fp(vcpu);
767 #endif
768
769 #ifdef CONFIG_ALTIVEC
770         /* Save userspace AltiVec state in stack */
771         if (cpu_has_feature(CPU_FTR_ALTIVEC))
772                 enable_kernel_altivec();
773         /*
774          * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
775          * as always using the AltiVec.
776          */
777         kvmppc_load_guest_altivec(vcpu);
778 #endif
779
780         /* Switch to guest debug context */
781         debug = vcpu->arch.dbg_reg;
782         switch_booke_debug_regs(&debug);
783         debug = current->thread.debug;
784         current->thread.debug = vcpu->arch.dbg_reg;
785
786         vcpu->arch.pgdir = current->mm->pgd;
787         kvmppc_fix_ee_before_entry();
788
789         ret = __kvmppc_vcpu_run(kvm_run, vcpu);
790
791         /* No need for guest_exit. It's done in handle_exit.
792            We also get here with interrupts enabled. */
793
794         /* Switch back to user space debug context */
795         switch_booke_debug_regs(&debug);
796         current->thread.debug = debug;
797
798 #ifdef CONFIG_PPC_FPU
799         kvmppc_save_guest_fp(vcpu);
800 #endif
801
802 #ifdef CONFIG_ALTIVEC
803         kvmppc_save_guest_altivec(vcpu);
804 #endif
805
806 out:
807         vcpu->mode = OUTSIDE_GUEST_MODE;
808         return ret;
809 }
810
811 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
812 {
813         enum emulation_result er;
814
815         er = kvmppc_emulate_instruction(run, vcpu);
816         switch (er) {
817         case EMULATE_DONE:
818                 /* don't overwrite subtypes, just account kvm_stats */
819                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
820                 /* Future optimization: only reload non-volatiles if
821                  * they were actually modified by emulation. */
822                 return RESUME_GUEST_NV;
823
824         case EMULATE_AGAIN:
825                 return RESUME_GUEST;
826
827         case EMULATE_FAIL:
828                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
829                        __func__, vcpu->arch.pc, vcpu->arch.last_inst);
830                 /* For debugging, encode the failing instruction and
831                  * report it to userspace. */
832                 run->hw.hardware_exit_reason = ~0ULL << 32;
833                 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
834                 kvmppc_core_queue_program(vcpu, ESR_PIL);
835                 return RESUME_HOST;
836
837         case EMULATE_EXIT_USER:
838                 return RESUME_HOST;
839
840         default:
841                 BUG();
842         }
843 }
844
845 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
846 {
847         struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
848         u32 dbsr = vcpu->arch.dbsr;
849
850         if (vcpu->guest_debug == 0) {
851                 /*
852                  * Debug resources belong to Guest.
853                  * Imprecise debug event is not injected
854                  */
855                 if (dbsr & DBSR_IDE) {
856                         dbsr &= ~DBSR_IDE;
857                         if (!dbsr)
858                                 return RESUME_GUEST;
859                 }
860
861                 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
862                             (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
863                         kvmppc_core_queue_debug(vcpu);
864
865                 /* Inject a program interrupt if trap debug is not allowed */
866                 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
867                         kvmppc_core_queue_program(vcpu, ESR_PTR);
868
869                 return RESUME_GUEST;
870         }
871
872         /*
873          * Debug resource owned by userspace.
874          * Clear guest dbsr (vcpu->arch.dbsr)
875          */
876         vcpu->arch.dbsr = 0;
877         run->debug.arch.status = 0;
878         run->debug.arch.address = vcpu->arch.pc;
879
880         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
881                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
882         } else {
883                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
884                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
885                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
886                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
887                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
888                         run->debug.arch.address = dbg_reg->dac1;
889                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
890                         run->debug.arch.address = dbg_reg->dac2;
891         }
892
893         return RESUME_HOST;
894 }
895
896 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
897 {
898         ulong r1, ip, msr, lr;
899
900         asm("mr %0, 1" : "=r"(r1));
901         asm("mflr %0" : "=r"(lr));
902         asm("mfmsr %0" : "=r"(msr));
903         asm("bl 1f; 1: mflr %0" : "=r"(ip));
904
905         memset(regs, 0, sizeof(*regs));
906         regs->gpr[1] = r1;
907         regs->nip = ip;
908         regs->msr = msr;
909         regs->link = lr;
910 }
911
912 /*
913  * For interrupts needed to be handled by host interrupt handlers,
914  * corresponding host handler are called from here in similar way
915  * (but not exact) as they are called from low level handler
916  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
917  */
918 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
919                                      unsigned int exit_nr)
920 {
921         struct pt_regs regs;
922
923         switch (exit_nr) {
924         case BOOKE_INTERRUPT_EXTERNAL:
925                 kvmppc_fill_pt_regs(&regs);
926                 do_IRQ(&regs);
927                 break;
928         case BOOKE_INTERRUPT_DECREMENTER:
929                 kvmppc_fill_pt_regs(&regs);
930                 timer_interrupt(&regs);
931                 break;
932 #if defined(CONFIG_PPC_DOORBELL)
933         case BOOKE_INTERRUPT_DOORBELL:
934                 kvmppc_fill_pt_regs(&regs);
935                 doorbell_exception(&regs);
936                 break;
937 #endif
938         case BOOKE_INTERRUPT_MACHINE_CHECK:
939                 /* FIXME */
940                 break;
941         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
942                 kvmppc_fill_pt_regs(&regs);
943                 performance_monitor_exception(&regs);
944                 break;
945         case BOOKE_INTERRUPT_WATCHDOG:
946                 kvmppc_fill_pt_regs(&regs);
947 #ifdef CONFIG_BOOKE_WDT
948                 WatchdogException(&regs);
949 #else
950                 unknown_exception(&regs);
951 #endif
952                 break;
953         case BOOKE_INTERRUPT_CRITICAL:
954                 kvmppc_fill_pt_regs(&regs);
955                 unknown_exception(&regs);
956                 break;
957         case BOOKE_INTERRUPT_DEBUG:
958                 /* Save DBSR before preemption is enabled */
959                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
960                 kvmppc_clear_dbsr();
961                 break;
962         }
963 }
964
965 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
966                                   enum emulation_result emulated, u32 last_inst)
967 {
968         switch (emulated) {
969         case EMULATE_AGAIN:
970                 return RESUME_GUEST;
971
972         case EMULATE_FAIL:
973                 pr_debug("%s: load instruction from guest address %lx failed\n",
974                        __func__, vcpu->arch.pc);
975                 /* For debugging, encode the failing instruction and
976                  * report it to userspace. */
977                 run->hw.hardware_exit_reason = ~0ULL << 32;
978                 run->hw.hardware_exit_reason |= last_inst;
979                 kvmppc_core_queue_program(vcpu, ESR_PIL);
980                 return RESUME_HOST;
981
982         default:
983                 BUG();
984         }
985 }
986
987 /**
988  * kvmppc_handle_exit
989  *
990  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
991  */
992 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
993                        unsigned int exit_nr)
994 {
995         int r = RESUME_HOST;
996         int s;
997         int idx;
998         u32 last_inst = KVM_INST_FETCH_FAILED;
999         enum emulation_result emulated = EMULATE_DONE;
1000
1001         /* update before a new last_exit_type is rewritten */
1002         kvmppc_update_timing_stats(vcpu);
1003
1004         /* restart interrupts if they were meant for the host */
1005         kvmppc_restart_interrupt(vcpu, exit_nr);
1006
1007         /*
1008          * get last instruction before being preempted
1009          * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
1010          */
1011         switch (exit_nr) {
1012         case BOOKE_INTERRUPT_DATA_STORAGE:
1013         case BOOKE_INTERRUPT_DTLB_MISS:
1014         case BOOKE_INTERRUPT_HV_PRIV:
1015                 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1016                 break;
1017         case BOOKE_INTERRUPT_PROGRAM:
1018                 /* SW breakpoints arrive as illegal instructions on HV */
1019                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1020                         emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1021                 break;
1022         default:
1023                 break;
1024         }
1025
1026         trace_kvm_exit(exit_nr, vcpu);
1027         guest_exit_irqoff();
1028
1029         local_irq_enable();
1030
1031         run->exit_reason = KVM_EXIT_UNKNOWN;
1032         run->ready_for_interrupt_injection = 1;
1033
1034         if (emulated != EMULATE_DONE) {
1035                 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst);
1036                 goto out;
1037         }
1038
1039         switch (exit_nr) {
1040         case BOOKE_INTERRUPT_MACHINE_CHECK:
1041                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1042                 kvmppc_dump_vcpu(vcpu);
1043                 /* For debugging, send invalid exit reason to user space */
1044                 run->hw.hardware_exit_reason = ~1ULL << 32;
1045                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1046                 r = RESUME_HOST;
1047                 break;
1048
1049         case BOOKE_INTERRUPT_EXTERNAL:
1050                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1051                 r = RESUME_GUEST;
1052                 break;
1053
1054         case BOOKE_INTERRUPT_DECREMENTER:
1055                 kvmppc_account_exit(vcpu, DEC_EXITS);
1056                 r = RESUME_GUEST;
1057                 break;
1058
1059         case BOOKE_INTERRUPT_WATCHDOG:
1060                 r = RESUME_GUEST;
1061                 break;
1062
1063         case BOOKE_INTERRUPT_DOORBELL:
1064                 kvmppc_account_exit(vcpu, DBELL_EXITS);
1065                 r = RESUME_GUEST;
1066                 break;
1067
1068         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1069                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1070
1071                 /*
1072                  * We are here because there is a pending guest interrupt
1073                  * which could not be delivered as MSR_CE or MSR_ME was not
1074                  * set.  Once we break from here we will retry delivery.
1075                  */
1076                 r = RESUME_GUEST;
1077                 break;
1078
1079         case BOOKE_INTERRUPT_GUEST_DBELL:
1080                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1081
1082                 /*
1083                  * We are here because there is a pending guest interrupt
1084                  * which could not be delivered as MSR_EE was not set.  Once
1085                  * we break from here we will retry delivery.
1086                  */
1087                 r = RESUME_GUEST;
1088                 break;
1089
1090         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1091                 r = RESUME_GUEST;
1092                 break;
1093
1094         case BOOKE_INTERRUPT_HV_PRIV:
1095                 r = emulation_exit(run, vcpu);
1096                 break;
1097
1098         case BOOKE_INTERRUPT_PROGRAM:
1099                 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1100                         (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1101                         /*
1102                          * We are here because of an SW breakpoint instr,
1103                          * so lets return to host to handle.
1104                          */
1105                         r = kvmppc_handle_debug(run, vcpu);
1106                         run->exit_reason = KVM_EXIT_DEBUG;
1107                         kvmppc_account_exit(vcpu, DEBUG_EXITS);
1108                         break;
1109                 }
1110
1111                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1112                         /*
1113                          * Program traps generated by user-level software must
1114                          * be handled by the guest kernel.
1115                          *
1116                          * In GS mode, hypervisor privileged instructions trap
1117                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1118                          * actual program interrupts, handled by the guest.
1119                          */
1120                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1121                         r = RESUME_GUEST;
1122                         kvmppc_account_exit(vcpu, USR_PR_INST);
1123                         break;
1124                 }
1125
1126                 r = emulation_exit(run, vcpu);
1127                 break;
1128
1129         case BOOKE_INTERRUPT_FP_UNAVAIL:
1130                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1131                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1132                 r = RESUME_GUEST;
1133                 break;
1134
1135 #ifdef CONFIG_SPE
1136         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1137                 if (vcpu->arch.shared->msr & MSR_SPE)
1138                         kvmppc_vcpu_enable_spe(vcpu);
1139                 else
1140                         kvmppc_booke_queue_irqprio(vcpu,
1141                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
1142                 r = RESUME_GUEST;
1143                 break;
1144         }
1145
1146         case BOOKE_INTERRUPT_SPE_FP_DATA:
1147                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1148                 r = RESUME_GUEST;
1149                 break;
1150
1151         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1152                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1153                 r = RESUME_GUEST;
1154                 break;
1155 #elif defined(CONFIG_SPE_POSSIBLE)
1156         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1157                 /*
1158                  * Guest wants SPE, but host kernel doesn't support it.  Send
1159                  * an "unimplemented operation" program check to the guest.
1160                  */
1161                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1162                 r = RESUME_GUEST;
1163                 break;
1164
1165         /*
1166          * These really should never happen without CONFIG_SPE,
1167          * as we should never enable the real MSR[SPE] in the guest.
1168          */
1169         case BOOKE_INTERRUPT_SPE_FP_DATA:
1170         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1171                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1172                        __func__, exit_nr, vcpu->arch.pc);
1173                 run->hw.hardware_exit_reason = exit_nr;
1174                 r = RESUME_HOST;
1175                 break;
1176 #endif /* CONFIG_SPE_POSSIBLE */
1177
1178 /*
1179  * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1180  * see kvmppc_core_check_processor_compat().
1181  */
1182 #ifdef CONFIG_ALTIVEC
1183         case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1184                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1185                 r = RESUME_GUEST;
1186                 break;
1187
1188         case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1189                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1190                 r = RESUME_GUEST;
1191                 break;
1192 #endif
1193
1194         case BOOKE_INTERRUPT_DATA_STORAGE:
1195                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1196                                                vcpu->arch.fault_esr);
1197                 kvmppc_account_exit(vcpu, DSI_EXITS);
1198                 r = RESUME_GUEST;
1199                 break;
1200
1201         case BOOKE_INTERRUPT_INST_STORAGE:
1202                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1203                 kvmppc_account_exit(vcpu, ISI_EXITS);
1204                 r = RESUME_GUEST;
1205                 break;
1206
1207         case BOOKE_INTERRUPT_ALIGNMENT:
1208                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1209                                             vcpu->arch.fault_esr);
1210                 r = RESUME_GUEST;
1211                 break;
1212
1213 #ifdef CONFIG_KVM_BOOKE_HV
1214         case BOOKE_INTERRUPT_HV_SYSCALL:
1215                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1216                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1217                 } else {
1218                         /*
1219                          * hcall from guest userspace -- send privileged
1220                          * instruction program check.
1221                          */
1222                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1223                 }
1224
1225                 r = RESUME_GUEST;
1226                 break;
1227 #else
1228         case BOOKE_INTERRUPT_SYSCALL:
1229                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1230                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1231                         /* KVM PV hypercalls */
1232                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1233                         r = RESUME_GUEST;
1234                 } else {
1235                         /* Guest syscalls */
1236                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1237                 }
1238                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1239                 r = RESUME_GUEST;
1240                 break;
1241 #endif
1242
1243         case BOOKE_INTERRUPT_DTLB_MISS: {
1244                 unsigned long eaddr = vcpu->arch.fault_dear;
1245                 int gtlb_index;
1246                 gpa_t gpaddr;
1247                 gfn_t gfn;
1248
1249 #ifdef CONFIG_KVM_E500V2
1250                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1251                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1252                         kvmppc_map_magic(vcpu);
1253                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1254                         r = RESUME_GUEST;
1255
1256                         break;
1257                 }
1258 #endif
1259
1260                 /* Check the guest TLB. */
1261                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1262                 if (gtlb_index < 0) {
1263                         /* The guest didn't have a mapping for it. */
1264                         kvmppc_core_queue_dtlb_miss(vcpu,
1265                                                     vcpu->arch.fault_dear,
1266                                                     vcpu->arch.fault_esr);
1267                         kvmppc_mmu_dtlb_miss(vcpu);
1268                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1269                         r = RESUME_GUEST;
1270                         break;
1271                 }
1272
1273                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1274
1275                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1276                 gfn = gpaddr >> PAGE_SHIFT;
1277
1278                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1279                         /* The guest TLB had a mapping, but the shadow TLB
1280                          * didn't, and it is RAM. This could be because:
1281                          * a) the entry is mapping the host kernel, or
1282                          * b) the guest used a large mapping which we're faking
1283                          * Either way, we need to satisfy the fault without
1284                          * invoking the guest. */
1285                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1286                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1287                         r = RESUME_GUEST;
1288                 } else {
1289                         /* Guest has mapped and accessed a page which is not
1290                          * actually RAM. */
1291                         vcpu->arch.paddr_accessed = gpaddr;
1292                         vcpu->arch.vaddr_accessed = eaddr;
1293                         r = kvmppc_emulate_mmio(run, vcpu);
1294                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1295                 }
1296
1297                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1298                 break;
1299         }
1300
1301         case BOOKE_INTERRUPT_ITLB_MISS: {
1302                 unsigned long eaddr = vcpu->arch.pc;
1303                 gpa_t gpaddr;
1304                 gfn_t gfn;
1305                 int gtlb_index;
1306
1307                 r = RESUME_GUEST;
1308
1309                 /* Check the guest TLB. */
1310                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1311                 if (gtlb_index < 0) {
1312                         /* The guest didn't have a mapping for it. */
1313                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1314                         kvmppc_mmu_itlb_miss(vcpu);
1315                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1316                         break;
1317                 }
1318
1319                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1320
1321                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1322
1323                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1324                 gfn = gpaddr >> PAGE_SHIFT;
1325
1326                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1327                         /* The guest TLB had a mapping, but the shadow TLB
1328                          * didn't. This could be because:
1329                          * a) the entry is mapping the host kernel, or
1330                          * b) the guest used a large mapping which we're faking
1331                          * Either way, we need to satisfy the fault without
1332                          * invoking the guest. */
1333                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1334                 } else {
1335                         /* Guest mapped and leaped at non-RAM! */
1336                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1337                 }
1338
1339                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1340                 break;
1341         }
1342
1343         case BOOKE_INTERRUPT_DEBUG: {
1344                 r = kvmppc_handle_debug(run, vcpu);
1345                 if (r == RESUME_HOST)
1346                         run->exit_reason = KVM_EXIT_DEBUG;
1347                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1348                 break;
1349         }
1350
1351         default:
1352                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1353                 BUG();
1354         }
1355
1356 out:
1357         /*
1358          * To avoid clobbering exit_reason, only check for signals if we
1359          * aren't already exiting to userspace for some other reason.
1360          */
1361         if (!(r & RESUME_HOST)) {
1362                 s = kvmppc_prepare_to_enter(vcpu);
1363                 if (s <= 0)
1364                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1365                 else {
1366                         /* interrupts now hard-disabled */
1367                         kvmppc_fix_ee_before_entry();
1368                         kvmppc_load_guest_fp(vcpu);
1369                         kvmppc_load_guest_altivec(vcpu);
1370                 }
1371         }
1372
1373         return r;
1374 }
1375
1376 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1377 {
1378         u32 old_tsr = vcpu->arch.tsr;
1379
1380         vcpu->arch.tsr = new_tsr;
1381
1382         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1383                 arm_next_watchdog(vcpu);
1384
1385         update_timer_ints(vcpu);
1386 }
1387
1388 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1389 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1390 {
1391         int i;
1392         int r;
1393
1394         vcpu->arch.pc = 0;
1395         vcpu->arch.shared->pir = vcpu->vcpu_id;
1396         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1397         kvmppc_set_msr(vcpu, 0);
1398
1399 #ifndef CONFIG_KVM_BOOKE_HV
1400         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1401         vcpu->arch.shadow_pid = 1;
1402         vcpu->arch.shared->msr = 0;
1403 #endif
1404
1405         /* Eye-catching numbers so we know if the guest takes an interrupt
1406          * before it's programmed its own IVPR/IVORs. */
1407         vcpu->arch.ivpr = 0x55550000;
1408         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1409                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1410
1411         kvmppc_init_timing_stats(vcpu);
1412
1413         r = kvmppc_core_vcpu_setup(vcpu);
1414         kvmppc_sanity_check(vcpu);
1415         return r;
1416 }
1417
1418 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1419 {
1420         /* setup watchdog timer once */
1421         spin_lock_init(&vcpu->arch.wdt_lock);
1422         timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1423
1424         /*
1425          * Clear DBSR.MRR to avoid guest debug interrupt as
1426          * this is of host interest
1427          */
1428         mtspr(SPRN_DBSR, DBSR_MRR);
1429         return 0;
1430 }
1431
1432 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1433 {
1434         del_timer_sync(&vcpu->arch.wdt_timer);
1435 }
1436
1437 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1438 {
1439         int i;
1440
1441         vcpu_load(vcpu);
1442
1443         regs->pc = vcpu->arch.pc;
1444         regs->cr = kvmppc_get_cr(vcpu);
1445         regs->ctr = vcpu->arch.ctr;
1446         regs->lr = vcpu->arch.lr;
1447         regs->xer = kvmppc_get_xer(vcpu);
1448         regs->msr = vcpu->arch.shared->msr;
1449         regs->srr0 = kvmppc_get_srr0(vcpu);
1450         regs->srr1 = kvmppc_get_srr1(vcpu);
1451         regs->pid = vcpu->arch.pid;
1452         regs->sprg0 = kvmppc_get_sprg0(vcpu);
1453         regs->sprg1 = kvmppc_get_sprg1(vcpu);
1454         regs->sprg2 = kvmppc_get_sprg2(vcpu);
1455         regs->sprg3 = kvmppc_get_sprg3(vcpu);
1456         regs->sprg4 = kvmppc_get_sprg4(vcpu);
1457         regs->sprg5 = kvmppc_get_sprg5(vcpu);
1458         regs->sprg6 = kvmppc_get_sprg6(vcpu);
1459         regs->sprg7 = kvmppc_get_sprg7(vcpu);
1460
1461         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1462                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1463
1464         vcpu_put(vcpu);
1465         return 0;
1466 }
1467
1468 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1469 {
1470         int i;
1471
1472         vcpu_load(vcpu);
1473
1474         vcpu->arch.pc = regs->pc;
1475         kvmppc_set_cr(vcpu, regs->cr);
1476         vcpu->arch.ctr = regs->ctr;
1477         vcpu->arch.lr = regs->lr;
1478         kvmppc_set_xer(vcpu, regs->xer);
1479         kvmppc_set_msr(vcpu, regs->msr);
1480         kvmppc_set_srr0(vcpu, regs->srr0);
1481         kvmppc_set_srr1(vcpu, regs->srr1);
1482         kvmppc_set_pid(vcpu, regs->pid);
1483         kvmppc_set_sprg0(vcpu, regs->sprg0);
1484         kvmppc_set_sprg1(vcpu, regs->sprg1);
1485         kvmppc_set_sprg2(vcpu, regs->sprg2);
1486         kvmppc_set_sprg3(vcpu, regs->sprg3);
1487         kvmppc_set_sprg4(vcpu, regs->sprg4);
1488         kvmppc_set_sprg5(vcpu, regs->sprg5);
1489         kvmppc_set_sprg6(vcpu, regs->sprg6);
1490         kvmppc_set_sprg7(vcpu, regs->sprg7);
1491
1492         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1493                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1494
1495         vcpu_put(vcpu);
1496         return 0;
1497 }
1498
1499 static void get_sregs_base(struct kvm_vcpu *vcpu,
1500                            struct kvm_sregs *sregs)
1501 {
1502         u64 tb = get_tb();
1503
1504         sregs->u.e.features |= KVM_SREGS_E_BASE;
1505
1506         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1507         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1508         sregs->u.e.mcsr = vcpu->arch.mcsr;
1509         sregs->u.e.esr = kvmppc_get_esr(vcpu);
1510         sregs->u.e.dear = kvmppc_get_dar(vcpu);
1511         sregs->u.e.tsr = vcpu->arch.tsr;
1512         sregs->u.e.tcr = vcpu->arch.tcr;
1513         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1514         sregs->u.e.tb = tb;
1515         sregs->u.e.vrsave = vcpu->arch.vrsave;
1516 }
1517
1518 static int set_sregs_base(struct kvm_vcpu *vcpu,
1519                           struct kvm_sregs *sregs)
1520 {
1521         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1522                 return 0;
1523
1524         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1525         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1526         vcpu->arch.mcsr = sregs->u.e.mcsr;
1527         kvmppc_set_esr(vcpu, sregs->u.e.esr);
1528         kvmppc_set_dar(vcpu, sregs->u.e.dear);
1529         vcpu->arch.vrsave = sregs->u.e.vrsave;
1530         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1531
1532         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1533                 vcpu->arch.dec = sregs->u.e.dec;
1534                 kvmppc_emulate_dec(vcpu);
1535         }
1536
1537         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1538                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1539
1540         return 0;
1541 }
1542
1543 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1544                               struct kvm_sregs *sregs)
1545 {
1546         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1547
1548         sregs->u.e.pir = vcpu->vcpu_id;
1549         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1550         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1551         sregs->u.e.decar = vcpu->arch.decar;
1552         sregs->u.e.ivpr = vcpu->arch.ivpr;
1553 }
1554
1555 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1556                              struct kvm_sregs *sregs)
1557 {
1558         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1559                 return 0;
1560
1561         if (sregs->u.e.pir != vcpu->vcpu_id)
1562                 return -EINVAL;
1563
1564         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1565         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1566         vcpu->arch.decar = sregs->u.e.decar;
1567         vcpu->arch.ivpr = sregs->u.e.ivpr;
1568
1569         return 0;
1570 }
1571
1572 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1573 {
1574         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1575
1576         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1577         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1578         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1579         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1580         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1581         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1582         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1583         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1584         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1585         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1586         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1587         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1588         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1589         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1590         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1591         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1592         return 0;
1593 }
1594
1595 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1596 {
1597         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1598                 return 0;
1599
1600         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1601         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1602         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1603         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1604         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1605         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1606         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1607         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1608         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1609         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1610         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1611         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1612         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1613         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1614         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1615         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1616
1617         return 0;
1618 }
1619
1620 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1621                                   struct kvm_sregs *sregs)
1622 {
1623         int ret;
1624
1625         vcpu_load(vcpu);
1626
1627         sregs->pvr = vcpu->arch.pvr;
1628
1629         get_sregs_base(vcpu, sregs);
1630         get_sregs_arch206(vcpu, sregs);
1631         ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1632
1633         vcpu_put(vcpu);
1634         return ret;
1635 }
1636
1637 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1638                                   struct kvm_sregs *sregs)
1639 {
1640         int ret = -EINVAL;
1641
1642         vcpu_load(vcpu);
1643         if (vcpu->arch.pvr != sregs->pvr)
1644                 goto out;
1645
1646         ret = set_sregs_base(vcpu, sregs);
1647         if (ret < 0)
1648                 goto out;
1649
1650         ret = set_sregs_arch206(vcpu, sregs);
1651         if (ret < 0)
1652                 goto out;
1653
1654         ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1655
1656 out:
1657         vcpu_put(vcpu);
1658         return ret;
1659 }
1660
1661 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1662                         union kvmppc_one_reg *val)
1663 {
1664         int r = 0;
1665
1666         switch (id) {
1667         case KVM_REG_PPC_IAC1:
1668                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1669                 break;
1670         case KVM_REG_PPC_IAC2:
1671                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1672                 break;
1673 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1674         case KVM_REG_PPC_IAC3:
1675                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1676                 break;
1677         case KVM_REG_PPC_IAC4:
1678                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1679                 break;
1680 #endif
1681         case KVM_REG_PPC_DAC1:
1682                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1683                 break;
1684         case KVM_REG_PPC_DAC2:
1685                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1686                 break;
1687         case KVM_REG_PPC_EPR: {
1688                 u32 epr = kvmppc_get_epr(vcpu);
1689                 *val = get_reg_val(id, epr);
1690                 break;
1691         }
1692 #if defined(CONFIG_64BIT)
1693         case KVM_REG_PPC_EPCR:
1694                 *val = get_reg_val(id, vcpu->arch.epcr);
1695                 break;
1696 #endif
1697         case KVM_REG_PPC_TCR:
1698                 *val = get_reg_val(id, vcpu->arch.tcr);
1699                 break;
1700         case KVM_REG_PPC_TSR:
1701                 *val = get_reg_val(id, vcpu->arch.tsr);
1702                 break;
1703         case KVM_REG_PPC_DEBUG_INST:
1704                 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1705                 break;
1706         case KVM_REG_PPC_VRSAVE:
1707                 *val = get_reg_val(id, vcpu->arch.vrsave);
1708                 break;
1709         default:
1710                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1711                 break;
1712         }
1713
1714         return r;
1715 }
1716
1717 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1718                         union kvmppc_one_reg *val)
1719 {
1720         int r = 0;
1721
1722         switch (id) {
1723         case KVM_REG_PPC_IAC1:
1724                 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1725                 break;
1726         case KVM_REG_PPC_IAC2:
1727                 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1728                 break;
1729 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1730         case KVM_REG_PPC_IAC3:
1731                 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1732                 break;
1733         case KVM_REG_PPC_IAC4:
1734                 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1735                 break;
1736 #endif
1737         case KVM_REG_PPC_DAC1:
1738                 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1739                 break;
1740         case KVM_REG_PPC_DAC2:
1741                 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1742                 break;
1743         case KVM_REG_PPC_EPR: {
1744                 u32 new_epr = set_reg_val(id, *val);
1745                 kvmppc_set_epr(vcpu, new_epr);
1746                 break;
1747         }
1748 #if defined(CONFIG_64BIT)
1749         case KVM_REG_PPC_EPCR: {
1750                 u32 new_epcr = set_reg_val(id, *val);
1751                 kvmppc_set_epcr(vcpu, new_epcr);
1752                 break;
1753         }
1754 #endif
1755         case KVM_REG_PPC_OR_TSR: {
1756                 u32 tsr_bits = set_reg_val(id, *val);
1757                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1758                 break;
1759         }
1760         case KVM_REG_PPC_CLEAR_TSR: {
1761                 u32 tsr_bits = set_reg_val(id, *val);
1762                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1763                 break;
1764         }
1765         case KVM_REG_PPC_TSR: {
1766                 u32 tsr = set_reg_val(id, *val);
1767                 kvmppc_set_tsr(vcpu, tsr);
1768                 break;
1769         }
1770         case KVM_REG_PPC_TCR: {
1771                 u32 tcr = set_reg_val(id, *val);
1772                 kvmppc_set_tcr(vcpu, tcr);
1773                 break;
1774         }
1775         case KVM_REG_PPC_VRSAVE:
1776                 vcpu->arch.vrsave = set_reg_val(id, *val);
1777                 break;
1778         default:
1779                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1780                 break;
1781         }
1782
1783         return r;
1784 }
1785
1786 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1787 {
1788         return -ENOTSUPP;
1789 }
1790
1791 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1792 {
1793         return -ENOTSUPP;
1794 }
1795
1796 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1797                                   struct kvm_translation *tr)
1798 {
1799         int r;
1800
1801         vcpu_load(vcpu);
1802         r = kvmppc_core_vcpu_translate(vcpu, tr);
1803         vcpu_put(vcpu);
1804         return r;
1805 }
1806
1807 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1808 {
1809         return -ENOTSUPP;
1810 }
1811
1812 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1813                               struct kvm_memory_slot *dont)
1814 {
1815 }
1816
1817 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1818                                unsigned long npages)
1819 {
1820         return 0;
1821 }
1822
1823 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1824                                       struct kvm_memory_slot *memslot,
1825                                       const struct kvm_userspace_memory_region *mem)
1826 {
1827         return 0;
1828 }
1829
1830 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1831                                 const struct kvm_userspace_memory_region *mem,
1832                                 const struct kvm_memory_slot *old,
1833                                 const struct kvm_memory_slot *new)
1834 {
1835 }
1836
1837 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1838 {
1839 }
1840
1841 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1842 {
1843 #if defined(CONFIG_64BIT)
1844         vcpu->arch.epcr = new_epcr;
1845 #ifdef CONFIG_KVM_BOOKE_HV
1846         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1847         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1848                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1849 #endif
1850 #endif
1851 }
1852
1853 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1854 {
1855         vcpu->arch.tcr = new_tcr;
1856         arm_next_watchdog(vcpu);
1857         update_timer_ints(vcpu);
1858 }
1859
1860 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1861 {
1862         set_bits(tsr_bits, &vcpu->arch.tsr);
1863         smp_wmb();
1864         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1865         kvm_vcpu_kick(vcpu);
1866 }
1867
1868 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1869 {
1870         clear_bits(tsr_bits, &vcpu->arch.tsr);
1871
1872         /*
1873          * We may have stopped the watchdog due to
1874          * being stuck on final expiration.
1875          */
1876         if (tsr_bits & (TSR_ENW | TSR_WIS))
1877                 arm_next_watchdog(vcpu);
1878
1879         update_timer_ints(vcpu);
1880 }
1881
1882 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1883 {
1884         if (vcpu->arch.tcr & TCR_ARE) {
1885                 vcpu->arch.dec = vcpu->arch.decar;
1886                 kvmppc_emulate_dec(vcpu);
1887         }
1888
1889         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1890 }
1891
1892 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1893                                        uint64_t addr, int index)
1894 {
1895         switch (index) {
1896         case 0:
1897                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1898                 dbg_reg->iac1 = addr;
1899                 break;
1900         case 1:
1901                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1902                 dbg_reg->iac2 = addr;
1903                 break;
1904 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1905         case 2:
1906                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1907                 dbg_reg->iac3 = addr;
1908                 break;
1909         case 3:
1910                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1911                 dbg_reg->iac4 = addr;
1912                 break;
1913 #endif
1914         default:
1915                 return -EINVAL;
1916         }
1917
1918         dbg_reg->dbcr0 |= DBCR0_IDM;
1919         return 0;
1920 }
1921
1922 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1923                                        int type, int index)
1924 {
1925         switch (index) {
1926         case 0:
1927                 if (type & KVMPPC_DEBUG_WATCH_READ)
1928                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1929                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1930                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1931                 dbg_reg->dac1 = addr;
1932                 break;
1933         case 1:
1934                 if (type & KVMPPC_DEBUG_WATCH_READ)
1935                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1936                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1937                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1938                 dbg_reg->dac2 = addr;
1939                 break;
1940         default:
1941                 return -EINVAL;
1942         }
1943
1944         dbg_reg->dbcr0 |= DBCR0_IDM;
1945         return 0;
1946 }
1947 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1948 {
1949         /* XXX: Add similar MSR protection for BookE-PR */
1950 #ifdef CONFIG_KVM_BOOKE_HV
1951         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1952         if (set) {
1953                 if (prot_bitmap & MSR_UCLE)
1954                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1955                 if (prot_bitmap & MSR_DE)
1956                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1957                 if (prot_bitmap & MSR_PMM)
1958                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1959         } else {
1960                 if (prot_bitmap & MSR_UCLE)
1961                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1962                 if (prot_bitmap & MSR_DE)
1963                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1964                 if (prot_bitmap & MSR_PMM)
1965                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1966         }
1967 #endif
1968 }
1969
1970 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1971                  enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1972 {
1973         int gtlb_index;
1974         gpa_t gpaddr;
1975
1976 #ifdef CONFIG_KVM_E500V2
1977         if (!(vcpu->arch.shared->msr & MSR_PR) &&
1978             (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1979                 pte->eaddr = eaddr;
1980                 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1981                              (eaddr & ~PAGE_MASK);
1982                 pte->vpage = eaddr >> PAGE_SHIFT;
1983                 pte->may_read = true;
1984                 pte->may_write = true;
1985                 pte->may_execute = true;
1986
1987                 return 0;
1988         }
1989 #endif
1990
1991         /* Check the guest TLB. */
1992         switch (xlid) {
1993         case XLATE_INST:
1994                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1995                 break;
1996         case XLATE_DATA:
1997                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1998                 break;
1999         default:
2000                 BUG();
2001         }
2002
2003         /* Do we have a TLB entry at all? */
2004         if (gtlb_index < 0)
2005                 return -ENOENT;
2006
2007         gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
2008
2009         pte->eaddr = eaddr;
2010         pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
2011         pte->vpage = eaddr >> PAGE_SHIFT;
2012
2013         /* XXX read permissions from the guest TLB */
2014         pte->may_read = true;
2015         pte->may_write = true;
2016         pte->may_execute = true;
2017
2018         return 0;
2019 }
2020
2021 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
2022                                          struct kvm_guest_debug *dbg)
2023 {
2024         struct debug_reg *dbg_reg;
2025         int n, b = 0, w = 0;
2026         int ret = 0;
2027
2028         vcpu_load(vcpu);
2029
2030         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
2031                 vcpu->arch.dbg_reg.dbcr0 = 0;
2032                 vcpu->guest_debug = 0;
2033                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
2034                 goto out;
2035         }
2036
2037         kvm_guest_protect_msr(vcpu, MSR_DE, true);
2038         vcpu->guest_debug = dbg->control;
2039         vcpu->arch.dbg_reg.dbcr0 = 0;
2040
2041         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2042                 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2043
2044         /* Code below handles only HW breakpoints */
2045         dbg_reg = &(vcpu->arch.dbg_reg);
2046
2047 #ifdef CONFIG_KVM_BOOKE_HV
2048         /*
2049          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2050          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2051          */
2052         dbg_reg->dbcr1 = 0;
2053         dbg_reg->dbcr2 = 0;
2054 #else
2055         /*
2056          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2057          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2058          * is set.
2059          */
2060         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2061                           DBCR1_IAC4US;
2062         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2063 #endif
2064
2065         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2066                 goto out;
2067
2068         ret = -EINVAL;
2069         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2070                 uint64_t addr = dbg->arch.bp[n].addr;
2071                 uint32_t type = dbg->arch.bp[n].type;
2072
2073                 if (type == KVMPPC_DEBUG_NONE)
2074                         continue;
2075
2076                 if (type & ~(KVMPPC_DEBUG_WATCH_READ |
2077                              KVMPPC_DEBUG_WATCH_WRITE |
2078                              KVMPPC_DEBUG_BREAKPOINT))
2079                         goto out;
2080
2081                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2082                         /* Setting H/W breakpoint */
2083                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2084                                 goto out;
2085                 } else {
2086                         /* Setting H/W watchpoint */
2087                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2088                                                         type, w++))
2089                                 goto out;
2090                 }
2091         }
2092
2093         ret = 0;
2094 out:
2095         vcpu_put(vcpu);
2096         return ret;
2097 }
2098
2099 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2100 {
2101         vcpu->cpu = smp_processor_id();
2102         current->thread.kvm_vcpu = vcpu;
2103 }
2104
2105 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2106 {
2107         current->thread.kvm_vcpu = NULL;
2108         vcpu->cpu = -1;
2109
2110         /* Clear pending debug event in DBSR */
2111         kvmppc_clear_dbsr();
2112 }
2113
2114 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
2115 {
2116         vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
2117 }
2118
2119 int kvmppc_core_init_vm(struct kvm *kvm)
2120 {
2121         return kvm->arch.kvm_ops->init_vm(kvm);
2122 }
2123
2124 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
2125 {
2126         return kvm->arch.kvm_ops->vcpu_create(kvm, id);
2127 }
2128
2129 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2130 {
2131         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2132 }
2133
2134 void kvmppc_core_destroy_vm(struct kvm *kvm)
2135 {
2136         kvm->arch.kvm_ops->destroy_vm(kvm);
2137 }
2138
2139 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2140 {
2141         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2142 }
2143
2144 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2145 {
2146         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2147 }
2148
2149 int __init kvmppc_booke_init(void)
2150 {
2151 #ifndef CONFIG_KVM_BOOKE_HV
2152         unsigned long ivor[16];
2153         unsigned long *handler = kvmppc_booke_handler_addr;
2154         unsigned long max_ivor = 0;
2155         unsigned long handler_len;
2156         int i;
2157
2158         /* We install our own exception handlers by hijacking IVPR. IVPR must
2159          * be 16-bit aligned, so we need a 64KB allocation. */
2160         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2161                                                  VCPU_SIZE_ORDER);
2162         if (!kvmppc_booke_handlers)
2163                 return -ENOMEM;
2164
2165         /* XXX make sure our handlers are smaller than Linux's */
2166
2167         /* Copy our interrupt handlers to match host IVORs. That way we don't
2168          * have to swap the IVORs on every guest/host transition. */
2169         ivor[0] = mfspr(SPRN_IVOR0);
2170         ivor[1] = mfspr(SPRN_IVOR1);
2171         ivor[2] = mfspr(SPRN_IVOR2);
2172         ivor[3] = mfspr(SPRN_IVOR3);
2173         ivor[4] = mfspr(SPRN_IVOR4);
2174         ivor[5] = mfspr(SPRN_IVOR5);
2175         ivor[6] = mfspr(SPRN_IVOR6);
2176         ivor[7] = mfspr(SPRN_IVOR7);
2177         ivor[8] = mfspr(SPRN_IVOR8);
2178         ivor[9] = mfspr(SPRN_IVOR9);
2179         ivor[10] = mfspr(SPRN_IVOR10);
2180         ivor[11] = mfspr(SPRN_IVOR11);
2181         ivor[12] = mfspr(SPRN_IVOR12);
2182         ivor[13] = mfspr(SPRN_IVOR13);
2183         ivor[14] = mfspr(SPRN_IVOR14);
2184         ivor[15] = mfspr(SPRN_IVOR15);
2185
2186         for (i = 0; i < 16; i++) {
2187                 if (ivor[i] > max_ivor)
2188                         max_ivor = i;
2189
2190                 handler_len = handler[i + 1] - handler[i];
2191                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2192                        (void *)handler[i], handler_len);
2193         }
2194
2195         handler_len = handler[max_ivor + 1] - handler[max_ivor];
2196         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2197                            ivor[max_ivor] + handler_len);
2198 #endif /* !BOOKE_HV */
2199         return 0;
2200 }
2201
2202 void __exit kvmppc_booke_exit(void)
2203 {
2204         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2205         kvm_exit();
2206 }