1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright SUSE Linux Products GmbH 2009
6 * Authors: Alexander Graf <agraf@suse.de>
9 #include <linux/types.h>
10 #include <linux/string.h>
11 #include <linux/kvm.h>
12 #include <linux/kvm_host.h>
13 #include <linux/highmem.h>
15 #include <asm/kvm_ppc.h>
16 #include <asm/kvm_book3s.h>
17 #include <asm/book3s/64/mmu-hash.h>
19 /* #define DEBUG_MMU */
22 #define dprintk(X...) printk(KERN_INFO X)
24 #define dprintk(X...) do { } while(0)
27 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
29 unsigned long msr = vcpu->arch.intr_msr;
30 unsigned long cur_msr = kvmppc_get_msr(vcpu);
32 /* If transactional, change to suspend mode on IRQ delivery */
33 if (MSR_TM_TRANSACTIONAL(cur_msr))
36 msr |= cur_msr & MSR_TS_MASK;
38 kvmppc_set_msr(vcpu, msr);
41 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
42 struct kvm_vcpu *vcpu,
46 u64 esid = GET_ESID(eaddr);
47 u64 esid_1t = GET_ESID_1T(eaddr);
49 for (i = 0; i < vcpu->arch.slb_nr; i++) {
52 if (!vcpu->arch.slb[i].valid)
55 if (vcpu->arch.slb[i].tb)
58 if (vcpu->arch.slb[i].esid == cmp_esid)
59 return &vcpu->arch.slb[i];
62 dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
63 eaddr, esid, esid_1t);
64 for (i = 0; i < vcpu->arch.slb_nr; i++) {
65 if (vcpu->arch.slb[i].vsid)
66 dprintk(" %d: %c%c%c %llx %llx\n", i,
67 vcpu->arch.slb[i].valid ? 'v' : ' ',
68 vcpu->arch.slb[i].large ? 'l' : ' ',
69 vcpu->arch.slb[i].tb ? 't' : ' ',
70 vcpu->arch.slb[i].esid,
71 vcpu->arch.slb[i].vsid);
77 static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
79 return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
82 static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
84 return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
87 static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
89 eaddr &= kvmppc_slb_offset_mask(slb);
91 return (eaddr >> VPN_SHIFT) |
92 ((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
95 static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
98 struct kvmppc_slb *slb;
100 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
104 return kvmppc_slb_calc_vpn(slb, eaddr);
107 static int mmu_pagesize(int mmu_pg)
118 static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
120 return mmu_pagesize(slbe->base_page_size);
123 static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
125 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
127 return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
130 static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
131 struct kvmppc_slb *slbe, gva_t eaddr,
134 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
135 u64 hash, pteg, htabsize;
140 htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
142 vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
143 ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
144 hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
147 hash &= ((1ULL << 39ULL) - 1ULL);
151 pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
154 dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
155 page, vcpu_book3s->sdr1, pteg, slbe->vsid);
157 /* When running a PAPR guest, SDR1 contains a HVA address instead
159 if (vcpu->arch.papr_enabled)
162 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
164 if (kvm_is_error_hva(r))
166 return r | (pteg & ~PAGE_MASK);
169 static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
171 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
174 avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
175 avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
178 avpn >>= ((80 - p) - 56) - 8; /* 16 - p */
186 * Return page size encoded in the second word of a HPTE, or
187 * -1 for an invalid encoding for the base page size indicated by
188 * the SLB entry. This doesn't handle mixed pagesize segments yet.
190 static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
192 switch (slbe->base_page_size) {
194 if ((r & 0xf000) == 0x1000)
198 if ((r & 0xff000) == 0)
205 static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
206 struct kvmppc_pte *gpte, bool data,
209 struct kvmppc_slb *slbe;
221 ulong mp_ea = vcpu->arch.magic_page_ea;
223 /* Magic page override */
224 if (unlikely(mp_ea) &&
225 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
226 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
228 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
229 gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
230 gpte->raddr &= KVM_PAM;
231 gpte->may_execute = true;
232 gpte->may_read = true;
233 gpte->may_write = true;
234 gpte->page_size = MMU_PAGE_4K;
235 gpte->wimg = HPTE_R_M;
240 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
244 avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
245 v_val = avpn & HPTE_V_AVPN;
248 v_val |= SLB_VSID_B_1T;
250 v_val |= HPTE_V_LARGE;
251 v_val |= HPTE_V_VALID;
253 v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID |
256 pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;
258 mutex_lock(&vcpu->kvm->arch.hpt_mutex);
261 ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
262 if (kvm_is_error_hva(ptegp))
265 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
266 printk_ratelimited(KERN_ERR
267 "KVM: Can't copy data from 0x%lx!\n", ptegp);
271 if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
273 else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
276 for (i=0; i<16; i+=2) {
277 u64 pte0 = be64_to_cpu(pteg[i]);
278 u64 pte1 = be64_to_cpu(pteg[i + 1]);
280 /* Check all relevant fields of 1st dword */
281 if ((pte0 & v_mask) == v_val) {
282 /* If large page bit is set, check pgsize encoding */
284 (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
285 pgsize = decode_pagesize(slbe, pte1);
297 v_val |= HPTE_V_SECONDARY;
302 v = be64_to_cpu(pteg[i]);
303 r = be64_to_cpu(pteg[i+1]);
304 pp = (r & HPTE_R_PP) | key;
309 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
311 eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
312 gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask);
313 gpte->page_size = pgsize;
314 gpte->may_execute = ((r & HPTE_R_N) ? false : true);
315 if (unlikely(vcpu->arch.disable_kernel_nx) &&
316 !(kvmppc_get_msr(vcpu) & MSR_PR))
317 gpte->may_execute = true;
318 gpte->may_read = false;
319 gpte->may_write = false;
320 gpte->wimg = r & HPTE_R_WIMG;
327 gpte->may_write = true;
333 gpte->may_read = true;
337 dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
339 eaddr, avpn, gpte->vpage, gpte->raddr);
341 /* Update PTE R and C bits, so the guest's swapper knows we used the
343 if (gpte->may_read && !(r & HPTE_R_R)) {
345 * Set the accessed flag.
346 * We have to write this back with a single byte write
347 * because another vcpu may be accessing this on
348 * non-PAPR platforms such as mac99, and this is
349 * what real hardware does.
351 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
353 put_user(r >> 8, addr + 6);
355 if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
356 /* Set the dirty flag */
357 /* Use a single byte write */
358 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
360 put_user(r, addr + 7);
363 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
365 if (!gpte->may_read || (iswrite && !gpte->may_write))
370 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
374 dprintk("KVM MMU: Trigger segment fault\n");
378 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
382 struct kvmppc_slb *slbe;
384 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
387 esid_1t = GET_ESID_1T(rb);
390 if (slb_nr > vcpu->arch.slb_nr)
393 slbe = &vcpu->arch.slb[slb_nr];
395 slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
396 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
397 slbe->esid = slbe->tb ? esid_1t : esid;
398 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
399 slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
400 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
401 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
402 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
403 slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
405 slbe->base_page_size = MMU_PAGE_4K;
407 if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
408 switch (rs & SLB_VSID_LP) {
410 slbe->base_page_size = MMU_PAGE_16M;
413 slbe->base_page_size = MMU_PAGE_64K;
417 slbe->base_page_size = MMU_PAGE_16M;
420 slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
423 /* Map the new segment */
424 kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
427 static int kvmppc_mmu_book3s_64_slbfee(struct kvm_vcpu *vcpu, gva_t eaddr,
430 struct kvmppc_slb *slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
433 *ret_slb = slbe->origv;
440 static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
442 struct kvmppc_slb *slbe;
444 if (slb_nr > vcpu->arch.slb_nr)
447 slbe = &vcpu->arch.slb[slb_nr];
452 static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
454 struct kvmppc_slb *slbe;
456 if (slb_nr > vcpu->arch.slb_nr)
459 slbe = &vcpu->arch.slb[slb_nr];
464 static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
466 struct kvmppc_slb *slbe;
469 dprintk("KVM MMU: slbie(0x%llx)\n", ea);
471 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
476 dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
482 seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
483 kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
486 static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
490 dprintk("KVM MMU: slbia()\n");
492 for (i = 1; i < vcpu->arch.slb_nr; i++) {
493 vcpu->arch.slb[i].valid = false;
494 vcpu->arch.slb[i].orige = 0;
495 vcpu->arch.slb[i].origv = 0;
498 if (kvmppc_get_msr(vcpu) & MSR_IR) {
499 kvmppc_mmu_flush_segments(vcpu);
500 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
504 static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
510 * According to Book3 2.01 mtsrin is implemented as:
512 * The SLB entry specified by (RB)32:35 is loaded from register
515 * SLBE Bit Source SLB Field
517 * 0:31 0x0000_0000 ESID-0:31
518 * 32:35 (RB)32:35 ESID-32:35
520 * 37:61 0x00_0000|| 0b0 VSID-0:24
521 * 62:88 (RS)37:63 VSID-25:51
522 * 89:91 (RS)33:35 Ks Kp N
523 * 92 (RS)36 L ((RS)36 must be 0b0)
527 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
530 rb |= (srnum & 0xf) << 28;
531 /* Set the valid bit */
537 rs |= (value & 0xfffffff) << 12;
539 rs |= ((value >> 28) & 0x7) << 9;
541 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
544 static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
547 u64 mask = 0xFFFFFFFFFULL;
551 dprintk("KVM MMU: tlbie(0x%lx)\n", va);
554 * The tlbie instruction changed behaviour starting with
555 * POWER6. POWER6 and later don't have the large page flag
556 * in the instruction but in the RB value, along with bits
557 * indicating page and segment sizes.
559 if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
560 /* POWER6 or later */
561 if (va & 1) { /* L bit */
562 if ((va & 0xf000) == 0x1000)
563 mask = 0xFFFFFFFF0ULL; /* 64k page */
565 mask = 0xFFFFFF000ULL; /* 16M page */
568 /* older processors, e.g. PPC970 */
570 mask = 0xFFFFFF000ULL;
572 /* flush this VA on all vcpus */
573 kvm_for_each_vcpu(i, v, vcpu->kvm)
574 kvmppc_mmu_pte_vflush(v, va >> 12, mask);
577 #ifdef CONFIG_PPC_64K_PAGES
578 static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
580 ulong mp_ea = vcpu->arch.magic_page_ea;
582 return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
583 (mp_ea >> SID_SHIFT) == esid;
587 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
590 ulong ea = esid << SID_SHIFT;
591 struct kvmppc_slb *slb;
593 ulong mp_ea = vcpu->arch.magic_page_ea;
594 int pagesize = MMU_PAGE_64K;
595 u64 msr = kvmppc_get_msr(vcpu);
597 if (msr & (MSR_DR|MSR_IR)) {
598 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
601 pagesize = slb->base_page_size;
603 gvsid <<= SID_SHIFT_1T - SID_SHIFT;
604 gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
610 switch (msr & (MSR_DR|MSR_IR)) {
612 gvsid = VSID_REAL | esid;
615 gvsid |= VSID_REAL_IR;
618 gvsid |= VSID_REAL_DR;
630 #ifdef CONFIG_PPC_64K_PAGES
632 * Mark this as a 64k segment if the host is using
633 * 64k pages, the host MMU supports 64k pages and
634 * the guest segment page size is >= 64k,
635 * but not if this segment contains the magic page.
637 if (pagesize >= MMU_PAGE_64K &&
638 mmu_psize_defs[MMU_PAGE_64K].shift &&
639 !segment_contains_magic_page(vcpu, esid))
643 if (kvmppc_get_msr(vcpu) & MSR_PR)
650 /* Catch magic page case */
651 if (unlikely(mp_ea) &&
652 unlikely(esid == (mp_ea >> SID_SHIFT)) &&
653 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
654 *vsid = VSID_REAL | esid;
661 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
663 return (to_book3s(vcpu)->hid[5] & 0x80);
666 void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
668 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
671 mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
672 mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
673 mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
674 mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
675 mmu->slbfee = kvmppc_mmu_book3s_64_slbfee;
676 mmu->slbie = kvmppc_mmu_book3s_64_slbie;
677 mmu->slbia = kvmppc_mmu_book3s_64_slbia;
678 mmu->xlate = kvmppc_mmu_book3s_64_xlate;
679 mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
680 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
681 mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
682 mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
683 mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
685 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;