4 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
5 * deal of code from the sparc and intel versions.
7 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
9 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
10 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
20 #include <linux/kernel.h>
21 #include <linux/export.h>
22 #include <linux/sched/mm.h>
23 #include <linux/sched/topology.h>
24 #include <linux/smp.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/spinlock.h>
29 #include <linux/cache.h>
30 #include <linux/err.h>
31 #include <linux/device.h>
32 #include <linux/cpu.h>
33 #include <linux/notifier.h>
34 #include <linux/topology.h>
35 #include <linux/profile.h>
36 #include <linux/processor.h>
38 #include <asm/ptrace.h>
39 #include <linux/atomic.h>
41 #include <asm/hw_irq.h>
42 #include <asm/kvm_ppc.h>
43 #include <asm/dbell.h>
45 #include <asm/pgtable.h>
49 #include <asm/machdep.h>
50 #include <asm/cputhreads.h>
51 #include <asm/cputable.h>
53 #include <asm/vdso_datapage.h>
58 #include <asm/debug.h>
59 #include <asm/kexec.h>
60 #include <asm/asm-prototypes.h>
61 #include <asm/cpu_has_feature.h>
62 #include <asm/ftrace.h>
66 #define DBG(fmt...) udbg_printf(fmt)
71 #ifdef CONFIG_HOTPLUG_CPU
72 /* State of each CPU during hotplug phases */
73 static DEFINE_PER_CPU(int, cpu_state) = { 0 };
76 struct thread_info *secondary_ti;
78 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
79 DEFINE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
80 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
82 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
83 EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_map);
84 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
86 /* SMP operations for this machine */
87 struct smp_ops_t *smp_ops;
89 /* Can't be static due to PowerMac hackery */
90 volatile unsigned int cpu_callin_map[NR_CPUS];
92 int smt_enabled_at_boot = 1;
95 * Returns 1 if the specified cpu should be brought up during boot.
96 * Used to inhibit booting threads if they've been disabled or
97 * limited on the command line
99 int smp_generic_cpu_bootable(unsigned int nr)
101 /* Special case - we inhibit secondary thread startup
102 * during boot if the user requests it.
104 if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
105 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
107 if (smt_enabled_at_boot
108 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
117 int smp_generic_kick_cpu(int nr)
119 if (nr < 0 || nr >= nr_cpu_ids)
123 * The processor is currently spinning, waiting for the
124 * cpu_start field to become non-zero After we set cpu_start,
125 * the processor will continue on to secondary_start
127 if (!paca_ptrs[nr]->cpu_start) {
128 paca_ptrs[nr]->cpu_start = 1;
133 #ifdef CONFIG_HOTPLUG_CPU
135 * Ok it's not there, so it might be soft-unplugged, let's
136 * try to bring it back
138 generic_set_cpu_up(nr);
140 smp_send_reschedule(nr);
141 #endif /* CONFIG_HOTPLUG_CPU */
145 #endif /* CONFIG_PPC64 */
147 static irqreturn_t call_function_action(int irq, void *data)
149 generic_smp_call_function_interrupt();
153 static irqreturn_t reschedule_action(int irq, void *data)
159 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
160 static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
162 timer_broadcast_interrupt();
167 #ifdef CONFIG_NMI_IPI
168 static irqreturn_t nmi_ipi_action(int irq, void *data)
170 smp_handle_nmi_ipi(get_irq_regs());
175 static irq_handler_t smp_ipi_action[] = {
176 [PPC_MSG_CALL_FUNCTION] = call_function_action,
177 [PPC_MSG_RESCHEDULE] = reschedule_action,
178 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
179 [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
181 #ifdef CONFIG_NMI_IPI
182 [PPC_MSG_NMI_IPI] = nmi_ipi_action,
187 * The NMI IPI is a fallback and not truly non-maskable. It is simpler
188 * than going through the call function infrastructure, and strongly
189 * serialized, so it is more appropriate for debugging.
191 const char *smp_ipi_name[] = {
192 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
193 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
194 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
195 [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
197 [PPC_MSG_NMI_IPI] = "nmi ipi",
200 /* optional function to request ipi, for controllers with >= 4 ipis */
201 int smp_request_message_ipi(int virq, int msg)
205 if (msg < 0 || msg > PPC_MSG_NMI_IPI)
207 #ifndef CONFIG_NMI_IPI
208 if (msg == PPC_MSG_NMI_IPI)
212 err = request_irq(virq, smp_ipi_action[msg],
213 IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
214 smp_ipi_name[msg], NULL);
215 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
216 virq, smp_ipi_name[msg], err);
221 #ifdef CONFIG_PPC_SMP_MUXED_IPI
222 struct cpu_messages {
223 long messages; /* current messages */
225 static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
227 void smp_muxed_ipi_set_message(int cpu, int msg)
229 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
230 char *message = (char *)&info->messages;
233 * Order previous accesses before accesses in the IPI handler.
239 void smp_muxed_ipi_message_pass(int cpu, int msg)
241 smp_muxed_ipi_set_message(cpu, msg);
244 * cause_ipi functions are required to include a full barrier
245 * before doing whatever causes the IPI.
247 smp_ops->cause_ipi(cpu);
250 #ifdef __BIG_ENDIAN__
251 #define IPI_MESSAGE(A) (1uL << ((BITS_PER_LONG - 8) - 8 * (A)))
253 #define IPI_MESSAGE(A) (1uL << (8 * (A)))
256 irqreturn_t smp_ipi_demux(void)
258 mb(); /* order any irq clear */
260 return smp_ipi_demux_relaxed();
263 /* sync-free variant. Callers should ensure synchronization */
264 irqreturn_t smp_ipi_demux_relaxed(void)
266 struct cpu_messages *info;
269 info = this_cpu_ptr(&ipi_message);
271 all = xchg(&info->messages, 0);
272 #if defined(CONFIG_KVM_XICS) && defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
274 * Must check for PPC_MSG_RM_HOST_ACTION messages
275 * before PPC_MSG_CALL_FUNCTION messages because when
276 * a VM is destroyed, we call kick_all_cpus_sync()
277 * to ensure that any pending PPC_MSG_RM_HOST_ACTION
278 * messages have completed before we free any VCPUs.
280 if (all & IPI_MESSAGE(PPC_MSG_RM_HOST_ACTION))
281 kvmppc_xics_ipi_action();
283 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
284 generic_smp_call_function_interrupt();
285 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
287 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
288 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
289 timer_broadcast_interrupt();
291 #ifdef CONFIG_NMI_IPI
292 if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
293 nmi_ipi_action(0, NULL);
295 } while (info->messages);
299 #endif /* CONFIG_PPC_SMP_MUXED_IPI */
301 static inline void do_message_pass(int cpu, int msg)
303 if (smp_ops->message_pass)
304 smp_ops->message_pass(cpu, msg);
305 #ifdef CONFIG_PPC_SMP_MUXED_IPI
307 smp_muxed_ipi_message_pass(cpu, msg);
311 void smp_send_reschedule(int cpu)
314 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
316 EXPORT_SYMBOL_GPL(smp_send_reschedule);
318 void arch_send_call_function_single_ipi(int cpu)
320 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
323 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
327 for_each_cpu(cpu, mask)
328 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
331 #ifdef CONFIG_NMI_IPI
336 * NMI IPIs may not be recoverable, so should not be used as ongoing part of
337 * a running system. They can be used for crash, debug, halt/reboot, etc.
339 * NMI IPIs are globally single threaded. No more than one in progress at
342 * The IPI call waits with interrupts disabled until all targets enter the
343 * NMI handler, then the call returns.
345 * No new NMI can be initiated until targets exit the handler.
347 * The IPI call may time out without all targets entering the NMI handler.
348 * In that case, there is some logic to recover (and ignore subsequent
349 * NMI interrupts that may eventually be raised), but the platform interrupt
350 * handler may not be able to distinguish this from other exception causes,
351 * which may cause a crash.
354 static atomic_t __nmi_ipi_lock = ATOMIC_INIT(0);
355 static struct cpumask nmi_ipi_pending_mask;
356 static int nmi_ipi_busy_count = 0;
357 static void (*nmi_ipi_function)(struct pt_regs *) = NULL;
359 static void nmi_ipi_lock_start(unsigned long *flags)
361 raw_local_irq_save(*flags);
363 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
364 raw_local_irq_restore(*flags);
365 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
366 raw_local_irq_save(*flags);
371 static void nmi_ipi_lock(void)
373 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
374 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
377 static void nmi_ipi_unlock(void)
380 WARN_ON(atomic_read(&__nmi_ipi_lock) != 1);
381 atomic_set(&__nmi_ipi_lock, 0);
384 static void nmi_ipi_unlock_end(unsigned long *flags)
387 raw_local_irq_restore(*flags);
391 * Platform NMI handler calls this to ack
393 int smp_handle_nmi_ipi(struct pt_regs *regs)
395 void (*fn)(struct pt_regs *);
397 int me = raw_smp_processor_id();
401 * Unexpected NMIs are possible here because the interrupt may not
402 * be able to distinguish NMI IPIs from other types of NMIs, or
403 * because the caller may have timed out.
405 nmi_ipi_lock_start(&flags);
406 if (!nmi_ipi_busy_count)
408 if (!cpumask_test_cpu(me, &nmi_ipi_pending_mask))
411 fn = nmi_ipi_function;
415 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
416 nmi_ipi_busy_count++;
424 nmi_ipi_busy_count--;
426 nmi_ipi_unlock_end(&flags);
431 static void do_smp_send_nmi_ipi(int cpu)
433 if (smp_ops->cause_nmi_ipi && smp_ops->cause_nmi_ipi(cpu))
437 do_message_pass(cpu, PPC_MSG_NMI_IPI);
441 for_each_online_cpu(c) {
442 if (c == raw_smp_processor_id())
444 do_message_pass(c, PPC_MSG_NMI_IPI);
449 void smp_flush_nmi_ipi(u64 delay_us)
453 nmi_ipi_lock_start(&flags);
454 while (nmi_ipi_busy_count) {
455 nmi_ipi_unlock_end(&flags);
462 nmi_ipi_lock_start(&flags);
464 nmi_ipi_unlock_end(&flags);
468 * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
469 * - fn is the target callback function.
470 * - delay_us > 0 is the delay before giving up waiting for targets to
471 * enter the handler, == 0 specifies indefinite delay.
473 int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
476 int me = raw_smp_processor_id();
480 BUG_ON(cpu < 0 && cpu != NMI_IPI_ALL_OTHERS);
482 if (unlikely(!smp_ops))
485 /* Take the nmi_ipi_busy count/lock with interrupts hard disabled */
486 nmi_ipi_lock_start(&flags);
487 while (nmi_ipi_busy_count) {
488 nmi_ipi_unlock_end(&flags);
489 spin_until_cond(nmi_ipi_busy_count == 0);
490 nmi_ipi_lock_start(&flags);
493 nmi_ipi_function = fn;
497 cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
498 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
500 /* cpumask starts clear */
501 cpumask_set_cpu(cpu, &nmi_ipi_pending_mask);
503 nmi_ipi_busy_count++;
506 do_smp_send_nmi_ipi(cpu);
508 while (!cpumask_empty(&nmi_ipi_pending_mask)) {
518 if (!cpumask_empty(&nmi_ipi_pending_mask)) {
519 /* Could not gather all CPUs */
521 cpumask_clear(&nmi_ipi_pending_mask);
523 nmi_ipi_busy_count--;
524 nmi_ipi_unlock_end(&flags);
528 #endif /* CONFIG_NMI_IPI */
530 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
531 void tick_broadcast(const struct cpumask *mask)
535 for_each_cpu(cpu, mask)
536 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
540 #ifdef CONFIG_DEBUGGER
541 void debugger_ipi_callback(struct pt_regs *regs)
546 void smp_send_debugger_break(void)
548 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, debugger_ipi_callback, 1000000);
552 #ifdef CONFIG_KEXEC_CORE
553 void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
557 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_ipi_callback, 1000000);
558 if (kdump_in_progress() && crash_wake_offline) {
559 for_each_present_cpu(cpu) {
563 * crash_ipi_callback will wait for
564 * all cpus, including offline CPUs.
565 * We don't care about nmi_ipi_function.
566 * Offline cpus will jump straight into
567 * crash_ipi_callback, we can skip the
568 * entire NMI dance and waiting for
569 * cpus to clear pending mask, etc.
571 do_smp_send_nmi_ipi(cpu);
577 #ifdef CONFIG_NMI_IPI
578 static void nmi_stop_this_cpu(struct pt_regs *regs)
581 * This is a special case because it never returns, so the NMI IPI
582 * handling would never mark it as done, which makes any later
583 * smp_send_nmi_ipi() call spin forever. Mark it done now.
585 * IRQs are already hard disabled by the smp_handle_nmi_ipi.
588 nmi_ipi_busy_count--;
591 /* Remove this CPU */
592 set_cpu_online(smp_processor_id(), false);
599 void smp_send_stop(void)
601 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, nmi_stop_this_cpu, 1000000);
604 #else /* CONFIG_NMI_IPI */
606 static void stop_this_cpu(void *dummy)
608 /* Remove this CPU */
609 set_cpu_online(smp_processor_id(), false);
617 void smp_send_stop(void)
619 static bool stopped = false;
622 * Prevent waiting on csd lock from a previous smp_send_stop.
623 * This is racy, but in general callers try to do the right
624 * thing and only fire off one smp_send_stop (e.g., see
632 smp_call_function(stop_this_cpu, NULL, 0);
634 #endif /* CONFIG_NMI_IPI */
636 struct thread_info *current_set[NR_CPUS];
638 static void smp_store_cpu_info(int id)
640 per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
641 #ifdef CONFIG_PPC_FSL_BOOK3E
642 per_cpu(next_tlbcam_idx, id)
643 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
648 * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
649 * rather than just passing around the cpumask we pass around a function that
650 * returns the that cpumask for the given CPU.
652 static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))
654 cpumask_set_cpu(i, get_cpumask(j));
655 cpumask_set_cpu(j, get_cpumask(i));
658 #ifdef CONFIG_HOTPLUG_CPU
659 static void set_cpus_unrelated(int i, int j,
660 struct cpumask *(*get_cpumask)(int))
662 cpumask_clear_cpu(i, get_cpumask(j));
663 cpumask_clear_cpu(j, get_cpumask(i));
667 void __init smp_prepare_cpus(unsigned int max_cpus)
671 DBG("smp_prepare_cpus\n");
674 * setup_cpu may need to be called on the boot cpu. We havent
675 * spun any cpus up but lets be paranoid.
677 BUG_ON(boot_cpuid != smp_processor_id());
680 smp_store_cpu_info(boot_cpuid);
681 cpu_callin_map[boot_cpuid] = 1;
683 for_each_possible_cpu(cpu) {
684 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
685 GFP_KERNEL, cpu_to_node(cpu));
686 zalloc_cpumask_var_node(&per_cpu(cpu_l2_cache_map, cpu),
687 GFP_KERNEL, cpu_to_node(cpu));
688 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
689 GFP_KERNEL, cpu_to_node(cpu));
691 * numa_node_id() works after this.
693 if (cpu_present(cpu)) {
694 set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
695 set_cpu_numa_mem(cpu,
696 local_memory_node(numa_cpu_lookup_table[cpu]));
700 /* Init the cpumasks so the boot CPU is related to itself */
701 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
702 cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
703 cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
705 if (smp_ops && smp_ops->probe)
709 void smp_prepare_boot_cpu(void)
711 BUG_ON(smp_processor_id() != boot_cpuid);
713 paca_ptrs[boot_cpuid]->__current = current;
715 set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
716 current_set[boot_cpuid] = task_thread_info(current);
719 #ifdef CONFIG_HOTPLUG_CPU
721 int generic_cpu_disable(void)
723 unsigned int cpu = smp_processor_id();
725 if (cpu == boot_cpuid)
728 set_cpu_online(cpu, false);
730 vdso_data->processorCount--;
732 /* Update affinity of all IRQs previously aimed at this CPU */
733 irq_migrate_all_off_this_cpu();
736 * Depending on the details of the interrupt controller, it's possible
737 * that one of the interrupts we just migrated away from this CPU is
738 * actually already pending on this CPU. If we leave it in that state
739 * the interrupt will never be EOI'ed, and will never fire again. So
740 * temporarily enable interrupts here, to allow any pending interrupt to
741 * be received (and EOI'ed), before we take this CPU offline.
750 void generic_cpu_die(unsigned int cpu)
754 for (i = 0; i < 100; i++) {
756 if (is_cpu_dead(cpu))
760 printk(KERN_ERR "CPU%d didn't die...\n", cpu);
763 void generic_set_cpu_dead(unsigned int cpu)
765 per_cpu(cpu_state, cpu) = CPU_DEAD;
769 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
770 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
771 * which makes the delay in generic_cpu_die() not happen.
773 void generic_set_cpu_up(unsigned int cpu)
775 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
778 int generic_check_cpu_restart(unsigned int cpu)
780 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
783 int is_cpu_dead(unsigned int cpu)
785 return per_cpu(cpu_state, cpu) == CPU_DEAD;
788 static bool secondaries_inhibited(void)
790 return kvm_hv_mode_active();
793 #else /* HOTPLUG_CPU */
795 #define secondaries_inhibited() 0
799 static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
801 struct thread_info *ti = task_thread_info(idle);
804 paca_ptrs[cpu]->__current = idle;
805 paca_ptrs[cpu]->kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;
808 secondary_ti = current_set[cpu] = ti;
811 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
816 * Don't allow secondary threads to come online if inhibited
818 if (threads_per_core > 1 && secondaries_inhibited() &&
819 cpu_thread_in_subcore(cpu))
822 if (smp_ops == NULL ||
823 (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
826 cpu_idle_thread_init(cpu, tidle);
829 * The platform might need to allocate resources prior to bringing
832 if (smp_ops->prepare_cpu) {
833 rc = smp_ops->prepare_cpu(cpu);
838 /* Make sure callin-map entry is 0 (can be leftover a CPU
841 cpu_callin_map[cpu] = 0;
843 /* The information for processor bringup must
844 * be written out to main store before we release
850 DBG("smp: kicking cpu %d\n", cpu);
851 rc = smp_ops->kick_cpu(cpu);
853 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
858 * wait to see if the cpu made a callin (is actually up).
859 * use this value that I found through experimentation.
862 if (system_state < SYSTEM_RUNNING)
863 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
865 #ifdef CONFIG_HOTPLUG_CPU
868 * CPUs can take much longer to come up in the
869 * hotplug case. Wait five seconds.
871 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
875 if (!cpu_callin_map[cpu]) {
876 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
880 DBG("Processor %u found.\n", cpu);
882 if (smp_ops->give_timebase)
883 smp_ops->give_timebase();
885 /* Wait until cpu puts itself in the online & active maps */
886 spin_until_cond(cpu_online(cpu));
891 /* Return the value of the reg property corresponding to the given
894 int cpu_to_core_id(int cpu)
896 struct device_node *np;
900 np = of_get_cpu_node(cpu, NULL);
904 reg = of_get_property(np, "reg", NULL);
908 id = be32_to_cpup(reg);
913 EXPORT_SYMBOL_GPL(cpu_to_core_id);
915 /* Helper routines for cpu to core mapping */
916 int cpu_core_index_of_thread(int cpu)
918 return cpu >> threads_shift;
920 EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
922 int cpu_first_thread_of_core(int core)
924 return core << threads_shift;
926 EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
928 /* Must be called when no change can occur to cpu_present_mask,
929 * i.e. during cpu online or offline.
931 static struct device_node *cpu_to_l2cache(int cpu)
933 struct device_node *np;
934 struct device_node *cache;
936 if (!cpu_present(cpu))
939 np = of_get_cpu_node(cpu, NULL);
943 cache = of_find_next_cache_node(np);
950 static bool update_mask_by_l2(int cpu, struct cpumask *(*mask_fn)(int))
952 struct device_node *l2_cache, *np;
955 l2_cache = cpu_to_l2cache(cpu);
959 for_each_cpu(i, cpu_online_mask) {
961 * when updating the marks the current CPU has not been marked
962 * online, but we need to update the cache masks
964 np = cpu_to_l2cache(i);
969 set_cpus_related(cpu, i, mask_fn);
973 of_node_put(l2_cache);
978 #ifdef CONFIG_HOTPLUG_CPU
979 static void remove_cpu_from_masks(int cpu)
983 /* NB: cpu_core_mask is a superset of the others */
984 for_each_cpu(i, cpu_core_mask(cpu)) {
985 set_cpus_unrelated(cpu, i, cpu_core_mask);
986 set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
987 set_cpus_unrelated(cpu, i, cpu_sibling_mask);
992 static void add_cpu_to_masks(int cpu)
994 int first_thread = cpu_first_thread_sibling(cpu);
995 int chipid = cpu_to_chip_id(cpu);
999 * This CPU will not be in the online mask yet so we need to manually
1000 * add it to it's own thread sibling mask.
1002 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
1004 for (i = first_thread; i < first_thread + threads_per_core; i++)
1006 set_cpus_related(i, cpu, cpu_sibling_mask);
1009 * Copy the thread sibling mask into the cache sibling mask
1010 * and mark any CPUs that share an L2 with this CPU.
1012 for_each_cpu(i, cpu_sibling_mask(cpu))
1013 set_cpus_related(cpu, i, cpu_l2_cache_mask);
1014 update_mask_by_l2(cpu, cpu_l2_cache_mask);
1017 * Copy the cache sibling mask into core sibling mask and mark
1018 * any CPUs on the same chip as this CPU.
1020 for_each_cpu(i, cpu_l2_cache_mask(cpu))
1021 set_cpus_related(cpu, i, cpu_core_mask);
1026 for_each_cpu(i, cpu_online_mask)
1027 if (cpu_to_chip_id(i) == chipid)
1028 set_cpus_related(cpu, i, cpu_core_mask);
1031 static bool shared_caches;
1033 /* Activate a secondary processor. */
1034 void start_secondary(void *unused)
1036 unsigned int cpu = smp_processor_id();
1039 current->active_mm = &init_mm;
1041 smp_store_cpu_info(cpu);
1042 set_dec(tb_ticks_per_jiffy);
1044 cpu_callin_map[cpu] = 1;
1046 if (smp_ops->setup_cpu)
1047 smp_ops->setup_cpu(cpu);
1048 if (smp_ops->take_timebase)
1049 smp_ops->take_timebase();
1051 secondary_cpu_time_init();
1054 if (system_state == SYSTEM_RUNNING)
1055 vdso_data->processorCount++;
1059 /* Update topology CPU masks */
1060 add_cpu_to_masks(cpu);
1063 * Check for any shared caches. Note that this must be done on a
1064 * per-core basis because one core in the pair might be disabled.
1066 if (!cpumask_equal(cpu_l2_cache_mask(cpu), cpu_sibling_mask(cpu)))
1067 shared_caches = true;
1069 set_numa_node(numa_cpu_lookup_table[cpu]);
1070 set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));
1073 notify_cpu_starting(cpu);
1074 set_cpu_online(cpu, true);
1078 /* We can enable ftrace for secondary cpus now */
1079 this_cpu_enable_ftrace();
1081 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1086 int setup_profiling_timer(unsigned int multiplier)
1091 #ifdef CONFIG_SCHED_SMT
1092 /* cpumask of CPUs with asymetric SMT dependancy */
1093 static int powerpc_smt_flags(void)
1095 int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
1097 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
1098 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
1099 flags |= SD_ASYM_PACKING;
1105 static struct sched_domain_topology_level powerpc_topology[] = {
1106 #ifdef CONFIG_SCHED_SMT
1107 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1109 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1114 * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
1115 * This topology makes it *much* cheaper to migrate tasks between adjacent cores
1116 * since the migrated task remains cache hot. We want to take advantage of this
1117 * at the scheduler level so an extra topology level is required.
1119 static int powerpc_shared_cache_flags(void)
1121 return SD_SHARE_PKG_RESOURCES;
1125 * We can't just pass cpu_l2_cache_mask() directly because
1126 * returns a non-const pointer and the compiler barfs on that.
1128 static const struct cpumask *shared_cache_mask(int cpu)
1130 return cpu_l2_cache_mask(cpu);
1133 static struct sched_domain_topology_level power9_topology[] = {
1134 #ifdef CONFIG_SCHED_SMT
1135 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1137 { shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
1138 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1142 void __init smp_cpus_done(unsigned int max_cpus)
1145 * We are running pinned to the boot CPU, see rest_init().
1147 if (smp_ops && smp_ops->setup_cpu)
1148 smp_ops->setup_cpu(boot_cpuid);
1150 if (smp_ops && smp_ops->bringup_done)
1151 smp_ops->bringup_done();
1153 dump_numa_cpu_topology();
1156 * If any CPU detects that it's sharing a cache with another CPU then
1157 * use the deeper topology that is aware of this sharing.
1159 if (shared_caches) {
1160 pr_info("Using shared cache scheduler topology\n");
1161 set_sched_topology(power9_topology);
1163 pr_info("Using standard scheduler topology\n");
1164 set_sched_topology(powerpc_topology);
1168 #ifdef CONFIG_HOTPLUG_CPU
1169 int __cpu_disable(void)
1171 int cpu = smp_processor_id();
1174 if (!smp_ops->cpu_disable)
1177 this_cpu_disable_ftrace();
1179 err = smp_ops->cpu_disable();
1183 /* Update sibling maps */
1184 remove_cpu_from_masks(cpu);
1189 void __cpu_die(unsigned int cpu)
1191 if (smp_ops->cpu_die)
1192 smp_ops->cpu_die(cpu);
1198 * Disable on the down path. This will be re-enabled by
1199 * start_secondary() via start_secondary_resume() below
1201 this_cpu_disable_ftrace();
1206 /* If we return, we re-enter start_secondary */
1207 start_secondary_resume();