1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Common boot and setup code for both 32-bit and 64-bit.
4 * Extracted from arch/powerpc/kernel/setup_64.c.
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
11 #include <linux/export.h>
12 #include <linux/string.h>
13 #include <linux/sched.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/reboot.h>
17 #include <linux/delay.h>
18 #include <linux/initrd.h>
19 #include <linux/platform_device.h>
20 #include <linux/seq_file.h>
21 #include <linux/ioport.h>
22 #include <linux/console.h>
23 #include <linux/screen_info.h>
24 #include <linux/root_dev.h>
25 #include <linux/notifier.h>
26 #include <linux/cpu.h>
27 #include <linux/unistd.h>
28 #include <linux/serial.h>
29 #include <linux/serial_8250.h>
30 #include <linux/percpu.h>
31 #include <linux/memblock.h>
32 #include <linux/of_platform.h>
33 #include <linux/hugetlb.h>
34 #include <linux/pgtable.h>
35 #include <asm/debugfs.h>
39 #include <asm/processor.h>
40 #include <asm/vdso_datapage.h>
43 #include <asm/machdep.h>
45 #include <asm/cputable.h>
46 #include <asm/sections.h>
47 #include <asm/firmware.h>
48 #include <asm/btext.h>
49 #include <asm/nvram.h>
50 #include <asm/setup.h>
52 #include <asm/iommu.h>
53 #include <asm/serial.h>
54 #include <asm/cache.h>
58 #include <asm/cputhreads.h>
59 #include <mm/mmu_decl.h>
60 #include <asm/fadump.h>
62 #include <asm/hugetlb.h>
63 #include <asm/livepatch.h>
64 #include <asm/mmu_context.h>
65 #include <asm/cpu_has_feature.h>
66 #include <asm/kasan.h>
72 #define DBG(fmt...) udbg_printf(fmt)
77 /* The main machine-dep calls structure
79 struct machdep_calls ppc_md;
80 EXPORT_SYMBOL(ppc_md);
81 struct machdep_calls *machine_id;
82 EXPORT_SYMBOL(machine_id);
85 EXPORT_SYMBOL_GPL(boot_cpuid);
88 * These are used in binfmt_elf.c to put aux entries on the stack
89 * for each elf executable being started.
96 unsigned long klimit = (unsigned long) _end;
99 * This still seems to be needed... -- paulus
101 struct screen_info screen_info = {
104 .orig_video_cols = 80,
105 .orig_video_lines = 25,
106 .orig_video_isVGA = 1,
107 .orig_video_points = 16
109 #if defined(CONFIG_FB_VGA16_MODULE)
110 EXPORT_SYMBOL(screen_info);
113 /* Variables required to store legacy IO irq routing */
114 int of_i8042_kbd_irq;
115 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
116 int of_i8042_aux_irq;
117 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
119 #ifdef __DO_IRQ_CANON
120 /* XXX should go elsewhere eventually */
121 int ppc_do_canonicalize_irqs;
122 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
125 #ifdef CONFIG_CRASH_CORE
126 /* This keeps a track of which one is the crashing cpu. */
127 int crashing_cpu = -1;
130 /* also used by kexec */
131 void machine_shutdown(void)
134 * if fadump is active, cleanup the fadump registration before we
139 if (ppc_md.machine_shutdown)
140 ppc_md.machine_shutdown();
143 static void machine_hang(void)
145 pr_emerg("System Halted, OK to turn off power\n");
151 void machine_restart(char *cmd)
159 do_kernel_restart(cmd);
165 void machine_power_off(void)
174 /* Used by the G5 thermal driver */
175 EXPORT_SYMBOL_GPL(machine_power_off);
177 void (*pm_power_off)(void);
178 EXPORT_SYMBOL_GPL(pm_power_off);
180 void machine_halt(void)
191 DEFINE_PER_CPU(unsigned int, cpu_pvr);
194 static void show_cpuinfo_summary(struct seq_file *m)
196 struct device_node *root;
197 const char *model = NULL;
198 unsigned long bogosum = 0;
201 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
202 for_each_online_cpu(i)
203 bogosum += loops_per_jiffy;
204 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
205 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
207 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
209 seq_printf(m, "platform\t: %s\n", ppc_md.name);
210 root = of_find_node_by_path("/");
212 model = of_get_property(root, "model", NULL);
214 seq_printf(m, "model\t\t: %s\n", model);
217 if (ppc_md.show_cpuinfo != NULL)
218 ppc_md.show_cpuinfo(m);
220 /* Display the amount of memory */
221 if (IS_ENABLED(CONFIG_PPC32))
222 seq_printf(m, "Memory\t\t: %d MB\n",
223 (unsigned int)(total_memory / (1024 * 1024)));
226 static int show_cpuinfo(struct seq_file *m, void *v)
228 unsigned long cpu_id = (unsigned long)v - 1;
230 unsigned long proc_freq;
235 pvr = per_cpu(cpu_pvr, cpu_id);
237 pvr = mfspr(SPRN_PVR);
239 maj = (pvr >> 8) & 0xFF;
242 seq_printf(m, "processor\t: %lu\n", cpu_id);
243 seq_printf(m, "cpu\t\t: ");
245 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
246 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
248 seq_printf(m, "unknown (%08x)", pvr);
250 if (cpu_has_feature(CPU_FTR_ALTIVEC))
251 seq_printf(m, ", altivec supported");
256 if (cpu_has_feature(CPU_FTR_TAU)) {
257 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
258 /* more straightforward, but potentially misleading */
259 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
262 /* show the actual temp sensor range */
264 temp = cpu_temp_both(cpu_id);
265 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
266 temp & 0xff, temp >> 16);
269 #endif /* CONFIG_TAU */
272 * Platforms that have variable clock rates, should implement
273 * the method ppc_md.get_proc_freq() that reports the clock
274 * rate of a given cpu. The rest can use ppc_proc_freq to
275 * report the clock rate that is same across all cpus.
277 if (ppc_md.get_proc_freq)
278 proc_freq = ppc_md.get_proc_freq(cpu_id);
280 proc_freq = ppc_proc_freq;
283 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
284 proc_freq / 1000000, proc_freq % 1000000);
286 if (ppc_md.show_percpuinfo != NULL)
287 ppc_md.show_percpuinfo(m, cpu_id);
289 /* If we are a Freescale core do a simple check so
290 * we dont have to keep adding cases in the future */
291 if (PVR_VER(pvr) & 0x8000) {
292 switch (PVR_VER(pvr)) {
293 case 0x8000: /* 7441/7450/7451, Voyager */
294 case 0x8001: /* 7445/7455, Apollo 6 */
295 case 0x8002: /* 7447/7457, Apollo 7 */
296 case 0x8003: /* 7447A, Apollo 7 PM */
297 case 0x8004: /* 7448, Apollo 8 */
298 case 0x800c: /* 7410, Nitro */
299 maj = ((pvr >> 8) & 0xF);
302 default: /* e500/book-e */
308 switch (PVR_VER(pvr)) {
309 case 0x1008: /* 740P/750P ?? */
310 maj = ((pvr >> 8) & 0xFF) - 1;
313 case 0x004e: /* POWER9 bits 12-15 give chip type */
314 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
315 maj = (pvr >> 8) & 0x0F;
319 maj = (pvr >> 8) & 0xFF;
325 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
326 maj, min, PVR_VER(pvr), PVR_REV(pvr));
328 if (IS_ENABLED(CONFIG_PPC32))
329 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
330 (loops_per_jiffy / (5000 / HZ)) % 100);
334 /* If this is the last cpu, print the summary */
335 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
336 show_cpuinfo_summary(m);
341 static void *c_start(struct seq_file *m, loff_t *pos)
343 if (*pos == 0) /* just in case, cpu 0 is not the first */
344 *pos = cpumask_first(cpu_online_mask);
346 *pos = cpumask_next(*pos - 1, cpu_online_mask);
347 if ((*pos) < nr_cpu_ids)
348 return (void *)(unsigned long)(*pos + 1);
352 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
355 return c_start(m, pos);
358 static void c_stop(struct seq_file *m, void *v)
362 const struct seq_operations cpuinfo_op = {
366 .show = show_cpuinfo,
369 void __init check_for_initrd(void)
371 #ifdef CONFIG_BLK_DEV_INITRD
372 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
373 initrd_start, initrd_end);
375 /* If we were passed an initrd, set the ROOT_DEV properly if the values
376 * look sensible. If not, clear initrd reference.
378 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
379 initrd_end > initrd_start)
380 ROOT_DEV = Root_RAM0;
382 initrd_start = initrd_end = 0;
385 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
387 DBG(" <- check_for_initrd()\n");
388 #endif /* CONFIG_BLK_DEV_INITRD */
393 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
394 cpumask_t threads_core_mask __read_mostly;
395 EXPORT_SYMBOL_GPL(threads_per_core);
396 EXPORT_SYMBOL_GPL(threads_per_subcore);
397 EXPORT_SYMBOL_GPL(threads_shift);
398 EXPORT_SYMBOL_GPL(threads_core_mask);
400 static void __init cpu_init_thread_core_maps(int tpc)
404 threads_per_core = tpc;
405 threads_per_subcore = tpc;
406 cpumask_clear(&threads_core_mask);
408 /* This implementation only supports power of 2 number of threads
409 * for simplicity and performance
411 threads_shift = ilog2(tpc);
412 BUG_ON(tpc != (1 << threads_shift));
414 for (i = 0; i < tpc; i++)
415 cpumask_set_cpu(i, &threads_core_mask);
417 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
418 tpc, tpc > 1 ? "s" : "");
419 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
423 u32 *cpu_to_phys_id = NULL;
426 * setup_cpu_maps - initialize the following cpu maps:
430 * Having the possible map set up early allows us to restrict allocations
431 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
433 * We do not initialize the online map here; cpus set their own bits in
434 * cpu_online_mask as they come up.
436 * This function is valid only for Open Firmware systems. finish_device_tree
437 * must be called before using this.
439 * While we're here, we may as well set the "physical" cpu ids in the paca.
441 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
443 void __init smp_setup_cpu_maps(void)
445 struct device_node *dn;
449 DBG("smp_setup_cpu_maps()\n");
451 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
454 panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
455 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
457 for_each_node_by_type(dn, "cpu") {
458 const __be32 *intserv;
462 DBG(" * %pOF...\n", dn);
464 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
467 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
470 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
471 intserv = of_get_property(dn, "reg", &len);
473 cpu_be = cpu_to_be32(cpu);
474 /* XXX: what is this? uninitialized?? */
475 intserv = &cpu_be; /* assume logical == phys */
480 nthreads = len / sizeof(int);
482 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
485 DBG(" thread %d -> cpu %d (hard id %d)\n",
486 j, cpu, be32_to_cpu(intserv[j]));
488 avail = of_device_is_available(dn);
490 avail = !of_property_match_string(dn,
491 "enable-method", "spin-table");
493 set_cpu_present(cpu, avail);
494 set_cpu_possible(cpu, true);
495 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
499 if (cpu >= nr_cpu_ids) {
505 /* If no SMT supported, nthreads is forced to 1 */
506 if (!cpu_has_feature(CPU_FTR_SMT)) {
507 DBG(" SMT disabled ! nthreads forced to 1\n");
513 * On pSeries LPAR, we need to know how many cpus
514 * could possibly be added to this partition.
516 if (firmware_has_feature(FW_FEATURE_LPAR) &&
517 (dn = of_find_node_by_path("/rtas"))) {
518 int num_addr_cell, num_size_cell, maxcpus;
521 num_addr_cell = of_n_addr_cells(dn);
522 num_size_cell = of_n_size_cells(dn);
524 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
529 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
531 /* Double maxcpus for processors which have SMT capability */
532 if (cpu_has_feature(CPU_FTR_SMT))
535 if (maxcpus > nr_cpu_ids) {
537 "Partition configured for %d cpus, "
538 "operating system maximum is %u.\n",
539 maxcpus, nr_cpu_ids);
540 maxcpus = nr_cpu_ids;
542 printk(KERN_INFO "Partition configured for %d cpus.\n",
545 for (cpu = 0; cpu < maxcpus; cpu++)
546 set_cpu_possible(cpu, true);
550 vdso_data->processorCount = num_present_cpus();
551 #endif /* CONFIG_PPC64 */
553 /* Initialize CPU <=> thread mapping/
555 * WARNING: We assume that the number of threads is the same for
556 * every CPU in the system. If that is not the case, then some code
557 * here will have to be reworked
559 cpu_init_thread_core_maps(nthreads);
561 /* Now that possible cpus are set, set nr_cpu_ids for later use */
566 #endif /* CONFIG_SMP */
568 #ifdef CONFIG_PCSPKR_PLATFORM
569 static __init int add_pcspkr(void)
571 struct device_node *np;
572 struct platform_device *pd;
575 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
580 pd = platform_device_alloc("pcspkr", -1);
584 ret = platform_device_add(pd);
586 platform_device_put(pd);
590 device_initcall(add_pcspkr);
591 #endif /* CONFIG_PCSPKR_PLATFORM */
593 void probe_machine(void)
595 extern struct machdep_calls __machine_desc_start;
596 extern struct machdep_calls __machine_desc_end;
600 * Iterate all ppc_md structures until we find the proper
601 * one for the current machine type
603 DBG("Probing machine type ...\n");
606 * Check ppc_md is empty, if not we have a bug, ie, we setup an
607 * entry before probe_machine() which will be overwritten
609 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
610 if (((void **)&ppc_md)[i]) {
611 printk(KERN_ERR "Entry %d in ppc_md non empty before"
612 " machine probe !\n", i);
616 for (machine_id = &__machine_desc_start;
617 machine_id < &__machine_desc_end;
619 DBG(" %s ...", machine_id->name);
620 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
621 if (ppc_md.probe()) {
627 /* What can we do if we didn't find ? */
628 if (machine_id >= &__machine_desc_end) {
629 pr_err("No suitable machine description found !\n");
633 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
636 /* Match a class of boards, not a specific device configuration. */
637 int check_legacy_ioport(unsigned long base_port)
639 struct device_node *parent, *np = NULL;
644 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
645 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
647 parent = of_get_parent(np);
649 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
650 if (!of_i8042_kbd_irq)
651 of_i8042_kbd_irq = 1;
653 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
654 if (!of_i8042_aux_irq)
655 of_i8042_aux_irq = 12;
661 np = of_find_node_by_type(NULL, "8042");
662 /* Pegasos has no device_type on its 8042 node, look for the
665 np = of_find_node_by_name(NULL, "8042");
667 of_i8042_kbd_irq = 1;
668 of_i8042_aux_irq = 12;
671 case FDC_BASE: /* FDC1 */
672 np = of_find_node_by_type(NULL, "fdc");
675 /* ipmi is supposed to fail here */
680 parent = of_get_parent(np);
682 if (of_node_is_type(parent, "isa"))
689 EXPORT_SYMBOL(check_legacy_ioport);
691 static int ppc_panic_event(struct notifier_block *this,
692 unsigned long event, void *ptr)
695 * panic does a local_irq_disable, but we really
696 * want interrupts to be hard disabled.
701 * If firmware-assisted dump has been registered then trigger
702 * firmware-assisted dump and let firmware handle everything else.
704 crash_fadump(NULL, ptr);
706 ppc_md.panic(ptr); /* May not return */
710 static struct notifier_block ppc_panic_block = {
711 .notifier_call = ppc_panic_event,
712 .priority = INT_MIN /* may not return; must be done last */
716 * Dump out kernel offset information on panic.
718 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
721 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
722 kaslr_offset(), KERNELBASE);
727 static struct notifier_block kernel_offset_notifier = {
728 .notifier_call = dump_kernel_offset
731 void __init setup_panic(void)
733 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
734 atomic_notifier_chain_register(&panic_notifier_list,
735 &kernel_offset_notifier);
737 /* PPC64 always does a hard irq disable in its panic handler */
738 if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
740 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
743 #ifdef CONFIG_CHECK_CACHE_COHERENCY
745 * For platforms that have configurable cache-coherency. This function
746 * checks that the cache coherency setting of the kernel matches the setting
747 * left by the firmware, as indicated in the device tree. Since a mismatch
748 * will eventually result in DMA failures, we print * and error and call
749 * BUG() in that case.
752 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
754 static int __init check_cache_coherency(void)
756 struct device_node *np;
758 bool devtree_coherency;
760 np = of_find_node_by_path("/");
761 prop = of_get_property(np, "coherency-off", NULL);
764 devtree_coherency = prop ? false : true;
766 if (devtree_coherency != KERNEL_COHERENCY) {
768 "kernel coherency:%s != device tree_coherency:%s\n",
769 KERNEL_COHERENCY ? "on" : "off",
770 devtree_coherency ? "on" : "off");
777 late_initcall(check_cache_coherency);
778 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
780 #ifdef CONFIG_DEBUG_FS
781 struct dentry *powerpc_debugfs_root;
782 EXPORT_SYMBOL(powerpc_debugfs_root);
784 static int powerpc_debugfs_init(void)
786 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
789 arch_initcall(powerpc_debugfs_init);
792 void ppc_printk_progress(char *s, unsigned short hex)
797 static __init void print_system_info(void)
799 pr_info("-----------------------------------------------------\n");
800 pr_info("phys_mem_size = 0x%llx\n",
801 (unsigned long long)memblock_phys_mem_size());
803 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
804 pr_info("icache_bsize = 0x%x\n", icache_bsize);
805 if (ucache_bsize != 0)
806 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
808 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
809 pr_info(" possible = 0x%016lx\n",
810 (unsigned long)CPU_FTRS_POSSIBLE);
811 pr_info(" always = 0x%016lx\n",
812 (unsigned long)CPU_FTRS_ALWAYS);
813 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
814 cur_cpu_spec->cpu_user_features,
815 cur_cpu_spec->cpu_user_features2);
816 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
818 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
819 #ifdef CONFIG_PPC_BOOK3S
820 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START);
821 pr_info("IO start = 0x%lx\n", KERN_IO_START);
822 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap);
826 if (!early_radix_enabled())
827 print_system_hash_info();
829 if (PHYSICAL_START > 0)
830 pr_info("physical_start = 0x%llx\n",
831 (unsigned long long)PHYSICAL_START);
832 pr_info("-----------------------------------------------------\n");
836 static void smp_setup_pacas(void)
840 for_each_possible_cpu(cpu) {
841 if (cpu == smp_processor_id())
844 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
847 memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
848 cpu_to_phys_id = NULL;
853 * Called into from start_kernel this initializes memblock, which is used
854 * to manage page allocation until mem_init is called.
856 void __init setup_arch(char **cmdline_p)
860 *cmdline_p = boot_command_line;
862 /* Set a half-reasonable default so udelay does something sensible */
863 loops_per_jiffy = 500000000 / HZ;
865 /* Unflatten the device-tree passed by prom_init or kexec */
866 unflatten_device_tree();
869 * Initialize cache line/block info from device-tree (on ppc64) or
870 * just cputable (on ppc32).
872 initialize_cache_info();
874 /* Initialize RTAS if available. */
877 /* Check if we have an initrd provided via the device-tree. */
880 /* Probe the machine type, establish ppc_md. */
883 /* Setup panic notifier if requested by the platform. */
887 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
888 * it from their respective probe() function.
892 /* Discover standard serial ports. */
893 find_legacy_serial_ports();
895 /* Register early console with the printk subsystem. */
896 register_early_udbg_console();
898 /* Setup the various CPU maps based on the device-tree. */
899 smp_setup_cpu_maps();
901 /* Initialize xmon. */
904 /* Check the SMT related command line arguments (ppc64). */
907 /* Parse memory topology */
908 mem_topology_setup();
911 * Release secondary cpus out of their spinloops at 0x60 now that
912 * we can map physical -> logical CPU ids.
914 * Freescale Book3e parts spin in a loop provided by firmware,
915 * so smp_release_cpus() does nothing for them.
920 /* On BookE, setup per-core TLB data structures. */
921 setup_tlb_core_data();
926 /* Print various info about the machine that has been gathered so far. */
929 /* Reserve large chunks of memory for use by CMA for KVM. */
932 /* Reserve large chunks of memory for us by CMA for hugetlb */
933 gigantic_hugetlb_cma_reserve();
935 klp_init_thread_info(&init_task);
937 init_mm.start_code = (unsigned long)_stext;
938 init_mm.end_code = (unsigned long) _etext;
939 init_mm.end_data = (unsigned long) _edata;
940 init_mm.brk = klimit;
942 mm_iommu_init(&init_mm);
943 irqstack_early_init();
944 exc_lvl_early_init();
945 emergency_stack_init();
949 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
951 if (ppc_md.setup_arch)
954 setup_barrier_nospec();
959 /* Initialize the MMU context management stuff. */
962 /* Interrupt code needs to be 64K-aligned. */
963 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
964 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
965 (unsigned long)_stext);