1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains miscellaneous low-level functions.
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
8 * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
9 * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
12 #include <linux/sys.h>
13 #include <asm/unistd.h>
14 #include <asm/errno.h>
15 #include <asm/processor.h>
17 #include <asm/cache.h>
18 #include <asm/ppc_asm.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/cputable.h>
21 #include <asm/thread_info.h>
22 #include <asm/kexec.h>
23 #include <asm/ptrace.h>
25 #include <asm/export.h>
26 #include <asm/feature-fixups.h>
31 EXPORT_SYMBOL(__bswapdi2)
33 rlwinm r7,r3,8,0xffffffff
35 rlwinm r9,r8,8,0xffffffff
44 #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
74 #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */
76 #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
79 * Do an IO access in real mode
110 * Do an IO access in real mode
139 #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */
141 #ifdef CONFIG_PPC_PASEMI
143 _GLOBAL(real_205_readb)
158 _GLOBAL(real_205_writeb)
173 #endif /* CONFIG_PPC_PASEMI */
176 #if defined(CONFIG_CPU_FREQ_PMAC64) || defined(CONFIG_CPU_FREQ_MAPLE)
178 * SCOM access functions for 970 (FX only for now)
180 * unsigned long scom970_read(unsigned int address);
181 * void scom970_write(unsigned int address, unsigned long value);
183 * The address passed in is the 24 bits register address. This code
184 * is 970 specific and will not check the status bits, so you should
185 * know what you are doing.
187 _GLOBAL(scom970_read)
194 /* rotate 24 bits SCOM address 8 bits left and mask out it's low 8 bits
195 * (including parity). On current CPUs they must be 0'd,
196 * and finally or in RW bit
201 /* do the actual scom read */
210 /* XXX: fixup result on some buggy 970's (ouch ! we lost a bit, bah
211 * that's the best we can do). Not implemented yet as we don't use
212 * the scom on any of the bogus CPUs yet, but may have to be done
216 /* restore interrupts */
221 _GLOBAL(scom970_write)
228 /* rotate 24 bits SCOM address 8 bits left and mask out it's low 8 bits
229 * (including parity). On current CPUs they must be 0'd.
235 mtspr SPRN_SCOMD,r4 /* write data */
237 mtspr SPRN_SCOMC,r3 /* write command */
242 /* restore interrupts */
245 #endif /* CONFIG_CPU_FREQ_PMAC64 || CONFIG_CPU_FREQ_MAPLE */
247 /* kexec_wait(phys_cpu)
249 * wait for the flag to change, indicating this kernel is going away but
250 * the slave code for the next one is at addresses 0 to 100.
252 * This is used by all slaves, even those that did not find a matching
253 * paca in the secondary startup code.
255 * Physical (hardware) cpu id should be in r3.
260 addi r5,r5,kexec_flag-1b
263 #ifdef CONFIG_KEXEC_CORE /* use no memory without kexec */
267 #ifdef CONFIG_PPC_BOOK3S_64
270 clrrdi r11,r11,1 /* Clear MSR_LE */
275 /* Create TLB entry in book3e_secondary_core_init */
281 /* this can be in text because we won't change it until we are
282 * running in real anyways
288 #ifdef CONFIG_KEXEC_CORE
289 #ifdef CONFIG_PPC_BOOK3E
291 * BOOK3E has no real MMU mode, so we have to setup the initial TLB
292 * for a core to identity map v:0 to p:0. This current implementation
293 * assumes that 1G is enough for kexec.
297 * Invalidate all non-IPROT TLB entries to avoid any TLB conflict.
298 * IPROT TLB entries should be >= PAGE_OFFSET and thus not conflict.
304 mfspr r10,SPRN_TLB1CFG
305 andi. r10,r10,TLBnCFG_N_ENTRY /* Extract # entries */
306 subi r10,r10,1 /* Last entry: no conflict with kernel text */
307 lis r9,MAS0_TLBSEL(1)@h
308 rlwimi r9,r10,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r9) */
310 /* Set up a temp identity mapping v:0 to p:0 and return to it. */
313 lis r9,(MAS1_VALID|MAS1_IPROT)@h
314 ori r9,r9,(MAS1_TSIZE(BOOK3E_PAGESZ_1GB))@l
317 LOAD_REG_IMMEDIATE(r9, 0x0 | MAS2_M_IF_NEEDED)
320 LOAD_REG_IMMEDIATE(r9, 0x0 | MAS3_SR | MAS3_SW | MAS3_SX)
330 /* kexec_smp_wait(void)
332 * call with interrupts off
333 * note: this is a terminal routine, it does not save lr
335 * get phys id from paca
336 * switch to real mode
337 * mark the paca as no longer used
338 * join other cpus in kexec_wait(phys_id)
340 _GLOBAL(kexec_smp_wait)
341 lhz r3,PACAHWCPUID(r13)
344 li r4,KEXEC_STATE_REAL_MODE
345 stb r4,PACAKEXECSTATE(r13)
350 * switch to real mode (turn mmu off)
351 * we use the early kernel trick that the hardware ignores bits
352 * 0 and 1 (big endian) of the effective address in real mode
354 * don't overwrite r3 here, it is live for kexec_wait above.
356 real_mode: /* assume normal blr return */
357 #ifdef CONFIG_PPC_BOOK3E
358 /* Create an identity mapping. */
363 mflr r11 /* return address to SRR0 */
375 * kexec_sequence(newstack, start, image, control, clear_all(),
378 * does the grungy work with stack switching and real mode switches
379 * also does simple calls to other code
382 _GLOBAL(kexec_sequence)
386 /* switch stacks to newstack -- &kexec_stack.stack */
387 stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
393 /* save regs for local vars on new stack.
394 * yes, we won't go back, but ...
404 stdu r1,-STACK_FRAME_OVERHEAD-64(r1)
406 /* save args into preserved regs */
407 mr r31,r3 /* newstack (both) */
408 mr r30,r4 /* start (real) */
409 mr r29,r5 /* image (virt) */
410 mr r28,r6 /* control, unused */
411 mr r27,r7 /* clear_all() fn desc */
412 mr r26,r8 /* copy_with_mmu_off */
413 lhz r25,PACAHWCPUID(r13) /* get our phys cpu from paca */
415 /* disable interrupts, we are overwriting kernel data next */
416 #ifdef CONFIG_PPC_BOOK3E
424 /* We need to turn the MMU off unless we are in hash mode
431 /* copy dest pages, flush whole dest image */
433 bl kexec_copy_flush /* (image) */
435 /* turn off mmu now if not done earlier */
440 /* copy 0x100 bytes starting at start to 0 */
442 mr r4,r30 /* start, aka phys mem offset */
445 bl copy_and_flush /* (dest, src, copy limit, start offset) */
446 1: /* assume normal blr return */
448 /* release other cpus to the new kernel secondary start at 0x60 */
451 stw r6,kexec_flag-1b(5)
456 /* clear out hardware hash page table and tlb */
457 #ifdef PPC64_ELF_ABI_v1
458 ld r12,0(r27) /* deref function descriptor */
463 bctrl /* mmu_hash_ops.hpte_clear_all(void); */
466 * kexec image calling is:
467 * the first 0x100 bytes of the entry point are copied to 0
469 * all slaves branch to slave = 0x60 (absolute)
470 * slave(phys_cpu_id);
472 * master goes to start = entry point
473 * start(phys_cpu_id, start, 0);
476 * a wrapper is needed to call existing kernels, here is an approximate
477 * description of one method:
480 * start will be near the boot_block (maybe 0x100 bytes before it?)
481 * it will have a 0x60, which will b to boot_block, where it will wait
482 * and 0 will store phys into struct boot-block and load r3 from there,
483 * copy kernel 0-0x100 and tell slaves to back down to 0x60 again
486 * boot block will have all cpus scanning device tree to see if they
487 * are the boot cpu ?????
488 * other device tree differences (prop sizes, va vs pa, etc)...
490 1: mr r3,r25 # my phys cpu
491 mr r4,r30 # start, aka phys mem offset
494 blr /* image->start(physid, image->start, 0); */
495 #endif /* CONFIG_KEXEC_CORE */