1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include <linux/context_tracking.h>
5 #include <linux/compat.h>
7 #include <asm/asm-prototypes.h>
9 #include <asm/cputime.h>
10 #include <asm/interrupt.h>
11 #include <asm/hw_irq.h>
12 #include <asm/interrupt.h>
13 #include <asm/kprobes.h>
15 #include <asm/ptrace.h>
17 #include <asm/signal.h>
18 #include <asm/switch_to.h>
19 #include <asm/syscall.h>
21 #include <asm/unistd.h>
23 #if defined(CONFIG_PPC_ADV_DEBUG_REGS) && defined(CONFIG_PPC32)
24 unsigned long global_dbcr0[NR_CPUS];
27 typedef long (*syscall_fn)(long, long, long, long, long, long);
29 /* Has to run notrace because it is entered not completely "reconciled" */
30 notrace long system_call_exception(long r3, long r4, long r5,
31 long r6, long r7, long r8,
32 unsigned long r0, struct pt_regs *regs)
38 kuap_save_and_lock(regs);
43 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
44 BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED);
46 trace_hardirqs_off(); /* finish reconciling */
48 CT_WARN_ON(ct_state() == CONTEXT_KERNEL);
51 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
52 BUG_ON(!(regs->msr & MSR_RI));
53 BUG_ON(!(regs->msr & MSR_PR));
54 BUG_ON(arch_irq_disabled_regs(regs));
56 #ifdef CONFIG_PPC_PKEY
57 if (mmu_has_feature(MMU_FTR_PKEY)) {
58 unsigned long amr, iamr;
59 bool flush_needed = false;
61 * When entering from userspace we mostly have the AMR/IAMR
62 * different from kernel default values. Hence don't compare.
64 amr = mfspr(SPRN_AMR);
65 iamr = mfspr(SPRN_IAMR);
68 if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) {
69 mtspr(SPRN_AMR, AMR_KUAP_BLOCKED);
72 if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) {
73 mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED);
82 booke_restore_dbcr0();
84 account_cpu_user_entry();
86 account_stolen_time();
89 * This is not required for the syscall exit path, but makes the
90 * stack frame look nicer. If this was initialised in the first stack
91 * frame, or if the unwinder was taught the first stack frame always
92 * returns to user with IRQS_ENABLED, this store could be avoided!
94 irq_soft_mask_regs_set_state(regs, IRQS_ENABLED);
98 if (unlikely(current_thread_info()->flags & _TIF_SYSCALL_DOTRACE)) {
99 if (unlikely(trap_is_unsupported_scv(regs))) {
100 /* Unsupported scv vector */
101 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
105 * We use the return value of do_syscall_trace_enter() as the
106 * syscall number. If the syscall was rejected for any reason
107 * do_syscall_trace_enter() returns an invalid syscall number
108 * and the test against NR_syscalls will fail and the return
109 * value to be used is in regs->gpr[3].
111 r0 = do_syscall_trace_enter(regs);
112 if (unlikely(r0 >= NR_syscalls))
121 } else if (unlikely(r0 >= NR_syscalls)) {
122 if (unlikely(trap_is_unsupported_scv(regs))) {
123 /* Unsupported scv vector */
124 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
130 /* May be faster to do array_index_nospec? */
133 if (unlikely(is_compat_task())) {
134 f = (void *)compat_sys_call_table[r0];
136 r3 &= 0x00000000ffffffffULL;
137 r4 &= 0x00000000ffffffffULL;
138 r5 &= 0x00000000ffffffffULL;
139 r6 &= 0x00000000ffffffffULL;
140 r7 &= 0x00000000ffffffffULL;
141 r8 &= 0x00000000ffffffffULL;
144 f = (void *)sys_call_table[r0];
147 return f(r3, r4, r5, r6, r7, r8);
151 * local irqs must be disabled. Returns false if the caller must re-enable
152 * them, check for new work, and try again.
154 * This should be called with local irqs disabled, but if they were previously
155 * enabled when the interrupt handler returns (indicating a process-context /
156 * synchronous interrupt) then irqs_enabled should be true.
158 static notrace __always_inline bool __prep_irq_for_enabled_exit(bool clear_ri)
160 /* This must be done with RI=1 because tracing may touch vmaps */
163 /* This pattern matches prep_irq_for_idle */
165 __hard_EE_RI_disable();
167 __hard_irq_disable();
169 if (unlikely(lazy_irq_pending_nocheck())) {
170 /* Took an interrupt, may have more exit work to do. */
173 trace_hardirqs_off();
174 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
178 local_paca->irq_happened = 0;
179 irq_soft_mask_set(IRQS_ENABLED);
184 static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri, bool irqs_enabled)
186 if (__prep_irq_for_enabled_exit(clear_ri))
190 * Must replay pending soft-masked interrupts now. Don't just
191 * local_irq_enabe(); local_irq_disable(); because if we are
192 * returning from an asynchronous interrupt here, another one
193 * might hit after irqs are enabled, and it would exit via this
194 * same path allowing another to fire, and so on unbounded.
196 * If interrupts were enabled when this interrupt exited,
197 * indicating a process context (synchronous) interrupt,
198 * local_irq_enable/disable can be used, which will enable
199 * interrupts rather than keeping them masked (unclear how
200 * much benefit this is over just replaying for all cases,
201 * because we immediately disable again, so all we're really
202 * doing is allowing hard interrupts to execute directly for
203 * a very small time, rather than being masked and replayed).
209 replay_soft_interrupts();
215 static notrace void booke_load_dbcr0(void)
217 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
218 unsigned long dbcr0 = current->thread.debug.dbcr0;
220 if (likely(!(dbcr0 & DBCR0_IDM)))
224 * Check to see if the dbcr0 register is set up to debug.
225 * Use the internal debug mode bit to do this.
227 mtmsr(mfmsr() & ~MSR_DE);
228 if (IS_ENABLED(CONFIG_PPC32)) {
230 global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0);
232 mtspr(SPRN_DBCR0, dbcr0);
233 mtspr(SPRN_DBSR, -1);
238 * This should be called after a syscall returns, with r3 the return value
239 * from the syscall. If this function returns non-zero, the system call
240 * exit assembly should additionally load all GPR registers and CTR and XER
241 * from the interrupt frame.
243 * The function graph tracer can not trace the return side of this function,
244 * because RI=0 and soft mask state is "unreconciled", so it is marked notrace.
246 notrace unsigned long syscall_exit_prepare(unsigned long r3,
247 struct pt_regs *regs,
250 unsigned long ti_flags;
251 unsigned long ret = 0;
252 bool is_not_scv = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) || !scv;
254 CT_WARN_ON(ct_state() == CONTEXT_USER);
256 kuap_assert_locked();
260 /* Check whether the syscall is issued inside a restartable sequence */
263 ti_flags = current_thread_info()->flags;
265 if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && is_not_scv) {
266 if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) {
268 regs->ccr |= 0x10000000; /* Set SO bit in CR */
272 if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) {
273 if (ti_flags & _TIF_RESTOREALL)
274 ret = _TIF_RESTOREALL;
277 clear_bits(_TIF_PERSYSCALL_MASK, ¤t_thread_info()->flags);
282 if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) {
283 do_syscall_trace_leave(regs);
284 ret |= _TIF_RESTOREALL;
290 ti_flags = READ_ONCE(current_thread_info()->flags);
291 while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
293 if (ti_flags & _TIF_NEED_RESCHED) {
297 * SIGPENDING must restore signal handler function
298 * argument GPRs, and some non-volatiles (e.g., r1).
299 * Restore all for now. This could be made lighter.
301 if (ti_flags & _TIF_SIGPENDING)
302 ret |= _TIF_RESTOREALL;
303 do_notify_resume(regs, ti_flags);
306 ti_flags = READ_ONCE(current_thread_info()->flags);
309 if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) {
310 if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
311 unlikely((ti_flags & _TIF_RESTORE_TM))) {
312 restore_tm_state(regs);
314 unsigned long mathflags = MSR_FP;
316 if (cpu_has_feature(CPU_FTR_VSX))
317 mathflags |= MSR_VEC | MSR_VSX;
318 else if (cpu_has_feature(CPU_FTR_ALTIVEC))
319 mathflags |= MSR_VEC;
322 * If userspace MSR has all available FP bits set,
323 * then they are live and no need to restore. If not,
324 * it means the regs were given up and restore_math
325 * may decide to restore them (to avoid taking an FP
328 if ((regs->msr & mathflags) != mathflags)
335 /* scv need not set RI=0 because SRRs are not used */
336 if (unlikely(!__prep_irq_for_enabled_exit(is_not_scv))) {
343 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
344 local_paca->tm_scratch = regs->msr;
349 account_cpu_user_exit();
351 /* Restore user access locks last */
352 kuap_user_restore(regs);
358 notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned long msr)
360 unsigned long ti_flags;
362 unsigned long ret = 0;
364 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
365 BUG_ON(!(regs->msr & MSR_RI));
366 BUG_ON(!(regs->msr & MSR_PR));
367 BUG_ON(arch_irq_disabled_regs(regs));
368 CT_WARN_ON(ct_state() == CONTEXT_USER);
371 * We don't need to restore AMR on the way back to userspace for KUAP.
372 * AMR can only have been unlocked if we interrupted the kernel.
374 kuap_assert_locked();
376 local_irq_save(flags);
379 ti_flags = READ_ONCE(current_thread_info()->flags);
380 while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
381 local_irq_enable(); /* returning to user: may enable */
382 if (ti_flags & _TIF_NEED_RESCHED) {
385 if (ti_flags & _TIF_SIGPENDING)
386 ret |= _TIF_RESTOREALL;
387 do_notify_resume(regs, ti_flags);
390 ti_flags = READ_ONCE(current_thread_info()->flags);
393 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && IS_ENABLED(CONFIG_PPC_FPU)) {
394 if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
395 unlikely((ti_flags & _TIF_RESTORE_TM))) {
396 restore_tm_state(regs);
398 unsigned long mathflags = MSR_FP;
400 if (cpu_has_feature(CPU_FTR_VSX))
401 mathflags |= MSR_VEC | MSR_VSX;
402 else if (cpu_has_feature(CPU_FTR_ALTIVEC))
403 mathflags |= MSR_VEC;
405 /* See above restore_math comment */
406 if ((regs->msr & mathflags) != mathflags)
413 if (unlikely(!__prep_irq_for_enabled_exit(true))) {
422 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
423 local_paca->tm_scratch = regs->msr;
426 account_cpu_user_exit();
428 /* Restore user access locks last */
429 kuap_user_restore(regs);
434 void preempt_schedule_irq(void);
436 notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsigned long msr)
439 unsigned long ret = 0;
442 if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x) &&
443 unlikely(!(regs->msr & MSR_RI)))
444 unrecoverable_exception(regs);
445 BUG_ON(regs->msr & MSR_PR);
447 * CT_WARN_ON comes here via program_check_exception,
448 * so avoid recursion.
450 if (TRAP(regs) != INTERRUPT_PROGRAM)
451 CT_WARN_ON(ct_state() == CONTEXT_USER);
453 kuap = kuap_get_and_assert_locked();
455 if (unlikely(current_thread_info()->flags & _TIF_EMULATE_STACK_STORE)) {
456 clear_bits(_TIF_EMULATE_STACK_STORE, ¤t_thread_info()->flags);
460 local_irq_save(flags);
462 if (!arch_irq_disabled_regs(regs)) {
463 /* Returning to a kernel context with local irqs enabled. */
464 WARN_ON_ONCE(!(regs->msr & MSR_EE));
466 if (IS_ENABLED(CONFIG_PREEMPT)) {
467 /* Return to preemptible kernel context */
468 if (unlikely(current_thread_info()->flags & _TIF_NEED_RESCHED)) {
469 if (preempt_count() == 0)
470 preempt_schedule_irq();
474 if (unlikely(!prep_irq_for_enabled_exit(true, !irqs_disabled_flags(flags))))
477 /* Returning to a kernel context with local irqs disabled. */
478 __hard_EE_RI_disable();
480 if (regs->msr & MSR_EE)
481 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
486 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
487 local_paca->tm_scratch = regs->msr;
491 * 64s does not want to mfspr(SPRN_AMR) here, because this comes after
492 * mtmsr, which would cause Read-After-Write stalls. Hence, take the
493 * AMR value from the check above.
495 kuap_kernel_restore(regs, kuap);