1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
4 * using the CPU's debug registers. Derived from
5 * "arch/x86/kernel/hw_breakpoint.c"
7 * Copyright 2010 IBM Corporation
8 * Author: K.Prasad <prasad@linux.vnet.ibm.com>
11 #include <linux/hw_breakpoint.h>
12 #include <linux/notifier.h>
13 #include <linux/kprobes.h>
14 #include <linux/percpu.h>
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/smp.h>
18 #include <linux/debugfs.h>
19 #include <linux/init.h>
21 #include <asm/hw_breakpoint.h>
22 #include <asm/processor.h>
23 #include <asm/sstep.h>
24 #include <asm/debug.h>
25 #include <asm/debugfs.h>
26 #include <asm/hvcall.h>
28 #include <linux/uaccess.h>
31 * Stores the breakpoints currently in use on each breakpoint address
32 * register for every cpu
34 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg);
37 * Returns total number of data or instruction breakpoints available.
39 int hw_breakpoint_slots(int type)
41 if (type == TYPE_DATA)
43 return 0; /* no instruction breakpoints available */
47 * Install a perf counter breakpoint.
49 * We seek a free debug address register and use it for this
52 * Atomic: we hold the counter->ctx->lock and we only handle variables
53 * and registers local to this cpu.
55 int arch_install_hw_breakpoint(struct perf_event *bp)
57 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
58 struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
63 * Do not install DABR values if the instruction must be single-stepped.
64 * If so, DABR will be populated in single_step_dabr_instruction().
66 if (current->thread.last_hit_ubp != bp)
67 __set_breakpoint(0, info);
73 * Uninstall the breakpoint contained in the given counter.
75 * First we search the debug address register it uses and then we disable
78 * Atomic: we hold the counter->ctx->lock and we only handle variables
79 * and registers local to this cpu.
81 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
83 struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
86 WARN_ONCE(1, "Can't find the breakpoint");
91 hw_breakpoint_disable();
95 * Perform cleanup of arch-specific counters during unregistration
98 void arch_unregister_hw_breakpoint(struct perf_event *bp)
101 * If the breakpoint is unregistered between a hw_breakpoint_handler()
102 * and the single_step_dabr_instruction(), then cleanup the breakpoint
103 * restoration variables to prevent dangling pointers.
104 * FIXME, this should not be using bp->ctx at all! Sayeth peterz.
106 if (bp->ctx && bp->ctx->task && bp->ctx->task != ((void *)-1L))
107 bp->ctx->task->thread.last_hit_ubp = NULL;
111 * Check for virtual address in kernel space.
113 int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw)
115 return is_kernel_addr(hw->address);
118 int arch_bp_generic_fields(int type, int *gen_bp_type)
121 if (type & HW_BRK_TYPE_READ)
122 *gen_bp_type |= HW_BREAKPOINT_R;
123 if (type & HW_BRK_TYPE_WRITE)
124 *gen_bp_type |= HW_BREAKPOINT_W;
125 if (*gen_bp_type == 0)
131 * Watchpoint match range is always doubleword(8 bytes) aligned on
132 * powerpc. If the given range is crossing doubleword boundary, we
133 * need to increase the length such that next doubleword also get
136 * address len = 6 bytes
138 * |------------v--|------v--------|
139 * | | | | | | | | | | | | | | | | |
140 * |---------------|---------------|
143 * In this case, we should configure hw as:
144 * start_addr = address & ~HW_BREAKPOINT_ALIGN
147 * @start_addr and @end_addr are inclusive.
149 static int hw_breakpoint_validate_len(struct arch_hw_breakpoint *hw)
151 u16 max_len = DABR_MAX_LEN;
153 unsigned long start_addr, end_addr;
155 start_addr = hw->address & ~HW_BREAKPOINT_ALIGN;
156 end_addr = (hw->address + hw->len - 1) | HW_BREAKPOINT_ALIGN;
157 hw_len = end_addr - start_addr + 1;
159 if (dawr_enabled()) {
160 max_len = DAWR_MAX_LEN;
161 /* DAWR region can't cross 512 bytes boundary */
162 if ((start_addr >> 9) != (end_addr >> 9))
164 } else if (IS_ENABLED(CONFIG_PPC_8xx)) {
165 /* 8xx can setup a range without limitation */
169 if (hw_len > max_len)
177 * Validate the arch-specific HW Breakpoint register settings
179 int hw_breakpoint_arch_parse(struct perf_event *bp,
180 const struct perf_event_attr *attr,
181 struct arch_hw_breakpoint *hw)
185 if (!bp || !attr->bp_len)
188 hw->type = HW_BRK_TYPE_TRANSLATE;
189 if (attr->bp_type & HW_BREAKPOINT_R)
190 hw->type |= HW_BRK_TYPE_READ;
191 if (attr->bp_type & HW_BREAKPOINT_W)
192 hw->type |= HW_BRK_TYPE_WRITE;
193 if (hw->type == HW_BRK_TYPE_TRANSLATE)
194 /* must set alteast read or write */
196 if (!attr->exclude_user)
197 hw->type |= HW_BRK_TYPE_USER;
198 if (!attr->exclude_kernel)
199 hw->type |= HW_BRK_TYPE_KERNEL;
200 if (!attr->exclude_hv)
201 hw->type |= HW_BRK_TYPE_HYP;
202 hw->address = attr->bp_addr;
203 hw->len = attr->bp_len;
205 if (!ppc_breakpoint_available())
208 return hw_breakpoint_validate_len(hw);
212 * Restores the breakpoint on the debug registers.
213 * Invoke this function if it is known that the execution context is
214 * about to change to cause loss of MSR_SE settings.
216 void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
218 struct arch_hw_breakpoint *info;
220 if (likely(!tsk->thread.last_hit_ubp))
223 info = counter_arch_bp(tsk->thread.last_hit_ubp);
224 regs->msr &= ~MSR_SE;
225 __set_breakpoint(0, info);
226 tsk->thread.last_hit_ubp = NULL;
229 static bool dar_within_range(unsigned long dar, struct arch_hw_breakpoint *info)
231 return ((info->address <= dar) && (dar - info->address < info->len));
235 dar_range_overlaps(unsigned long dar, int size, struct arch_hw_breakpoint *info)
237 return ((dar <= info->address + info->len - 1) &&
238 (dar + size - 1 >= info->address));
242 * Handle debug exception notifications.
244 static bool stepping_handler(struct pt_regs *regs, struct perf_event *bp,
245 struct arch_hw_breakpoint *info)
247 struct ppc_inst instr = ppc_inst(0);
249 struct instruction_op op;
250 unsigned long addr = info->address;
252 if (__get_user_instr_inatomic(instr, (void __user *)regs->nip))
255 ret = analyse_instr(&op, regs, instr);
256 type = GETTYPE(op.type);
257 size = GETSIZE(op.type);
259 if (!ret && (type == LARX || type == STCX)) {
260 printk_ratelimited("Breakpoint hit on instruction that can't be emulated."
261 " Breakpoint at 0x%lx will be disabled.\n", addr);
266 * If it's extraneous event, we still need to emulate/single-
267 * step the instruction, but we don't generate an event.
269 if (size && !dar_range_overlaps(regs->dar, size, info))
270 info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
272 /* Do not emulate user-space instructions, instead single-step them */
273 if (user_mode(regs)) {
274 current->thread.last_hit_ubp = bp;
279 if (!emulate_step(regs, instr))
286 * We've failed in reliably handling the hw-breakpoint. Unregister
287 * it and throw a warning message to let the user know about it.
289 WARN(1, "Unable to handle hardware breakpoint. Breakpoint at "
290 "0x%lx will be disabled.", addr);
293 perf_event_disable_inatomic(bp);
297 int hw_breakpoint_handler(struct die_args *args)
299 int rc = NOTIFY_STOP;
300 struct perf_event *bp;
301 struct pt_regs *regs = args->regs;
302 struct arch_hw_breakpoint *info;
304 /* Disable breakpoints during exception handling */
305 hw_breakpoint_disable();
308 * The counter may be concurrently released but that can only
309 * occur from a call_rcu() path. We can then safely fetch
310 * the breakpoint, use its callback, touch its counter
311 * while we are in an rcu_read_lock() path.
315 bp = __this_cpu_read(bp_per_reg);
320 info = counter_arch_bp(bp);
323 * Return early after invoking user-callback function without restoring
324 * DABR if the breakpoint is from ptrace which always operates in
325 * one-shot mode. The ptrace-ed process will receive the SIGTRAP signal
326 * generated in do_dabr().
328 if (bp->overflow_handler == ptrace_triggered) {
329 perf_bp_event(bp, regs);
334 info->type &= ~HW_BRK_TYPE_EXTRANEOUS_IRQ;
335 if (IS_ENABLED(CONFIG_PPC_8xx)) {
336 if (!dar_within_range(regs->dar, info))
337 info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
339 if (!stepping_handler(regs, bp, info))
344 * As a policy, the callback is invoked in a 'trigger-after-execute'
347 if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
348 perf_bp_event(bp, regs);
350 __set_breakpoint(0, info);
355 NOKPROBE_SYMBOL(hw_breakpoint_handler);
358 * Handle single-step exceptions following a DABR hit.
360 static int single_step_dabr_instruction(struct die_args *args)
362 struct pt_regs *regs = args->regs;
363 struct perf_event *bp = NULL;
364 struct arch_hw_breakpoint *info;
366 bp = current->thread.last_hit_ubp;
368 * Check if we are single-stepping as a result of a
369 * previous HW Breakpoint exception
374 info = counter_arch_bp(bp);
377 * We shall invoke the user-defined callback function in the single
378 * stepping handler to confirm to 'trigger-after-execute' semantics
380 if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
381 perf_bp_event(bp, regs);
383 __set_breakpoint(0, info);
384 current->thread.last_hit_ubp = NULL;
387 * If the process was being single-stepped by ptrace, let the
388 * other single-step actions occur (e.g. generate SIGTRAP).
390 if (test_thread_flag(TIF_SINGLESTEP))
395 NOKPROBE_SYMBOL(single_step_dabr_instruction);
398 * Handle debug exception notifications.
400 int hw_breakpoint_exceptions_notify(
401 struct notifier_block *unused, unsigned long val, void *data)
403 int ret = NOTIFY_DONE;
407 ret = hw_breakpoint_handler(data);
410 ret = single_step_dabr_instruction(data);
416 NOKPROBE_SYMBOL(hw_breakpoint_exceptions_notify);
419 * Release the user breakpoints used by ptrace
421 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
424 struct thread_struct *t = &tsk->thread;
426 for (i = 0; i < nr_wp_slots(); i++) {
427 unregister_hw_breakpoint(t->ptrace_bps[i]);
428 t->ptrace_bps[i] = NULL;
432 void hw_breakpoint_pmu_read(struct perf_event *bp)
437 void ptrace_triggered(struct perf_event *bp,
438 struct perf_sample_data *data, struct pt_regs *regs)
440 struct perf_event_attr attr;
443 * Disable the breakpoint request here since ptrace has defined a
444 * one-shot behaviour for breakpoint exceptions in PPC64.
445 * The SIGTRAP signal is generated automatically for us in do_dabr().
446 * We don't have to do anything about that here
449 attr.disabled = true;
450 modify_user_hw_breakpoint(bp, &attr);