arch/powerpc/kernel/dt_cpu_ftrs.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright 2017, Nicholas Piggin, IBM Corporation
   4  */
   5
   6 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
   7
   8 #include <linux/export.h>
   9 #include <linux/init.h>
  10 #include <linux/jump_label.h>
  11 #include <linux/libfdt.h>
  12 #include <linux/memblock.h>
  13 #include <linux/printk.h>
  14 #include <linux/sched.h>
  15 #include <linux/string.h>
  16 #include <linux/threads.h>
  17
  18 #include <asm/cputable.h>
  19 #include <asm/dt_cpu_ftrs.h>
  20 #include <asm/mce.h>
  21 #include <asm/mmu.h>
  22 #include <asm/oprofile_impl.h>
  23 #include <asm/prom.h>
  24 #include <asm/setup.h>
  25
  26
  27 /* Device-tree visible constants follow */
  28 #define ISA_V3_0B       3000
  29 #define ISA_V3_1        3100
  30
  31 #define USABLE_PR               (1U << 0)
  32 #define USABLE_OS               (1U << 1)
  33 #define USABLE_HV               (1U << 2)
  34
  35 #define HV_SUPPORT_HFSCR        (1U << 0)
  36 #define OS_SUPPORT_FSCR         (1U << 0)
  37
  38 /* For parsing, we define all bits set as "NONE" case */
  39 #define HV_SUPPORT_NONE         0xffffffffU
  40 #define OS_SUPPORT_NONE         0xffffffffU
  41
  42 struct dt_cpu_feature {
  43         const char *name;
  44         uint32_t isa;
  45         uint32_t usable_privilege;
  46         uint32_t hv_support;
  47         uint32_t os_support;
  48         uint32_t hfscr_bit_nr;
  49         uint32_t fscr_bit_nr;
  50         uint32_t hwcap_bit_nr;
  51         /* fdt parsing */
  52         unsigned long node;
  53         int enabled;
  54         int disabled;
  55 };
  56
  57 #define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
  58
  59 #define COMMON_USER_BASE        (PPC_FEATURE_32 | PPC_FEATURE_64 | \
  60                                  PPC_FEATURE_ARCH_2_06 |\
  61                                  PPC_FEATURE_ICACHE_SNOOP)
  62 #define COMMON_USER2_BASE       (PPC_FEATURE2_ARCH_2_07 | \
  63                                  PPC_FEATURE2_ISEL)
  64 /*
  65  * Set up the base CPU
  66  */
  67
  68 static int hv_mode;
  69
  70 static struct {
  71         u64     lpcr;
  72         u64     lpcr_clear;
  73         u64     hfscr;
  74         u64     fscr;
  75         u64     pcr;
  76 } system_registers;
  77
  78 static void (*init_pmu_registers)(void);
  79
  80 static void __restore_cpu_cpufeatures(void)
  81 {
  82         u64 lpcr;
  83
  84         /*
  85          * LPCR is restored by the power on engine already. It can be changed
  86          * after early init e.g., by radix enable, and we have no unified API
  87          * for saving and restoring such SPRs.
  88          *
  89          * This ->restore hook should really be removed from idle and register
  90          * restore moved directly into the idle restore code, because this code
  91          * doesn't know how idle is implemented or what it needs restored here.
  92          *
  93          * The best we can do to accommodate secondary boot and idle restore
  94          * for now is "or" LPCR with existing.
  95          */
  96         lpcr = mfspr(SPRN_LPCR);
  97         lpcr |= system_registers.lpcr;
  98         lpcr &= ~system_registers.lpcr_clear;
  99         mtspr(SPRN_LPCR, lpcr);
 100         if (hv_mode) {
 101                 mtspr(SPRN_LPID, 0);
 102                 mtspr(SPRN_HFSCR, system_registers.hfscr);
 103                 mtspr(SPRN_PCR, system_registers.pcr);
 104         }
 105         mtspr(SPRN_FSCR, system_registers.fscr);
 106
 107         if (init_pmu_registers)
 108                 init_pmu_registers();
 109 }
 110
 111 static char dt_cpu_name[64];
 112
 113 static struct cpu_spec __initdata base_cpu_spec = {
 114         .cpu_name               = NULL,
 115         .cpu_features           = CPU_FTRS_DT_CPU_BASE,
 116         .cpu_user_features      = COMMON_USER_BASE,
 117         .cpu_user_features2     = COMMON_USER2_BASE,
 118         .mmu_features           = 0,
 119         .icache_bsize           = 32, /* minimum block size, fixed by */
 120         .dcache_bsize           = 32, /* cache info init.             */
 121         .num_pmcs               = 0,
 122         .pmc_type               = PPC_PMC_DEFAULT,
 123         .oprofile_cpu_type      = NULL,
 124         .oprofile_type          = PPC_OPROFILE_INVALID,
 125         .cpu_setup              = NULL,
 126         .cpu_restore            = __restore_cpu_cpufeatures,
 127         .machine_check_early    = NULL,
 128         .platform               = NULL,
 129 };
 130
 131 static void __init cpufeatures_setup_cpu(void)
 132 {
 133         set_cur_cpu_spec(&base_cpu_spec);
 134
 135         cur_cpu_spec->pvr_mask = -1;
 136         cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
 137
 138         /* Initialize the base environment -- clear FSCR/HFSCR.  */
 139         hv_mode = !!(mfmsr() & MSR_HV);
 140         if (hv_mode) {
 141                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 142                 mtspr(SPRN_HFSCR, 0);
 143         }
 144         mtspr(SPRN_FSCR, 0);
 145         mtspr(SPRN_PCR, PCR_MASK);
 146
 147         /*
 148          * LPCR does not get cleared, to match behaviour with secondaries
 149          * in __restore_cpu_cpufeatures. Once the idle code is fixed, this
 150          * could clear LPCR too.
 151          */
 152 }
 153
 154 static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
 155 {
 156         if (f->hv_support == HV_SUPPORT_NONE) {
 157         } else if (f->hv_support & HV_SUPPORT_HFSCR) {
 158                 u64 hfscr = mfspr(SPRN_HFSCR);
 159                 hfscr |= 1UL << f->hfscr_bit_nr;
 160                 mtspr(SPRN_HFSCR, hfscr);
 161         } else {
 162                 /* Does not have a known recipe */
 163                 return 0;
 164         }
 165
 166         if (f->os_support == OS_SUPPORT_NONE) {
 167         } else if (f->os_support & OS_SUPPORT_FSCR) {
 168                 u64 fscr = mfspr(SPRN_FSCR);
 169                 fscr |= 1UL << f->fscr_bit_nr;
 170                 mtspr(SPRN_FSCR, fscr);
 171         } else {
 172                 /* Does not have a known recipe */
 173                 return 0;
 174         }
 175
 176         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 177                 uint32_t word = f->hwcap_bit_nr / 32;
 178                 uint32_t bit = f->hwcap_bit_nr % 32;
 179
 180                 if (word == 0)
 181                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 182                 else if (word == 1)
 183                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 184                 else
 185                         pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
 186         }
 187
 188         return 1;
 189 }
 190
 191 static int __init feat_enable(struct dt_cpu_feature *f)
 192 {
 193         if (f->hv_support != HV_SUPPORT_NONE) {
 194                 if (f->hfscr_bit_nr != -1) {
 195                         u64 hfscr = mfspr(SPRN_HFSCR);
 196                         hfscr |= 1UL << f->hfscr_bit_nr;
 197                         mtspr(SPRN_HFSCR, hfscr);
 198                 }
 199         }
 200
 201         if (f->os_support != OS_SUPPORT_NONE) {
 202                 if (f->fscr_bit_nr != -1) {
 203                         u64 fscr = mfspr(SPRN_FSCR);
 204                         fscr |= 1UL << f->fscr_bit_nr;
 205                         mtspr(SPRN_FSCR, fscr);
 206                 }
 207         }
 208
 209         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 210                 uint32_t word = f->hwcap_bit_nr / 32;
 211                 uint32_t bit = f->hwcap_bit_nr % 32;
 212
 213                 if (word == 0)
 214                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 215                 else if (word == 1)
 216                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 217                 else
 218                         pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
 219         }
 220
 221         return 1;
 222 }
 223
 224 static int __init feat_disable(struct dt_cpu_feature *f)
 225 {
 226         return 0;
 227 }
 228
 229 static int __init feat_enable_hv(struct dt_cpu_feature *f)
 230 {
 231         u64 lpcr;
 232
 233         if (!hv_mode) {
 234                 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
 235                 return 0;
 236         }
 237
 238         mtspr(SPRN_LPID, 0);
 239
 240         lpcr = mfspr(SPRN_LPCR);
 241         lpcr &=  ~LPCR_LPES0; /* HV external interrupts */
 242         mtspr(SPRN_LPCR, lpcr);
 243
 244         cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 245
 246         return 1;
 247 }
 248
 249 static int __init feat_enable_le(struct dt_cpu_feature *f)
 250 {
 251         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
 252         return 1;
 253 }
 254
 255 static int __init feat_enable_smt(struct dt_cpu_feature *f)
 256 {
 257         cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
 258         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
 259         return 1;
 260 }
 261
 262 static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
 263 {
 264         u64 lpcr;
 265
 266         /* Set PECE wakeup modes for ISA 207 */
 267         lpcr = mfspr(SPRN_LPCR);
 268         lpcr |=  LPCR_PECE0;
 269         lpcr |=  LPCR_PECE1;
 270         lpcr |=  LPCR_PECE2;
 271         mtspr(SPRN_LPCR, lpcr);
 272
 273         return 1;
 274 }
 275
 276 static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
 277 {
 278         u64 lpcr;
 279
 280         /* Set PECE wakeup modes for ISAv3.0B */
 281         lpcr = mfspr(SPRN_LPCR);
 282         lpcr |=  LPCR_PECE0;
 283         lpcr |=  LPCR_PECE1;
 284         lpcr |=  LPCR_PECE2;
 285         mtspr(SPRN_LPCR, lpcr);
 286
 287         return 1;
 288 }
 289
 290 static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
 291 {
 292         u64 lpcr;
 293
 294         lpcr = mfspr(SPRN_LPCR);
 295         lpcr &= ~LPCR_ISL;
 296
 297         /* VRMASD */
 298         lpcr |= LPCR_VPM0;
 299         lpcr &= ~LPCR_VPM1;
 300         lpcr |= 0x10UL << LPCR_VRMASD_SH; /* L=1 LP=00 */
 301         mtspr(SPRN_LPCR, lpcr);
 302
 303         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 304         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 305
 306         return 1;
 307 }
 308
 309 static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
 310 {
 311         u64 lpcr;
 312
 313         system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
 314         lpcr = mfspr(SPRN_LPCR);
 315         lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
 316         mtspr(SPRN_LPCR, lpcr);
 317
 318         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 319         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 320
 321         return 1;
 322 }
 323
 324
 325 static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
 326 {
 327 #ifdef CONFIG_PPC_RADIX_MMU
 328         cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
 329         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 330         cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;
 331         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 332
 333         return 1;
 334 #endif
 335         return 0;
 336 }
 337
 338 static int __init feat_enable_dscr(struct dt_cpu_feature *f)
 339 {
 340         u64 lpcr;
 341
 342         /*
 343          * Linux relies on FSCR[DSCR] being clear, so that we can take the
 344          * facility unavailable interrupt and track the task's usage of DSCR.
 345          * See facility_unavailable_exception().
 346          * Clear the bit here so that feat_enable() doesn't set it.
 347          */
 348         f->fscr_bit_nr = -1;
 349
 350         feat_enable(f);
 351
 352         lpcr = mfspr(SPRN_LPCR);
 353         lpcr &= ~LPCR_DPFD;
 354         lpcr |=  (4UL << LPCR_DPFD_SH);
 355         mtspr(SPRN_LPCR, lpcr);
 356
 357         return 1;
 358 }
 359
 360 static void hfscr_pmu_enable(void)
 361 {
 362         u64 hfscr = mfspr(SPRN_HFSCR);
 363         hfscr |= PPC_BIT(60);
 364         mtspr(SPRN_HFSCR, hfscr);
 365 }
 366
 367 static void init_pmu_power8(void)
 368 {
 369         if (hv_mode) {
 370                 mtspr(SPRN_MMCRC, 0);
 371                 mtspr(SPRN_MMCRH, 0);
 372         }
 373
 374         mtspr(SPRN_MMCRA, 0);
 375         mtspr(SPRN_MMCR0, 0);
 376         mtspr(SPRN_MMCR1, 0);
 377         mtspr(SPRN_MMCR2, 0);
 378         mtspr(SPRN_MMCRS, 0);
 379 }
 380
 381 static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
 382 {
 383         cur_cpu_spec->platform = "power8";
 384         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
 385
 386         return 1;
 387 }
 388
 389 static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
 390 {
 391         hfscr_pmu_enable();
 392
 393         init_pmu_power8();
 394         init_pmu_registers = init_pmu_power8;
 395
 396         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 397         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 398         if (pvr_version_is(PVR_POWER8E))
 399                 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
 400
 401         cur_cpu_spec->num_pmcs          = 6;
 402         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 403         cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
 404
 405         return 1;
 406 }
 407
 408 static void init_pmu_power9(void)
 409 {
 410         if (hv_mode)
 411                 mtspr(SPRN_MMCRC, 0);
 412
 413         mtspr(SPRN_MMCRA, 0);
 414         mtspr(SPRN_MMCR0, 0);
 415         mtspr(SPRN_MMCR1, 0);
 416         mtspr(SPRN_MMCR2, 0);
 417 }
 418
 419 static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
 420 {
 421         cur_cpu_spec->platform = "power9";
 422         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
 423
 424         return 1;
 425 }
 426
 427 static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
 428 {
 429         hfscr_pmu_enable();
 430
 431         init_pmu_power9();
 432         init_pmu_registers = init_pmu_power9;
 433
 434         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 435         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 436
 437         cur_cpu_spec->num_pmcs          = 6;
 438         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 439         cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
 440
 441         return 1;
 442 }
 443
 444 static void init_pmu_power10(void)
 445 {
 446         init_pmu_power9();
 447
 448         mtspr(SPRN_MMCR3, 0);
 449         mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
 450         mtspr(SPRN_MMCR0, MMCR0_PMCCEXT);
 451 }
 452
 453 static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
 454 {
 455         hfscr_pmu_enable();
 456
 457         init_pmu_power10();
 458         init_pmu_registers = init_pmu_power10;
 459
 460         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 461         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 462
 463         cur_cpu_spec->num_pmcs          = 6;
 464         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 465         cur_cpu_spec->oprofile_cpu_type = "ppc64/power10";
 466
 467         return 1;
 468 }
 469
 470 static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
 471 {
 472         cur_cpu_spec->platform = "power10";
 473         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
 474
 475         return 1;
 476 }
 477
 478 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 479 {
 480 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 481         feat_enable(f);
 482         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
 483         return 1;
 484 #endif
 485         return 0;
 486 }
 487
 488 static int __init feat_enable_fp(struct dt_cpu_feature *f)
 489 {
 490         feat_enable(f);
 491         cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
 492
 493         return 1;
 494 }
 495
 496 static int __init feat_enable_vector(struct dt_cpu_feature *f)
 497 {
 498 #ifdef CONFIG_ALTIVEC
 499         feat_enable(f);
 500         cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
 501         cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
 502         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
 503
 504         return 1;
 505 #endif
 506         return 0;
 507 }
 508
 509 static int __init feat_enable_vsx(struct dt_cpu_feature *f)
 510 {
 511 #ifdef CONFIG_VSX
 512         feat_enable(f);
 513         cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
 514         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
 515
 516         return 1;
 517 #endif
 518         return 0;
 519 }
 520
 521 static int __init feat_enable_purr(struct dt_cpu_feature *f)
 522 {
 523         cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
 524
 525         return 1;
 526 }
 527
 528 static int __init feat_enable_ebb(struct dt_cpu_feature *f)
 529 {
 530         /*
 531          * PPC_FEATURE2_EBB is enabled in PMU init code because it has
 532          * historically been related to the PMU facility. This may have
 533          * to be decoupled if EBB becomes more generic. For now, follow
 534          * existing convention.
 535          */
 536         f->hwcap_bit_nr = -1;
 537         feat_enable(f);
 538
 539         return 1;
 540 }
 541
 542 static int __init feat_enable_dbell(struct dt_cpu_feature *f)
 543 {
 544         u64 lpcr;
 545
 546         /* P9 has an HFSCR for privileged state */
 547         feat_enable(f);
 548
 549         cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
 550
 551         lpcr = mfspr(SPRN_LPCR);
 552         lpcr |=  LPCR_PECEDH; /* hyp doorbell wakeup */
 553         mtspr(SPRN_LPCR, lpcr);
 554
 555         return 1;
 556 }
 557
 558 static int __init feat_enable_hvi(struct dt_cpu_feature *f)
 559 {
 560         u64 lpcr;
 561
 562         /*
 563          * POWER9 XIVE interrupts including in OPAL XICS compatibility
 564          * are always delivered as hypervisor virtualization interrupts (HVI)
 565          * rather than EE.
 566          *
 567          * However LPES0 is not set here, in the chance that an EE does get
 568          * delivered to the host somehow, the EE handler would not expect it
 569          * to be delivered in LPES0 mode (e.g., using SRR[01]). This could
 570          * happen if there is a bug in interrupt controller code, or IC is
 571          * misconfigured in systemsim.
 572          */
 573
 574         lpcr = mfspr(SPRN_LPCR);
 575         lpcr |= LPCR_HVICE;     /* enable hvi interrupts */
 576         lpcr |= LPCR_HEIC;      /* disable ee interrupts when MSR_HV */
 577         lpcr |= LPCR_PECE_HVEE; /* hvi can wake from stop */
 578         mtspr(SPRN_LPCR, lpcr);
 579
 580         return 1;
 581 }
 582
 583 static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
 584 {
 585         cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
 586
 587         return 1;
 588 }
 589
 590 static int __init feat_enable_mma(struct dt_cpu_feature *f)
 591 {
 592         u64 pcr;
 593
 594         feat_enable(f);
 595         pcr = mfspr(SPRN_PCR);
 596         pcr &= ~PCR_MMA_DIS;
 597         mtspr(SPRN_PCR, pcr);
 598
 599         return 1;
 600 }
 601
 602 struct dt_cpu_feature_match {
 603         const char *name;
 604         int (*enable)(struct dt_cpu_feature *f);
 605         u64 cpu_ftr_bit_mask;
 606 };
 607
 608 static struct dt_cpu_feature_match __initdata
 609                 dt_cpu_feature_match_table[] = {
 610         {"hypervisor", feat_enable_hv, 0},
 611         {"big-endian", feat_enable, 0},
 612         {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
 613         {"smt", feat_enable_smt, 0},
 614         {"interrupt-facilities", feat_enable, 0},
 615         {"system-call-vectored", feat_enable, 0},
 616         {"timer-facilities", feat_enable, 0},
 617         {"timer-facilities-v3", feat_enable, 0},
 618         {"debug-facilities", feat_enable, 0},
 619         {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
 620         {"branch-tracing", feat_enable, 0},
 621         {"floating-point", feat_enable_fp, 0},
 622         {"vector", feat_enable_vector, 0},
 623         {"vector-scalar", feat_enable_vsx, 0},
 624         {"vector-scalar-v3", feat_enable, 0},
 625         {"decimal-floating-point", feat_enable, 0},
 626         {"decimal-integer", feat_enable, 0},
 627         {"quadword-load-store", feat_enable, 0},
 628         {"vector-crypto", feat_enable, 0},
 629         {"mmu-hash", feat_enable_mmu_hash, 0},
 630         {"mmu-radix", feat_enable_mmu_radix, 0},
 631         {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
 632         {"virtual-page-class-key-protection", feat_enable, 0},
 633         {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
 634         {"transactional-memory-v3", feat_enable_tm, 0},
 635         {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
 636         {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
 637         {"idle-nap", feat_enable_idle_nap, 0},
 638         /* alignment-interrupt-dsisr ignored */
 639         {"idle-stop", feat_enable_idle_stop, 0},
 640         {"machine-check-power8", feat_enable_mce_power8, 0},
 641         {"performance-monitor-power8", feat_enable_pmu_power8, 0},
 642         {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
 643         {"event-based-branch", feat_enable_ebb, 0},
 644         {"target-address-register", feat_enable, 0},
 645         {"branch-history-rolling-buffer", feat_enable, 0},
 646         {"control-register", feat_enable, CPU_FTR_CTRL},
 647         {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
 648         {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
 649         {"processor-utilization-of-resources-register", feat_enable_purr, 0},
 650         {"no-execute", feat_enable, 0},
 651         {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
 652         {"cache-inhibited-large-page", feat_enable_large_ci, 0},
 653         {"coprocessor-icswx", feat_enable, 0},
 654         {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
 655         {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
 656         {"wait", feat_enable, 0},
 657         {"atomic-memory-operations", feat_enable, 0},
 658         {"branch-v3", feat_enable, 0},
 659         {"copy-paste", feat_enable, 0},
 660         {"decimal-floating-point-v3", feat_enable, 0},
 661         {"decimal-integer-v3", feat_enable, 0},
 662         {"fixed-point-v3", feat_enable, 0},
 663         {"floating-point-v3", feat_enable, 0},
 664         {"group-start-register", feat_enable, 0},
 665         {"pc-relative-addressing", feat_enable, 0},
 666         {"machine-check-power9", feat_enable_mce_power9, 0},
 667         {"machine-check-power10", feat_enable_mce_power10, 0},
 668         {"performance-monitor-power9", feat_enable_pmu_power9, 0},
 669         {"performance-monitor-power10", feat_enable_pmu_power10, 0},
 670         {"event-based-branch-v3", feat_enable, 0},
 671         {"random-number-generator", feat_enable, 0},
 672         {"system-call-vectored", feat_disable, 0},
 673         {"trace-interrupt-v3", feat_enable, 0},
 674         {"vector-v3", feat_enable, 0},
 675         {"vector-binary128", feat_enable, 0},
 676         {"vector-binary16", feat_enable, 0},
 677         {"wait-v3", feat_enable, 0},
 678         {"prefix-instructions", feat_enable, 0},
 679         {"matrix-multiply-assist", feat_enable_mma, 0},
 680         {"debug-facilities-v31", feat_enable, CPU_FTR_DAWR1},
 681 };
 682
 683 static bool __initdata using_dt_cpu_ftrs;
 684 static bool __initdata enable_unknown = true;
 685
 686 static int __init dt_cpu_ftrs_parse(char *str)
 687 {
 688         if (!str)
 689                 return 0;
 690
 691         if (!strcmp(str, "off"))
 692                 using_dt_cpu_ftrs = false;
 693         else if (!strcmp(str, "known"))
 694                 enable_unknown = false;
 695         else
 696                 return 1;
 697
 698         return 0;
 699 }
 700 early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
 701
 702 static void __init cpufeatures_setup_start(u32 isa)
 703 {
 704         pr_info("setup for ISA %d\n", isa);
 705
 706         if (isa >= ISA_V3_0B) {
 707                 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
 708                 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
 709         }
 710
 711         if (isa >= ISA_V3_1) {
 712                 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_31;
 713                 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_1;
 714         }
 715 }
 716
 717 static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
 718 {
 719         const struct dt_cpu_feature_match *m;
 720         bool known = false;
 721         int i;
 722
 723         for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
 724                 m = &dt_cpu_feature_match_table[i];
 725                 if (!strcmp(f->name, m->name)) {
 726                         known = true;
 727                         if (m->enable(f)) {
 728                                 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
 729                                 break;
 730                         }
 731
 732                         pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
 733                                 f->name);
 734                         return false;
 735                 }
 736         }
 737
 738         if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) {
 739                 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
 740                         f->name);
 741                 return false;
 742         }
 743
 744         if (known)
 745                 pr_debug("enabling: %s\n", f->name);
 746         else
 747                 pr_debug("enabling: %s (unknown)\n", f->name);
 748
 749         return true;
 750 }
 751
 752 /*
 753  * Handle POWER9 broadcast tlbie invalidation issue using
 754  * cpu feature flag.
 755  */
 756 static __init void update_tlbie_feature_flag(unsigned long pvr)
 757 {
 758         if (PVR_VER(pvr) == PVR_POWER9) {
 759                 /*
 760                  * Set the tlbie feature flag for anything below
 761                  * Nimbus DD 2.3 and Cumulus DD 1.3
 762                  */
 763                 if ((pvr & 0xe000) == 0) {
 764                         /* Nimbus */
 765                         if ((pvr & 0xfff) < 0x203)
 766                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 767                 } else if ((pvr & 0xc000) == 0) {
 768                         /* Cumulus */
 769                         if ((pvr & 0xfff) < 0x103)
 770                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 771                 } else {
 772                         WARN_ONCE(1, "Unknown PVR");
 773                         cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 774                 }
 775
 776                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
 777         }
 778 }
 779
 780 static __init void cpufeatures_cpu_quirks(void)
 781 {
 782         unsigned long version = mfspr(SPRN_PVR);
 783
 784         /*
 785          * Not all quirks can be derived from the cpufeatures device tree.
 786          */
 787         if ((version & 0xffffefff) == 0x004e0200) {
 788                 /* DD2.0 has no feature flag */
 789                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
 790         } else if ((version & 0xffffefff) == 0x004e0201) {
 791                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 792                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_RADIX_PREFETCH_BUG;
 793         } else if ((version & 0xffffefff) == 0x004e0202) {
 794                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST;
 795                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_XER_SO_BUG;
 796                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 797         } else if ((version & 0xffff0000) == 0x004e0000) {
 798                 /* DD2.1 and up have DD2_1 */
 799                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 800         }
 801
 802         if ((version & 0xffff0000) == 0x004e0000) {
 803                 cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
 804                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
 805         }
 806
 807         update_tlbie_feature_flag(version);
 808 }
 809
 810 static void __init cpufeatures_setup_finished(void)
 811 {
 812         cpufeatures_cpu_quirks();
 813
 814         if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
 815                 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
 816                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 817         }
 818
 819         /* Make sure powerpc_base_platform is non-NULL */
 820         powerpc_base_platform = cur_cpu_spec->platform;
 821
 822         system_registers.lpcr = mfspr(SPRN_LPCR);
 823         system_registers.hfscr = mfspr(SPRN_HFSCR);
 824         system_registers.fscr = mfspr(SPRN_FSCR);
 825         system_registers.pcr = mfspr(SPRN_PCR);
 826
 827         pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
 828                 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
 829 }
 830
 831 static int __init disabled_on_cmdline(void)
 832 {
 833         unsigned long root, chosen;
 834         const char *p;
 835
 836         root = of_get_flat_dt_root();
 837         chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
 838         if (chosen == -FDT_ERR_NOTFOUND)
 839                 return false;
 840
 841         p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
 842         if (!p)
 843                 return false;
 844
 845         if (strstr(p, "dt_cpu_ftrs=off"))
 846                 return true;
 847
 848         return false;
 849 }
 850
 851 static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
 852                                         int depth, void *data)
 853 {
 854         if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
 855             && of_get_flat_dt_prop(node, "isa", NULL))
 856                 return 1;
 857
 858         return 0;
 859 }
 860
 861 bool __init dt_cpu_ftrs_in_use(void)
 862 {
 863         return using_dt_cpu_ftrs;
 864 }
 865
 866 bool __init dt_cpu_ftrs_init(void *fdt)
 867 {
 868         using_dt_cpu_ftrs = false;
 869
 870         /* Setup and verify the FDT, if it fails we just bail */
 871         if (!early_init_dt_verify(fdt))
 872                 return false;
 873
 874         if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
 875                 return false;
 876
 877         if (disabled_on_cmdline())
 878                 return false;
 879
 880         cpufeatures_setup_cpu();
 881
 882         using_dt_cpu_ftrs = true;
 883         return true;
 884 }
 885
 886 static int nr_dt_cpu_features;
 887 static struct dt_cpu_feature *dt_cpu_features;
 888
 889 static int __init process_cpufeatures_node(unsigned long node,
 890                                           const char *uname, int i)
 891 {
 892         const __be32 *prop;
 893         struct dt_cpu_feature *f;
 894         int len;
 895
 896         f = &dt_cpu_features[i];
 897
 898         f->node = node;
 899
 900         f->name = uname;
 901
 902         prop = of_get_flat_dt_prop(node, "isa", &len);
 903         if (!prop) {
 904                 pr_warn("%s: missing isa property\n", uname);
 905                 return 0;
 906         }
 907         f->isa = be32_to_cpup(prop);
 908
 909         prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
 910         if (!prop) {
 911                 pr_warn("%s: missing usable-privilege property", uname);
 912                 return 0;
 913         }
 914         f->usable_privilege = be32_to_cpup(prop);
 915
 916         prop = of_get_flat_dt_prop(node, "hv-support", &len);
 917         if (prop)
 918                 f->hv_support = be32_to_cpup(prop);
 919         else
 920                 f->hv_support = HV_SUPPORT_NONE;
 921
 922         prop = of_get_flat_dt_prop(node, "os-support", &len);
 923         if (prop)
 924                 f->os_support = be32_to_cpup(prop);
 925         else
 926                 f->os_support = OS_SUPPORT_NONE;
 927
 928         prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
 929         if (prop)
 930                 f->hfscr_bit_nr = be32_to_cpup(prop);
 931         else
 932                 f->hfscr_bit_nr = -1;
 933         prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
 934         if (prop)
 935                 f->fscr_bit_nr = be32_to_cpup(prop);
 936         else
 937                 f->fscr_bit_nr = -1;
 938         prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
 939         if (prop)
 940                 f->hwcap_bit_nr = be32_to_cpup(prop);
 941         else
 942                 f->hwcap_bit_nr = -1;
 943
 944         if (f->usable_privilege & USABLE_HV) {
 945                 if (!(mfmsr() & MSR_HV)) {
 946                         pr_warn("%s: HV feature passed to guest\n", uname);
 947                         return 0;
 948                 }
 949
 950                 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
 951                         pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
 952                         return 0;
 953                 }
 954
 955                 if (f->hv_support == HV_SUPPORT_HFSCR) {
 956                         if (f->hfscr_bit_nr == -1) {
 957                                 pr_warn("%s: missing hfscr_bit_nr\n", uname);
 958                                 return 0;
 959                         }
 960                 }
 961         } else {
 962                 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
 963                         pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
 964                         return 0;
 965                 }
 966         }
 967
 968         if (f->usable_privilege & USABLE_OS) {
 969                 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
 970                         pr_warn("%s: unwanted fscr_bit_nr\n", uname);
 971                         return 0;
 972                 }
 973
 974                 if (f->os_support == OS_SUPPORT_FSCR) {
 975                         if (f->fscr_bit_nr == -1) {
 976                                 pr_warn("%s: missing fscr_bit_nr\n", uname);
 977                                 return 0;
 978                         }
 979                 }
 980         } else {
 981                 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
 982                         pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
 983                         return 0;
 984                 }
 985         }
 986
 987         if (!(f->usable_privilege & USABLE_PR)) {
 988                 if (f->hwcap_bit_nr != -1) {
 989                         pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
 990                         return 0;
 991                 }
 992         }
 993
 994         /* Do all the independent features in the first pass */
 995         if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
 996                 if (cpufeatures_process_feature(f))
 997                         f->enabled = 1;
 998                 else
 999                         f->disabled = 1;
1000         }
1001
1002         return 0;
1003 }
1004
1005 static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
1006 {
1007         const __be32 *prop;
1008         int len;
1009         int nr_deps;
1010         int i;
1011
1012         if (f->enabled || f->disabled)
1013                 return;
1014
1015         prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
1016         if (!prop) {
1017                 pr_warn("%s: missing dependencies property", f->name);
1018                 return;
1019         }
1020
1021         nr_deps = len / sizeof(int);
1022
1023         for (i = 0; i < nr_deps; i++) {
1024                 unsigned long phandle = be32_to_cpu(prop[i]);
1025                 int j;
1026
1027                 for (j = 0; j < nr_dt_cpu_features; j++) {
1028                         struct dt_cpu_feature *d = &dt_cpu_features[j];
1029
1030                         if (of_get_flat_dt_phandle(d->node) == phandle) {
1031                                 cpufeatures_deps_enable(d);
1032                                 if (d->disabled) {
1033                                         f->disabled = 1;
1034                                         return;
1035                                 }
1036                         }
1037                 }
1038         }
1039
1040         if (cpufeatures_process_feature(f))
1041                 f->enabled = 1;
1042         else
1043                 f->disabled = 1;
1044 }
1045
1046 static int __init scan_cpufeatures_subnodes(unsigned long node,
1047                                           const char *uname,
1048                                           void *data)
1049 {
1050         int *count = data;
1051
1052         process_cpufeatures_node(node, uname, *count);
1053
1054         (*count)++;
1055
1056         return 0;
1057 }
1058
1059 static int __init count_cpufeatures_subnodes(unsigned long node,
1060                                           const char *uname,
1061                                           void *data)
1062 {
1063         int *count = data;
1064
1065         (*count)++;
1066
1067         return 0;
1068 }
1069
1070 static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1071                                             *uname, int depth, void *data)
1072 {
1073         const __be32 *prop;
1074         int count, i;
1075         u32 isa;
1076
1077         /* We are scanning "ibm,powerpc-cpu-features" nodes only */
1078         if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1079                 return 0;
1080
1081         prop = of_get_flat_dt_prop(node, "isa", NULL);
1082         if (!prop)
1083                 /* We checked before, "can't happen" */
1084                 return 0;
1085
1086         isa = be32_to_cpup(prop);
1087
1088         /* Count and allocate space for cpu features */
1089         of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1090                                                 &nr_dt_cpu_features);
1091         dt_cpu_features = memblock_alloc(sizeof(struct dt_cpu_feature) * nr_dt_cpu_features, PAGE_SIZE);
1092         if (!dt_cpu_features)
1093                 panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
1094                       __func__,
1095                       sizeof(struct dt_cpu_feature) * nr_dt_cpu_features,
1096                       PAGE_SIZE);
1097
1098         cpufeatures_setup_start(isa);
1099
1100         /* Scan nodes into dt_cpu_features and enable those without deps  */
1101         count = 0;
1102         of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1103
1104         /* Recursive enable remaining features with dependencies */
1105         for (i = 0; i < nr_dt_cpu_features; i++) {
1106                 struct dt_cpu_feature *f = &dt_cpu_features[i];
1107
1108                 cpufeatures_deps_enable(f);
1109         }
1110
1111         prop = of_get_flat_dt_prop(node, "display-name", NULL);
1112         if (prop && strlen((char *)prop) != 0) {
1113                 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1114                 cur_cpu_spec->cpu_name = dt_cpu_name;
1115         }
1116
1117         cpufeatures_setup_finished();
1118
1119         memblock_free(__pa(dt_cpu_features),
1120                         sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1121
1122         return 0;
1123 }
1124
1125 void __init dt_cpu_ftrs_scan(void)
1126 {
1127         if (!using_dt_cpu_ftrs)
1128                 return;
1129
1130         of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1131 }