1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * smp.h: PowerPC-specific SMP code.
5 * Original was a copy of sparc smp.h. Now heavily modified
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
12 #ifndef _ASM_POWERPC_SMP_H
13 #define _ASM_POWERPC_SMP_H
16 #include <linux/threads.h>
17 #include <linux/cpumask.h>
18 #include <linux/kernel.h>
19 #include <linux/irqreturn.h>
26 #include <asm/percpu.h>
28 extern int boot_cpuid;
29 extern int spinning_secondaries;
30 extern u32 *cpu_to_phys_id;
31 extern bool coregroup_enabled;
33 extern int cpu_to_chip_id(int cpu);
34 extern int *chip_id_lookup_table;
36 DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
37 DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
38 DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
43 void (*message_pass)(int cpu, int msg);
44 #ifdef CONFIG_PPC_SMP_MUXED_IPI
45 void (*cause_ipi)(int cpu);
47 int (*cause_nmi_ipi)(int cpu);
49 int (*kick_cpu)(int nr);
50 int (*prepare_cpu)(int nr);
51 void (*setup_cpu)(int nr);
52 void (*bringup_done)(void);
53 void (*take_timebase)(void);
54 void (*give_timebase)(void);
55 int (*cpu_disable)(void);
56 void (*cpu_die)(unsigned int nr);
57 int (*cpu_bootable)(unsigned int nr);
58 #ifdef CONFIG_HOTPLUG_CPU
59 void (*cpu_offline_self)(void);
63 extern struct task_struct *secondary_current;
65 void start_secondary(void *unused);
66 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
67 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
68 extern void smp_send_debugger_break(void);
69 extern void start_secondary_resume(void);
70 extern void smp_generic_give_timebase(void);
71 extern void smp_generic_take_timebase(void);
73 DECLARE_PER_CPU(unsigned int, cpu_pvr);
75 #ifdef CONFIG_HOTPLUG_CPU
76 int generic_cpu_disable(void);
77 void generic_cpu_die(unsigned int cpu);
78 void generic_set_cpu_dead(unsigned int cpu);
79 void generic_set_cpu_up(unsigned int cpu);
80 int generic_check_cpu_restart(unsigned int cpu);
81 int is_cpu_dead(unsigned int cpu);
83 #define generic_set_cpu_up(i) do { } while (0)
87 #define raw_smp_processor_id() (local_paca->paca_index)
88 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
91 extern int smp_hw_index[];
93 #define raw_smp_processor_id() (current_thread_info()->cpu)
94 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
96 static inline int get_hard_smp_processor_id(int cpu)
98 return smp_hw_index[cpu];
101 static inline void set_hard_smp_processor_id(int cpu, int phys)
103 smp_hw_index[cpu] = phys;
107 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
108 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
109 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
110 DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
112 static inline struct cpumask *cpu_sibling_mask(int cpu)
114 return per_cpu(cpu_sibling_map, cpu);
117 static inline struct cpumask *cpu_core_mask(int cpu)
119 return per_cpu(cpu_core_map, cpu);
122 static inline struct cpumask *cpu_l2_cache_mask(int cpu)
124 return per_cpu(cpu_l2_cache_map, cpu);
127 static inline struct cpumask *cpu_smallcore_mask(int cpu)
129 return per_cpu(cpu_smallcore_map, cpu);
132 extern int cpu_to_core_id(int cpu);
134 extern bool has_big_cores;
135 extern bool thread_group_shares_l2;
136 extern bool thread_group_shares_l3;
138 #define cpu_smt_mask cpu_smt_mask
139 #ifdef CONFIG_SCHED_SMT
140 static inline const struct cpumask *cpu_smt_mask(int cpu)
143 return per_cpu(cpu_smallcore_map, cpu);
145 return per_cpu(cpu_sibling_map, cpu);
147 #endif /* CONFIG_SCHED_SMT */
149 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
151 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
152 * in /proc/interrupts will be wrong!!! --Troy */
153 #define PPC_MSG_CALL_FUNCTION 0
154 #define PPC_MSG_RESCHEDULE 1
155 #define PPC_MSG_TICK_BROADCAST 2
156 #define PPC_MSG_NMI_IPI 3
158 /* This is only used by the powernv kernel */
159 #define PPC_MSG_RM_HOST_ACTION 4
161 #define NMI_IPI_ALL_OTHERS -2
163 #ifdef CONFIG_NMI_IPI
164 extern int smp_handle_nmi_ipi(struct pt_regs *regs);
166 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
169 /* for irq controllers that have dedicated ipis per message (4) */
170 extern int smp_request_message_ipi(int virq, int message);
171 extern const char *smp_ipi_name[];
173 /* for irq controllers with only a single ipi */
174 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
175 extern void smp_muxed_ipi_set_message(int cpu, int msg);
176 extern irqreturn_t smp_ipi_demux(void);
177 extern irqreturn_t smp_ipi_demux_relaxed(void);
179 void smp_init_pSeries(void);
180 void smp_init_cell(void);
181 void smp_setup_cpu_maps(void);
183 extern int __cpu_disable(void);
184 extern void __cpu_die(unsigned int cpu);
188 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
189 #define smp_setup_cpu_maps()
190 #define thread_group_shares_l2 0
191 #define thread_group_shares_l3 0
192 static inline const struct cpumask *cpu_sibling_mask(int cpu)
194 return cpumask_of(cpu);
197 static inline const struct cpumask *cpu_smallcore_mask(int cpu)
199 return cpumask_of(cpu);
202 static inline const struct cpumask *cpu_l2_cache_mask(int cpu)
204 return cpumask_of(cpu);
206 #endif /* CONFIG_SMP */
209 static inline int get_hard_smp_processor_id(int cpu)
211 return paca_ptrs[cpu]->hw_cpu_id;
214 static inline void set_hard_smp_processor_id(int cpu, int phys)
216 paca_ptrs[cpu]->hw_cpu_id = phys;
221 extern int boot_cpuid_phys;
222 static inline int get_hard_smp_processor_id(int cpu)
224 return boot_cpuid_phys;
227 static inline void set_hard_smp_processor_id(int cpu, int phys)
229 boot_cpuid_phys = phys;
231 #endif /* !CONFIG_SMP */
232 #endif /* !CONFIG_PPC64 */
234 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
235 extern void smp_release_cpus(void);
237 static inline void smp_release_cpus(void) { }
240 extern int smt_enabled_at_boot;
242 extern void smp_mpic_probe(void);
243 extern void smp_mpic_setup_cpu(int cpu);
244 extern int smp_generic_kick_cpu(int nr);
245 extern int smp_generic_cpu_bootable(unsigned int nr);
248 extern void smp_generic_give_timebase(void);
249 extern void smp_generic_take_timebase(void);
251 extern struct smp_ops_t *smp_ops;
253 extern void arch_send_call_function_single_ipi(int cpu);
254 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
256 /* Definitions relative to the secondary CPU spin loop
257 * and entry point. Not all of them exist on both 32 and
258 * 64-bit but defining them all here doesn't harm
260 extern void generic_secondary_smp_init(void);
261 extern unsigned long __secondary_hold_spinloop;
262 extern unsigned long __secondary_hold_acknowledge;
263 extern char __secondary_hold;
264 extern unsigned int booting_thread_hwid;
266 extern void __early_start(void);
267 #endif /* __ASSEMBLY__ */
269 #endif /* __KERNEL__ */
270 #endif /* _ASM_POWERPC_SMP_H) */