2 * smp.h: PowerPC-specific SMP code.
4 * Original was a copy of sparc smp.h. Now heavily modified
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
16 #ifndef _ASM_POWERPC_SMP_H
17 #define _ASM_POWERPC_SMP_H
20 #include <linux/threads.h>
21 #include <linux/cpumask.h>
22 #include <linux/kernel.h>
23 #include <linux/irqreturn.h>
30 #include <asm/percpu.h>
32 extern int boot_cpuid;
33 extern int spinning_secondaries;
34 extern u32 *cpu_to_phys_id;
36 extern void cpu_die(void);
37 extern int cpu_to_chip_id(int cpu);
42 void (*message_pass)(int cpu, int msg);
43 #ifdef CONFIG_PPC_SMP_MUXED_IPI
44 void (*cause_ipi)(int cpu);
46 int (*cause_nmi_ipi)(int cpu);
48 int (*kick_cpu)(int nr);
49 int (*prepare_cpu)(int nr);
50 void (*setup_cpu)(int nr);
51 void (*bringup_done)(void);
52 void (*take_timebase)(void);
53 void (*give_timebase)(void);
54 int (*cpu_disable)(void);
55 void (*cpu_die)(unsigned int nr);
56 int (*cpu_bootable)(unsigned int nr);
59 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
60 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
61 extern void smp_send_debugger_break(void);
62 extern void start_secondary_resume(void);
63 extern void smp_generic_give_timebase(void);
64 extern void smp_generic_take_timebase(void);
66 DECLARE_PER_CPU(unsigned int, cpu_pvr);
68 #ifdef CONFIG_HOTPLUG_CPU
69 int generic_cpu_disable(void);
70 void generic_cpu_die(unsigned int cpu);
71 void generic_set_cpu_dead(unsigned int cpu);
72 void generic_set_cpu_up(unsigned int cpu);
73 int generic_check_cpu_restart(unsigned int cpu);
74 int is_cpu_dead(unsigned int cpu);
76 #define generic_set_cpu_up(i) do { } while (0)
80 #define raw_smp_processor_id() (local_paca->paca_index)
81 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
84 extern int smp_hw_index[];
87 * This is particularly ugly: it appears we can't actually get the definition
88 * of task_struct here, but we need access to the CPU this task is running on.
89 * Instead of using task_struct we're using _TASK_CPU which is extracted from
90 * asm-offsets.h by kbuild to get the current processor ID.
92 * This also needs to be safeguarded when building asm-offsets.s because at
93 * that time _TASK_CPU is not defined yet. It could have been guarded by
94 * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
95 * when building something else than asm-offsets.s
97 #ifdef GENERATING_ASM_OFFSETS
98 #define raw_smp_processor_id() (0)
100 #define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU))
102 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
104 static inline int get_hard_smp_processor_id(int cpu)
106 return smp_hw_index[cpu];
109 static inline void set_hard_smp_processor_id(int cpu, int phys)
111 smp_hw_index[cpu] = phys;
115 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
116 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
117 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
118 DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
120 static inline struct cpumask *cpu_sibling_mask(int cpu)
122 return per_cpu(cpu_sibling_map, cpu);
125 static inline struct cpumask *cpu_core_mask(int cpu)
127 return per_cpu(cpu_core_map, cpu);
130 static inline struct cpumask *cpu_l2_cache_mask(int cpu)
132 return per_cpu(cpu_l2_cache_map, cpu);
135 static inline struct cpumask *cpu_smallcore_mask(int cpu)
137 return per_cpu(cpu_smallcore_map, cpu);
140 extern int cpu_to_core_id(int cpu);
142 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
144 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
145 * in /proc/interrupts will be wrong!!! --Troy */
146 #define PPC_MSG_CALL_FUNCTION 0
147 #define PPC_MSG_RESCHEDULE 1
148 #define PPC_MSG_TICK_BROADCAST 2
149 #define PPC_MSG_NMI_IPI 3
151 /* This is only used by the powernv kernel */
152 #define PPC_MSG_RM_HOST_ACTION 4
154 #define NMI_IPI_ALL_OTHERS -2
156 #ifdef CONFIG_NMI_IPI
157 extern int smp_handle_nmi_ipi(struct pt_regs *regs);
159 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
162 /* for irq controllers that have dedicated ipis per message (4) */
163 extern int smp_request_message_ipi(int virq, int message);
164 extern const char *smp_ipi_name[];
166 /* for irq controllers with only a single ipi */
167 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
168 extern void smp_muxed_ipi_set_message(int cpu, int msg);
169 extern irqreturn_t smp_ipi_demux(void);
170 extern irqreturn_t smp_ipi_demux_relaxed(void);
172 void smp_init_pSeries(void);
173 void smp_init_cell(void);
174 void smp_setup_cpu_maps(void);
176 extern int __cpu_disable(void);
177 extern void __cpu_die(unsigned int cpu);
181 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
182 #define smp_setup_cpu_maps()
183 static inline void inhibit_secondary_onlining(void) {}
184 static inline void uninhibit_secondary_onlining(void) {}
185 static inline const struct cpumask *cpu_sibling_mask(int cpu)
187 return cpumask_of(cpu);
190 static inline const struct cpumask *cpu_smallcore_mask(int cpu)
192 return cpumask_of(cpu);
195 #endif /* CONFIG_SMP */
198 static inline int get_hard_smp_processor_id(int cpu)
200 return paca_ptrs[cpu]->hw_cpu_id;
203 static inline void set_hard_smp_processor_id(int cpu, int phys)
205 paca_ptrs[cpu]->hw_cpu_id = phys;
210 extern int boot_cpuid_phys;
211 static inline int get_hard_smp_processor_id(int cpu)
213 return boot_cpuid_phys;
216 static inline void set_hard_smp_processor_id(int cpu, int phys)
218 boot_cpuid_phys = phys;
220 #endif /* !CONFIG_SMP */
221 #endif /* !CONFIG_PPC64 */
223 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
224 extern void smp_release_cpus(void);
226 static inline void smp_release_cpus(void) { };
229 extern int smt_enabled_at_boot;
231 extern void smp_mpic_probe(void);
232 extern void smp_mpic_setup_cpu(int cpu);
233 extern int smp_generic_kick_cpu(int nr);
234 extern int smp_generic_cpu_bootable(unsigned int nr);
237 extern void smp_generic_give_timebase(void);
238 extern void smp_generic_take_timebase(void);
240 extern struct smp_ops_t *smp_ops;
242 extern void arch_send_call_function_single_ipi(int cpu);
243 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
245 /* Definitions relative to the secondary CPU spin loop
246 * and entry point. Not all of them exist on both 32 and
247 * 64-bit but defining them all here doesn't harm
249 extern void generic_secondary_smp_init(void);
250 extern void generic_secondary_thread_init(void);
251 extern unsigned long __secondary_hold_spinloop;
252 extern unsigned long __secondary_hold_acknowledge;
253 extern char __secondary_hold;
254 extern unsigned int booting_thread_hwid;
256 extern void __early_start(void);
257 #endif /* __ASSEMBLY__ */
259 #endif /* __KERNEL__ */
260 #endif /* _ASM_POWERPC_SMP_H) */