1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_PGTABLE_H
3 #define _ASM_POWERPC_PGTABLE_H
6 #include <linux/mmdebug.h>
7 #include <linux/mmzone.h>
8 #include <asm/processor.h> /* For TASK_SIZE */
11 #include <asm/tlbflush.h>
15 #endif /* !__ASSEMBLY__ */
17 #ifdef CONFIG_PPC_BOOK3S
18 #include <asm/book3s/pgtable.h>
20 #include <asm/nohash/pgtable.h>
21 #endif /* !CONFIG_PPC_BOOK3S */
23 /* Note due to the way vm flags are laid out, the bits are XWR */
24 #define __P000 PAGE_NONE
25 #define __P001 PAGE_READONLY
26 #define __P010 PAGE_COPY
27 #define __P011 PAGE_COPY
28 #define __P100 PAGE_READONLY_X
29 #define __P101 PAGE_READONLY_X
30 #define __P110 PAGE_COPY_X
31 #define __P111 PAGE_COPY_X
33 #define __S000 PAGE_NONE
34 #define __S001 PAGE_READONLY
35 #define __S010 PAGE_SHARED
36 #define __S011 PAGE_SHARED
37 #define __S100 PAGE_READONLY_X
38 #define __S101 PAGE_READONLY_X
39 #define __S110 PAGE_SHARED_X
40 #define __S111 PAGE_SHARED_X
44 #include <asm/tlbflush.h>
46 /* Keep these as a macros to avoid include dependency mess */
47 #define pte_page(x) pfn_to_page(pte_pfn(x))
48 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
50 * Select all bits except the pfn
52 static inline pgprot_t pte_pgprot(pte_t pte)
54 unsigned long pte_flags;
56 pte_flags = pte_val(pte) & ~PTE_RPN_MASK;
57 return __pgprot(pte_flags);
61 * ZERO_PAGE is a global shared page that is always zero: used
62 * for zero-mapped memory areas etc..
64 extern unsigned long empty_zero_page[];
65 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
67 extern pgd_t swapper_pg_dir[];
69 extern void paging_init(void);
72 * kern_addr_valid is intended to indicate whether an address is a valid
73 * kernel address. Most 32-bit archs define it as always true (like this)
74 * but most 64-bit archs actually perform a test. What should we do here?
76 #define kern_addr_valid(addr) (1)
78 #include <asm-generic/pgtable.h>
82 * This gets called at the end of handling a page fault, when
83 * the kernel has put a new PTE into the page table for the process.
84 * We use it to ensure coherency between the i-cache and d-cache
85 * for the page which has just been mapped in.
86 * On machines which use an MMU hash table, we use this to put a
87 * corresponding HPTE into the hash table ahead of time, instead of
88 * waiting for the inevitable extra hash-table miss exception.
90 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
92 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
93 #define pmd_large(pmd) 0
96 /* can we use this in kvm */
97 unsigned long vmalloc_to_phys(void *vmalloc_addr);
99 void pgtable_cache_add(unsigned int shift);
100 void pgtable_cache_init(void);
102 #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32)
103 void mark_initmem_nx(void);
105 static inline void mark_initmem_nx(void) { }
108 #ifdef CONFIG_PPC_DEBUG_WX
109 void ptdump_check_wx(void);
111 static inline void ptdump_check_wx(void) { }
115 * When used, PTE_FRAG_NR is defined in subarch pgtable.h
116 * so we are sure it is included when arriving here.
119 static inline void *pte_frag_get(mm_context_t *ctx)
121 return ctx->pte_frag;
124 static inline void pte_frag_set(mm_context_t *ctx, void *p)
129 #define PTE_FRAG_NR 1
130 #define PTE_FRAG_SIZE_SHIFT PAGE_SHIFT
131 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
133 static inline void *pte_frag_get(mm_context_t *ctx)
138 static inline void pte_frag_set(mm_context_t *ctx, void *p)
143 #endif /* __ASSEMBLY__ */
145 #endif /* _ASM_POWERPC_PGTABLE_H */