1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * PowerPC BookIII S hardware breakpoint definitions
5 * Copyright 2010, IBM Corporation.
6 * Author: K.Prasad <prasad@linux.vnet.ibm.com>
9 #ifndef _PPC_BOOK3S_64_HW_BREAKPOINT_H
10 #define _PPC_BOOK3S_64_HW_BREAKPOINT_H
13 struct arch_hw_breakpoint {
14 unsigned long address;
16 u16 len; /* length of the target data symbol */
17 u16 hw_len; /* length programmed in hw */
20 /* Note: Don't change the the first 6 bits below as they are in the same order
21 * as the dabr and dabrx.
23 #define HW_BRK_TYPE_READ 0x01
24 #define HW_BRK_TYPE_WRITE 0x02
25 #define HW_BRK_TYPE_TRANSLATE 0x04
26 #define HW_BRK_TYPE_USER 0x08
27 #define HW_BRK_TYPE_KERNEL 0x10
28 #define HW_BRK_TYPE_HYP 0x20
29 #define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
31 /* bits that overlap with the bottom 3 bits of the dabr */
32 #define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
33 #define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
34 #define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
37 /* Minimum granularity */
39 #define HW_BREAKPOINT_SIZE 0x4
41 #define HW_BREAKPOINT_SIZE 0x8
44 #define DABR_MAX_LEN 8
45 #define DAWR_MAX_LEN 512
47 static inline int nr_wp_slots(void)
52 #ifdef CONFIG_HAVE_HW_BREAKPOINT
53 #include <linux/kdebug.h>
55 #include <asm/debug.h>
57 struct perf_event_attr;
60 struct perf_sample_data;
63 extern int hw_breakpoint_slots(int type);
64 extern int arch_bp_generic_fields(int type, int *gen_bp_type);
65 extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw);
66 extern int hw_breakpoint_arch_parse(struct perf_event *bp,
67 const struct perf_event_attr *attr,
68 struct arch_hw_breakpoint *hw);
69 extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
70 unsigned long val, void *data);
71 int arch_install_hw_breakpoint(struct perf_event *bp);
72 void arch_uninstall_hw_breakpoint(struct perf_event *bp);
73 int arch_reserve_bp_slot(struct perf_event *bp);
74 void arch_release_bp_slot(struct perf_event *bp);
75 void arch_unregister_hw_breakpoint(struct perf_event *bp);
76 void hw_breakpoint_pmu_read(struct perf_event *bp);
77 extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk);
79 extern struct pmu perf_ops_bp;
80 extern void ptrace_triggered(struct perf_event *bp,
81 struct perf_sample_data *data, struct pt_regs *regs);
82 static inline void hw_breakpoint_disable(void)
85 struct arch_hw_breakpoint null_brk = {0};
87 if (!ppc_breakpoint_available())
90 for (i = 0; i < nr_wp_slots(); i++)
91 __set_breakpoint(i, &null_brk);
93 extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
94 int hw_breakpoint_handler(struct die_args *args);
96 #else /* CONFIG_HAVE_HW_BREAKPOINT */
97 static inline void hw_breakpoint_disable(void) { }
98 static inline void thread_change_pc(struct task_struct *tsk,
99 struct pt_regs *regs) { }
101 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
104 #ifdef CONFIG_PPC_DAWR
105 extern bool dawr_force_enable;
106 static inline bool dawr_enabled(void)
108 return dawr_force_enable;
110 int set_dawr(int nr, struct arch_hw_breakpoint *brk);
112 static inline bool dawr_enabled(void) { return false; }
113 static inline int set_dawr(int nr, struct arch_hw_breakpoint *brk) { return -1; }
116 #endif /* __KERNEL__ */
117 #endif /* _PPC_BOOK3S_64_HW_BREAKPOINT_H */