1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
3 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
5 #include <asm-generic/pgtable-nop4d.h>
8 #include <linux/mmdebug.h>
13 * Common bits between hash and Radix page table
15 #define _PAGE_BIT_SWAP_TYPE 0
17 #define _PAGE_EXEC 0x00001 /* execute permission */
18 #define _PAGE_WRITE 0x00002 /* write access allowed */
19 #define _PAGE_READ 0x00004 /* read access allowed */
20 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
21 #define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
22 #define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
24 #define _PAGE_CACHE_CTL 0x00030 /* Bits for the folowing cache modes */
25 /* No bits set is normal cacheable memory */
26 /* 0x00010 unused, is SAO bit on radix POWER9 */
27 #define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
28 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
30 #define _PAGE_DIRTY 0x00080 /* C: page changed */
31 #define _PAGE_ACCESSED 0x00100 /* R: page referenced */
35 #define _RPAGE_SW0 0x2000000000000000UL
36 #define _RPAGE_SW1 0x00800
37 #define _RPAGE_SW2 0x00400
38 #define _RPAGE_SW3 0x00200
39 #define _RPAGE_RSV1 0x00040UL
41 #define _RPAGE_PKEY_BIT4 0x1000000000000000UL
42 #define _RPAGE_PKEY_BIT3 0x0800000000000000UL
43 #define _RPAGE_PKEY_BIT2 0x0400000000000000UL
44 #define _RPAGE_PKEY_BIT1 0x0200000000000000UL
45 #define _RPAGE_PKEY_BIT0 0x0100000000000000UL
47 #define _PAGE_PTE 0x4000000000000000UL /* distinguishes PTEs from pointers */
48 #define _PAGE_PRESENT 0x8000000000000000UL /* pte contains a translation */
50 * We need to mark a pmd pte invalid while splitting. We can do that by clearing
51 * the _PAGE_PRESENT bit. But then that will be taken as a swap pte. In order to
52 * differentiate between two use a SW field when invalidating.
54 * We do that temporary invalidate for regular pte entry in ptep_set_access_flags
56 * This is used only when _PAGE_PRESENT is cleared.
58 #define _PAGE_INVALID _RPAGE_SW0
61 * Top and bottom bits of RPN which can be used by hash
62 * translation mode, because we expect them to be zero
65 #define _RPAGE_RPN0 0x01000
66 #define _RPAGE_RPN1 0x02000
67 #define _RPAGE_RPN43 0x0080000000000000UL
68 #define _RPAGE_RPN42 0x0040000000000000UL
69 #define _RPAGE_RPN41 0x0020000000000000UL
71 /* Max physical address bit as per radix table */
72 #define _RPAGE_PA_MAX 56
75 * Max physical address bit we will use for now.
77 * This is mostly a hardware limitation and for now Power9 has
80 * This is different from the number of physical bit required to address
81 * the last byte of memory. That is defined by MAX_PHYSMEM_BITS.
82 * MAX_PHYSMEM_BITS is a linux limitation imposed by the maximum
83 * number of sections we can support (SECTIONS_SHIFT).
85 * This is different from Radix page table limitation above and
86 * should always be less than that. The limit is done such that
87 * we can overload the bits between _RPAGE_PA_MAX and _PAGE_PA_MAX
88 * for hash linux page table specific bits.
90 * In order to be compatible with future hardware generations we keep
91 * some offsets and limit this for now to 53
93 #define _PAGE_PA_MAX 53
95 #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
96 #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
97 #define _PAGE_DEVMAP _RPAGE_SW1 /* software: ZONE_DEVICE page */
100 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
101 * Instead of fixing all of them, add an alternate define which
102 * maps CI pte mapping.
104 #define _PAGE_NO_CACHE _PAGE_TOLERANT
106 * We support _RPAGE_PA_MAX bit real address in pte. On the linux side
107 * we are limited by _PAGE_PA_MAX. Clear everything above _PAGE_PA_MAX
108 * and every thing below PAGE_SHIFT;
110 #define PTE_RPN_MASK (((1UL << _PAGE_PA_MAX) - 1) & (PAGE_MASK))
112 * set of bits not changed in pmd_modify. Even though we have hash specific bits
113 * in here, on radix we expect them to be zero.
115 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
116 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
117 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
119 * user access blocked by key
121 #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
122 #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
123 #define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
124 _PAGE_RW | _PAGE_EXEC)
126 * _PAGE_CHG_MASK masks of bits that are to be preserved across
129 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
130 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
131 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
134 * We define 2 sets of base prot bits, one for basic pages (ie,
135 * cacheable kernel and user pages) and one for non cacheable
136 * pages. We always set _PAGE_COHERENT when SMP is enabled or
137 * the processor might need it for DMA coherency.
139 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
140 #define _PAGE_BASE (_PAGE_BASE_NC)
142 /* Permission masks used to generate the __P and __S table,
144 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
146 * Write permissions imply read permissions for now (we could make write-only
147 * pages on BookE but we don't bother for now). Execute permission control is
148 * possible on platforms that define _PAGE_EXEC
150 #define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
151 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
152 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
153 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
154 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
155 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
156 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
158 /* Permission masks used for kernel mappings */
159 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
160 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
162 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
163 _PAGE_NON_IDEMPOTENT)
164 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
165 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
166 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
169 * Protection used for kernel text. We want the debuggers to be able to
170 * set breakpoints anywhere, so don't write protect the kernel text
171 * on platforms where such control is possible.
173 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
174 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
175 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
177 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
180 /* Make modules code happy. We don't set RO yet */
181 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
182 #define PAGE_AGP (PAGE_KERNEL_NC)
188 extern unsigned long __pte_index_size;
189 extern unsigned long __pmd_index_size;
190 extern unsigned long __pud_index_size;
191 extern unsigned long __pgd_index_size;
192 extern unsigned long __pud_cache_index;
193 #define PTE_INDEX_SIZE __pte_index_size
194 #define PMD_INDEX_SIZE __pmd_index_size
195 #define PUD_INDEX_SIZE __pud_index_size
196 #define PGD_INDEX_SIZE __pgd_index_size
197 /* pmd table use page table fragments */
198 #define PMD_CACHE_INDEX 0
199 #define PUD_CACHE_INDEX __pud_cache_index
201 * Because of use of pte fragments and THP, size of page table
202 * are not always derived out of index size above.
204 extern unsigned long __pte_table_size;
205 extern unsigned long __pmd_table_size;
206 extern unsigned long __pud_table_size;
207 extern unsigned long __pgd_table_size;
208 #define PTE_TABLE_SIZE __pte_table_size
209 #define PMD_TABLE_SIZE __pmd_table_size
210 #define PUD_TABLE_SIZE __pud_table_size
211 #define PGD_TABLE_SIZE __pgd_table_size
213 extern unsigned long __pmd_val_bits;
214 extern unsigned long __pud_val_bits;
215 extern unsigned long __pgd_val_bits;
216 #define PMD_VAL_BITS __pmd_val_bits
217 #define PUD_VAL_BITS __pud_val_bits
218 #define PGD_VAL_BITS __pgd_val_bits
220 extern unsigned long __pte_frag_nr;
221 #define PTE_FRAG_NR __pte_frag_nr
222 extern unsigned long __pte_frag_size_shift;
223 #define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
224 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
226 extern unsigned long __pmd_frag_nr;
227 #define PMD_FRAG_NR __pmd_frag_nr
228 extern unsigned long __pmd_frag_size_shift;
229 #define PMD_FRAG_SIZE_SHIFT __pmd_frag_size_shift
230 #define PMD_FRAG_SIZE (1UL << PMD_FRAG_SIZE_SHIFT)
232 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
233 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
234 #define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
235 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
237 /* PMD_SHIFT determines what a second-level page table entry can map */
238 #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
239 #define PMD_SIZE (1UL << PMD_SHIFT)
240 #define PMD_MASK (~(PMD_SIZE-1))
242 /* PUD_SHIFT determines what a third-level page table entry can map */
243 #define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
244 #define PUD_SIZE (1UL << PUD_SHIFT)
245 #define PUD_MASK (~(PUD_SIZE-1))
247 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
248 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
249 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
250 #define PGDIR_MASK (~(PGDIR_SIZE-1))
252 /* Bits to mask out from a PMD to get to the PTE page */
253 #define PMD_MASKED_BITS 0xc0000000000000ffUL
254 /* Bits to mask out from a PUD to get to the PMD page */
255 #define PUD_MASKED_BITS 0xc0000000000000ffUL
256 /* Bits to mask out from a PGD to get to the PUD page */
257 #define P4D_MASKED_BITS 0xc0000000000000ffUL
260 * Used as an indicator for rcu callback functions
268 * Below are used with 4k page size and hugetlb
274 extern unsigned long __vmalloc_start;
275 extern unsigned long __vmalloc_end;
276 #define VMALLOC_START __vmalloc_start
277 #define VMALLOC_END __vmalloc_end
279 static inline unsigned int ioremap_max_order(void)
283 return 7 + PAGE_SHIFT; /* default from linux/vmalloc.h */
285 #define IOREMAP_MAX_ORDER ioremap_max_order()
287 extern unsigned long __kernel_virt_start;
288 extern unsigned long __kernel_io_start;
289 extern unsigned long __kernel_io_end;
290 #define KERN_VIRT_START __kernel_virt_start
291 #define KERN_IO_START __kernel_io_start
292 #define KERN_IO_END __kernel_io_end
294 extern struct page *vmemmap;
295 extern unsigned long pci_io_base;
296 #endif /* __ASSEMBLY__ */
298 #include <asm/book3s/64/hash.h>
299 #include <asm/book3s/64/radix.h>
301 #ifdef CONFIG_PPC_64K_PAGES
302 #include <asm/book3s/64/pgtable-64k.h>
304 #include <asm/book3s/64/pgtable-4k.h>
307 #include <asm/barrier.h>
309 * IO space itself carved into the PIO region (ISA and PHB IO space) and
312 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
313 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
314 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
316 #define FULL_IO_SIZE 0x80000000ul
317 #define ISA_IO_BASE (KERN_IO_START)
318 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
319 #define PHB_IO_BASE (ISA_IO_END)
320 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
321 #define IOREMAP_BASE (PHB_IO_END)
322 #define IOREMAP_START (ioremap_bot)
323 #define IOREMAP_END (KERN_IO_END)
325 /* Advertise special mapping type for AGP */
326 #define HAVE_PAGE_AGP
331 * This is the default implementation of various PTE accessors, it's
332 * used in all cases except Book3S with 64K pages where we have a
333 * concept of sub-pages
337 #define __real_pte(e, p, o) ((real_pte_t){(e)})
338 #define __rpte_to_pte(r) ((r).pte)
339 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
341 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
344 shift = mmu_psize_defs[psize].shift; \
346 #define pte_iterate_hashed_end() } while(0)
349 * We expect this to be called only for user addresses or kernel virtual
350 * addresses other than the linear mapping.
352 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
354 #endif /* __real_pte */
356 static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,
357 pte_t *ptep, unsigned long clr,
358 unsigned long set, int huge)
361 return radix__pte_update(mm, addr, ptep, clr, set, huge);
362 return hash__pte_update(mm, addr, ptep, clr, set, huge);
365 * For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
366 * We currently remove entries from the hashtable regardless of whether
367 * the entry was young or dirty.
369 * We should be more intelligent about this but for the moment we override
370 * these functions and force a tlb flush unconditionally
371 * For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
372 * function for both hash and radix.
374 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
375 unsigned long addr, pte_t *ptep)
379 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
381 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
382 return (old & _PAGE_ACCESSED) != 0;
385 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
386 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
389 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
393 static inline int __pte_write(pte_t pte)
395 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE));
398 #ifdef CONFIG_NUMA_BALANCING
399 #define pte_savedwrite pte_savedwrite
400 static inline bool pte_savedwrite(pte_t pte)
403 * Saved write ptes are prot none ptes that doesn't have
404 * privileged bit sit. We mark prot none as one which has
405 * present and pviliged bit set and RWX cleared. To mark
406 * protnone which used to have _PAGE_WRITE set we clear
407 * the privileged bit.
409 return !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED));
412 #define pte_savedwrite pte_savedwrite
413 static inline bool pte_savedwrite(pte_t pte)
419 static inline int pte_write(pte_t pte)
421 return __pte_write(pte) || pte_savedwrite(pte);
424 static inline int pte_read(pte_t pte)
426 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_READ));
429 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
430 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
433 if (__pte_write(*ptep))
434 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
435 else if (unlikely(pte_savedwrite(*ptep)))
436 pte_update(mm, addr, ptep, 0, _PAGE_PRIVILEGED, 0);
439 #define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
440 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
441 unsigned long addr, pte_t *ptep)
444 * We should not find protnone for hugetlb, but this complete the
447 if (__pte_write(*ptep))
448 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
449 else if (unlikely(pte_savedwrite(*ptep)))
450 pte_update(mm, addr, ptep, 0, _PAGE_PRIVILEGED, 1);
453 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
454 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
455 unsigned long addr, pte_t *ptep)
457 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
461 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
462 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
464 pte_t *ptep, int full)
466 if (full && radix_enabled()) {
468 * We know that this is a full mm pte clear and
469 * hence can be sure there is no parallel set_pte.
471 return radix__ptep_get_and_clear_full(mm, addr, ptep, full);
473 return ptep_get_and_clear(mm, addr, ptep);
477 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
480 pte_update(mm, addr, ptep, ~0UL, 0, 0);
483 static inline int pte_dirty(pte_t pte)
485 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY));
488 static inline int pte_young(pte_t pte)
490 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED));
493 static inline int pte_special(pte_t pte)
495 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
498 static inline bool pte_exec(pte_t pte)
500 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
504 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
505 static inline bool pte_soft_dirty(pte_t pte)
507 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY));
510 static inline pte_t pte_mksoft_dirty(pte_t pte)
512 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SOFT_DIRTY));
515 static inline pte_t pte_clear_soft_dirty(pte_t pte)
517 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SOFT_DIRTY));
519 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
521 #ifdef CONFIG_NUMA_BALANCING
522 static inline int pte_protnone(pte_t pte)
524 return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE | _PAGE_RWX)) ==
525 cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE);
528 #define pte_mk_savedwrite pte_mk_savedwrite
529 static inline pte_t pte_mk_savedwrite(pte_t pte)
532 * Used by Autonuma subsystem to preserve the write bit
533 * while marking the pte PROT_NONE. Only allow this
536 VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX | _PAGE_PRIVILEGED)) !=
537 cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));
538 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_PRIVILEGED));
541 #define pte_clear_savedwrite pte_clear_savedwrite
542 static inline pte_t pte_clear_savedwrite(pte_t pte)
545 * Used by KSM subsystem to make a protnone pte readonly.
547 VM_BUG_ON(!pte_protnone(pte));
548 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PRIVILEGED));
551 #define pte_clear_savedwrite pte_clear_savedwrite
552 static inline pte_t pte_clear_savedwrite(pte_t pte)
555 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_WRITE));
557 #endif /* CONFIG_NUMA_BALANCING */
559 static inline bool pte_hw_valid(pte_t pte)
561 return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE)) ==
562 cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE);
565 static inline int pte_present(pte_t pte)
568 * A pte is considerent present if _PAGE_PRESENT is set.
569 * We also need to consider the pte present which is marked
570 * invalid during ptep_set_access_flags. Hence we look for _PAGE_INVALID
571 * if we find _PAGE_PRESENT cleared.
574 if (pte_hw_valid(pte))
576 return (pte_raw(pte) & cpu_to_be64(_PAGE_INVALID | _PAGE_PTE)) ==
577 cpu_to_be64(_PAGE_INVALID | _PAGE_PTE);
580 #ifdef CONFIG_PPC_MEM_KEYS
581 extern bool arch_pte_access_permitted(u64 pte, bool write, bool execute);
583 static inline bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
587 #endif /* CONFIG_PPC_MEM_KEYS */
589 static inline bool pte_user(pte_t pte)
591 return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
594 #define pte_access_permitted pte_access_permitted
595 static inline bool pte_access_permitted(pte_t pte, bool write)
598 * _PAGE_READ is needed for any access and will be
599 * cleared for PROT_NONE
601 if (!pte_present(pte) || !pte_user(pte) || !pte_read(pte))
604 if (write && !pte_write(pte))
607 return arch_pte_access_permitted(pte_val(pte), write, 0);
611 * Conversion functions: convert a page and protection to a page entry,
612 * and a page entry and page directory to the page they refer to.
614 * Even if PTEs can be unsigned long long, a PFN is always an unsigned
617 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
619 VM_BUG_ON(pfn >> (64 - PAGE_SHIFT));
620 VM_BUG_ON((pfn << PAGE_SHIFT) & ~PTE_RPN_MASK);
622 return __pte(((pte_basic_t)pfn << PAGE_SHIFT) | pgprot_val(pgprot));
625 static inline unsigned long pte_pfn(pte_t pte)
627 return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
630 /* Generic modifiers for PTE bits */
631 static inline pte_t pte_wrprotect(pte_t pte)
633 if (unlikely(pte_savedwrite(pte)))
634 return pte_clear_savedwrite(pte);
635 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_WRITE));
638 static inline pte_t pte_exprotect(pte_t pte)
640 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_EXEC));
643 static inline pte_t pte_mkclean(pte_t pte)
645 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_DIRTY));
648 static inline pte_t pte_mkold(pte_t pte)
650 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_ACCESSED));
653 static inline pte_t pte_mkexec(pte_t pte)
655 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_EXEC));
658 static inline pte_t pte_mkpte(pte_t pte)
660 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PTE));
663 static inline pte_t pte_mkwrite(pte_t pte)
666 * write implies read, hence set both
668 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_RW));
671 static inline pte_t pte_mkdirty(pte_t pte)
673 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_DIRTY | _PAGE_SOFT_DIRTY));
676 static inline pte_t pte_mkyoung(pte_t pte)
678 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_ACCESSED));
681 static inline pte_t pte_mkspecial(pte_t pte)
683 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL));
686 static inline pte_t pte_mkhuge(pte_t pte)
691 static inline pte_t pte_mkdevmap(pte_t pte)
693 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL | _PAGE_DEVMAP));
696 static inline pte_t pte_mkprivileged(pte_t pte)
698 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PRIVILEGED));
701 static inline pte_t pte_mkuser(pte_t pte)
703 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_PRIVILEGED));
707 * This is potentially called with a pmd as the argument, in which case it's not
708 * safe to check _PAGE_DEVMAP unless we also confirm that _PAGE_PTE is set.
709 * That's because the bit we use for _PAGE_DEVMAP is not reserved for software
710 * use in page directory entries (ie. non-ptes).
712 static inline int pte_devmap(pte_t pte)
714 u64 mask = cpu_to_be64(_PAGE_DEVMAP | _PAGE_PTE);
716 return (pte_raw(pte) & mask) == mask;
719 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
721 /* FIXME!! check whether this need to be a conditional */
722 return __pte_raw((pte_raw(pte) & cpu_to_be64(_PAGE_CHG_MASK)) |
723 cpu_to_be64(pgprot_val(newprot)));
726 /* Encode and de-code a swap entry */
727 #define MAX_SWAPFILES_CHECK() do { \
728 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
730 * Don't have overlapping bits with _PAGE_HPTEFLAGS \
731 * We filter HPTEFLAGS on set_pte. \
733 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
734 BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
737 #define SWP_TYPE_BITS 5
738 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
739 & ((1UL << SWP_TYPE_BITS) - 1))
740 #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
741 #define __swp_entry(type, offset) ((swp_entry_t) { \
742 ((type) << _PAGE_BIT_SWAP_TYPE) \
743 | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
745 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
746 * swap type and offset we get from swap and convert that to pte to find a
747 * matching pte in linux page table.
748 * Clear bits not found in swap entries here.
750 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
751 #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
752 #define __pmd_to_swp_entry(pmd) (__pte_to_swp_entry(pmd_pte(pmd)))
753 #define __swp_entry_to_pmd(x) (pte_pmd(__swp_entry_to_pte(x)))
755 #ifdef CONFIG_MEM_SOFT_DIRTY
756 #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
758 #define _PAGE_SWP_SOFT_DIRTY 0UL
759 #endif /* CONFIG_MEM_SOFT_DIRTY */
761 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
762 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
764 return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
767 static inline bool pte_swp_soft_dirty(pte_t pte)
769 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
772 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
774 return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SWP_SOFT_DIRTY));
776 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
778 static inline bool check_pte_access(unsigned long access, unsigned long ptev)
781 * This check for _PAGE_RWX and _PAGE_PRESENT bits
786 * This check for access to privilege space
788 if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
794 * Generic functions with hash/radix callbacks
797 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
798 pte_t *ptep, pte_t entry,
799 unsigned long address,
803 return radix__ptep_set_access_flags(vma, ptep, entry,
805 return hash__ptep_set_access_flags(ptep, entry);
808 #define __HAVE_ARCH_PTE_SAME
809 static inline int pte_same(pte_t pte_a, pte_t pte_b)
812 return radix__pte_same(pte_a, pte_b);
813 return hash__pte_same(pte_a, pte_b);
816 static inline int pte_none(pte_t pte)
819 return radix__pte_none(pte);
820 return hash__pte_none(pte);
823 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
824 pte_t *ptep, pte_t pte, int percpu)
827 return radix__set_pte_at(mm, addr, ptep, pte, percpu);
828 return hash__set_pte_at(mm, addr, ptep, pte, percpu);
831 #define pgprot_noncached pgprot_noncached
832 static inline pgprot_t pgprot_noncached(pgprot_t prot)
834 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
835 _PAGE_NON_IDEMPOTENT);
838 #define pgprot_noncached_wc pgprot_noncached_wc
839 static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
841 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
845 #define pgprot_cached pgprot_cached
846 static inline pgprot_t pgprot_cached(pgprot_t prot)
848 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
851 #define pgprot_writecombine pgprot_writecombine
852 static inline pgprot_t pgprot_writecombine(pgprot_t prot)
854 return pgprot_noncached_wc(prot);
857 * check a pte mapping have cache inhibited property
859 static inline bool pte_ci(pte_t pte)
861 __be64 pte_v = pte_raw(pte);
863 if (((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_TOLERANT)) ||
864 ((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_NON_IDEMPOTENT)))
869 static inline void pmd_clear(pmd_t *pmdp)
874 static inline int pmd_none(pmd_t pmd)
876 return !pmd_raw(pmd);
879 static inline int pmd_present(pmd_t pmd)
882 * A pmd is considerent present if _PAGE_PRESENT is set.
883 * We also need to consider the pmd present which is marked
884 * invalid during a split. Hence we look for _PAGE_INVALID
885 * if we find _PAGE_PRESENT cleared.
887 if (pmd_raw(pmd) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID))
893 static inline int pmd_is_serializing(pmd_t pmd)
896 * If the pmd is undergoing a split, the _PAGE_PRESENT bit is clear
897 * and _PAGE_INVALID is set (see pmd_present, pmdp_invalidate).
899 * This condition may also occur when flushing a pmd while flushing
900 * it (see ptep_modify_prot_start), so callers must ensure this
901 * case is fine as well.
903 if ((pmd_raw(pmd) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID)) ==
904 cpu_to_be64(_PAGE_INVALID))
910 static inline int pmd_bad(pmd_t pmd)
913 return radix__pmd_bad(pmd);
914 return hash__pmd_bad(pmd);
917 static inline void pud_clear(pud_t *pudp)
922 static inline int pud_none(pud_t pud)
924 return !pud_raw(pud);
927 static inline int pud_present(pud_t pud)
929 return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PRESENT));
932 extern struct page *pud_page(pud_t pud);
933 extern struct page *pmd_page(pmd_t pmd);
934 static inline pte_t pud_pte(pud_t pud)
936 return __pte_raw(pud_raw(pud));
939 static inline pud_t pte_pud(pte_t pte)
941 return __pud_raw(pte_raw(pte));
943 #define pud_write(pud) pte_write(pud_pte(pud))
945 static inline int pud_bad(pud_t pud)
948 return radix__pud_bad(pud);
949 return hash__pud_bad(pud);
952 #define pud_access_permitted pud_access_permitted
953 static inline bool pud_access_permitted(pud_t pud, bool write)
955 return pte_access_permitted(pud_pte(pud), write);
958 #define __p4d_raw(x) ((p4d_t) { __pgd_raw(x) })
959 static inline __be64 p4d_raw(p4d_t x)
961 return pgd_raw(x.pgd);
964 #define p4d_write(p4d) pte_write(p4d_pte(p4d))
966 static inline void p4d_clear(p4d_t *p4dp)
971 static inline int p4d_none(p4d_t p4d)
973 return !p4d_raw(p4d);
976 static inline int p4d_present(p4d_t p4d)
978 return !!(p4d_raw(p4d) & cpu_to_be64(_PAGE_PRESENT));
981 static inline pte_t p4d_pte(p4d_t p4d)
983 return __pte_raw(p4d_raw(p4d));
986 static inline p4d_t pte_p4d(pte_t pte)
988 return __p4d_raw(pte_raw(pte));
991 static inline int p4d_bad(p4d_t p4d)
994 return radix__p4d_bad(p4d);
995 return hash__p4d_bad(p4d);
998 #define p4d_access_permitted p4d_access_permitted
999 static inline bool p4d_access_permitted(p4d_t p4d, bool write)
1001 return pte_access_permitted(p4d_pte(p4d), write);
1004 extern struct page *p4d_page(p4d_t p4d);
1006 /* Pointers in the page table tree are physical addresses */
1007 #define __pgtable_ptr_val(ptr) __pa(ptr)
1009 #define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
1010 #define p4d_page_vaddr(p4d) __va(p4d_val(p4d) & ~P4D_MASKED_BITS)
1012 #define pte_ERROR(e) \
1013 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
1014 #define pmd_ERROR(e) \
1015 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
1016 #define pud_ERROR(e) \
1017 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
1018 #define pgd_ERROR(e) \
1019 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
1021 static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
1023 if (radix_enabled()) {
1024 #if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
1025 unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
1026 WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
1028 return radix__map_kernel_page(ea, pa, prot, PAGE_SIZE);
1030 return hash__map_kernel_page(ea, pa, prot);
1033 static inline int __meminit vmemmap_create_mapping(unsigned long start,
1034 unsigned long page_size,
1037 if (radix_enabled())
1038 return radix__vmemmap_create_mapping(start, page_size, phys);
1039 return hash__vmemmap_create_mapping(start, page_size, phys);
1042 #ifdef CONFIG_MEMORY_HOTPLUG
1043 static inline void vmemmap_remove_mapping(unsigned long start,
1044 unsigned long page_size)
1046 if (radix_enabled())
1047 return radix__vmemmap_remove_mapping(start, page_size);
1048 return hash__vmemmap_remove_mapping(start, page_size);
1052 static inline pte_t pmd_pte(pmd_t pmd)
1054 return __pte_raw(pmd_raw(pmd));
1057 static inline pmd_t pte_pmd(pte_t pte)
1059 return __pmd_raw(pte_raw(pte));
1062 static inline pte_t *pmdp_ptep(pmd_t *pmd)
1064 return (pte_t *)pmd;
1066 #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
1067 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
1068 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
1069 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
1070 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
1071 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
1072 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
1073 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
1074 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
1075 #define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd)))
1076 #define pmd_clear_savedwrite(pmd) pte_pmd(pte_clear_savedwrite(pmd_pte(pmd)))
1078 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1079 #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
1080 #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
1081 #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
1083 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1084 #define pmd_swp_mksoft_dirty(pmd) pte_pmd(pte_swp_mksoft_dirty(pmd_pte(pmd)))
1085 #define pmd_swp_soft_dirty(pmd) pte_swp_soft_dirty(pmd_pte(pmd))
1086 #define pmd_swp_clear_soft_dirty(pmd) pte_pmd(pte_swp_clear_soft_dirty(pmd_pte(pmd)))
1088 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
1090 #ifdef CONFIG_NUMA_BALANCING
1091 static inline int pmd_protnone(pmd_t pmd)
1093 return pte_protnone(pmd_pte(pmd));
1095 #endif /* CONFIG_NUMA_BALANCING */
1097 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
1098 #define __pmd_write(pmd) __pte_write(pmd_pte(pmd))
1099 #define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd))
1101 #define pmd_access_permitted pmd_access_permitted
1102 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1105 * pmdp_invalidate sets this combination (which is not caught by
1106 * !pte_present() check in pte_access_permitted), to prevent
1107 * lock-free lookups, as part of the serialize_against_pte_lookup()
1110 * This also catches the case where the PTE's hardware PRESENT bit is
1111 * cleared while TLB is flushed, which is suboptimal but should not
1114 if (pmd_is_serializing(pmd))
1117 return pte_access_permitted(pmd_pte(pmd), write);
1120 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1121 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
1122 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
1123 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
1124 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1125 pmd_t *pmdp, pmd_t pmd);
1126 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1127 unsigned long addr, pmd_t *pmd)
1131 extern int hash__has_transparent_hugepage(void);
1132 static inline int has_transparent_hugepage(void)
1134 if (radix_enabled())
1135 return radix__has_transparent_hugepage();
1136 return hash__has_transparent_hugepage();
1138 #define has_transparent_hugepage has_transparent_hugepage
1140 static inline unsigned long
1141 pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp,
1142 unsigned long clr, unsigned long set)
1144 if (radix_enabled())
1145 return radix__pmd_hugepage_update(mm, addr, pmdp, clr, set);
1146 return hash__pmd_hugepage_update(mm, addr, pmdp, clr, set);
1150 * returns true for pmd migration entries, THP, devmap, hugetlb
1151 * But compile time dependent on THP config
1153 static inline int pmd_large(pmd_t pmd)
1155 return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
1159 * For radix we should always find H_PAGE_HASHPTE zero. Hence
1160 * the below will work for radix too
1162 static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
1163 unsigned long addr, pmd_t *pmdp)
1167 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
1169 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
1170 return ((old & _PAGE_ACCESSED) != 0);
1173 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1174 static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
1177 if (__pmd_write((*pmdp)))
1178 pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0);
1179 else if (unlikely(pmd_savedwrite(*pmdp)))
1180 pmd_hugepage_update(mm, addr, pmdp, 0, _PAGE_PRIVILEGED);
1184 * Only returns true for a THP. False for pmd migration entry.
1185 * We also need to return true when we come across a pte that
1186 * in between a thp split. While splitting THP, we mark the pmd
1187 * invalid (pmdp_invalidate()) before we set it with pte page
1188 * address. A pmd_trans_huge() check against a pmd entry during that time
1189 * should return true.
1190 * We should not call this on a hugetlb entry. We should check for HugeTLB
1191 * entry using vma->vm_flags
1192 * The page table walk rule is explained in Documentation/vm/transhuge.rst
1194 static inline int pmd_trans_huge(pmd_t pmd)
1196 if (!pmd_present(pmd))
1199 if (radix_enabled())
1200 return radix__pmd_trans_huge(pmd);
1201 return hash__pmd_trans_huge(pmd);
1204 #define __HAVE_ARCH_PMD_SAME
1205 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
1207 if (radix_enabled())
1208 return radix__pmd_same(pmd_a, pmd_b);
1209 return hash__pmd_same(pmd_a, pmd_b);
1212 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1214 if (radix_enabled())
1215 return radix__pmd_mkhuge(pmd);
1216 return hash__pmd_mkhuge(pmd);
1219 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1220 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1221 unsigned long address, pmd_t *pmdp,
1222 pmd_t entry, int dirty);
1224 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1225 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1226 unsigned long address, pmd_t *pmdp);
1228 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1229 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
1230 unsigned long addr, pmd_t *pmdp)
1232 if (radix_enabled())
1233 return radix__pmdp_huge_get_and_clear(mm, addr, pmdp);
1234 return hash__pmdp_huge_get_and_clear(mm, addr, pmdp);
1237 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
1238 unsigned long address, pmd_t *pmdp)
1240 if (radix_enabled())
1241 return radix__pmdp_collapse_flush(vma, address, pmdp);
1242 return hash__pmdp_collapse_flush(vma, address, pmdp);
1244 #define pmdp_collapse_flush pmdp_collapse_flush
1246 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
1247 pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
1249 pmd_t *pmdp, int full);
1251 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1252 static inline void pgtable_trans_huge_deposit(struct mm_struct *mm,
1253 pmd_t *pmdp, pgtable_t pgtable)
1255 if (radix_enabled())
1256 return radix__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
1257 return hash__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
1260 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1261 static inline pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm,
1264 if (radix_enabled())
1265 return radix__pgtable_trans_huge_withdraw(mm, pmdp);
1266 return hash__pgtable_trans_huge_withdraw(mm, pmdp);
1269 #define __HAVE_ARCH_PMDP_INVALIDATE
1270 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
1273 #define pmd_move_must_withdraw pmd_move_must_withdraw
1275 extern int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
1276 struct spinlock *old_pmd_ptl,
1277 struct vm_area_struct *vma);
1279 * Hash translation mode use the deposited table to store hash pte
1282 #define arch_needs_pgtable_deposit arch_needs_pgtable_deposit
1283 static inline bool arch_needs_pgtable_deposit(void)
1285 if (radix_enabled())
1289 extern void serialize_against_pte_lookup(struct mm_struct *mm);
1292 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
1294 if (radix_enabled())
1295 return radix__pmd_mkdevmap(pmd);
1296 return hash__pmd_mkdevmap(pmd);
1299 static inline int pmd_devmap(pmd_t pmd)
1301 return pte_devmap(pmd_pte(pmd));
1304 static inline int pud_devmap(pud_t pud)
1309 static inline int pgd_devmap(pgd_t pgd)
1313 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1315 static inline int pud_pfn(pud_t pud)
1318 * Currently all calls to pud_pfn() are gated around a pud_devmap()
1319 * check so this should never be used. If it grows another user we
1320 * want to know about it.
1325 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1326 pte_t ptep_modify_prot_start(struct vm_area_struct *, unsigned long, pte_t *);
1327 void ptep_modify_prot_commit(struct vm_area_struct *, unsigned long,
1328 pte_t *, pte_t, pte_t);
1331 * Returns true for a R -> RW upgrade of pte
1333 static inline bool is_pte_rw_upgrade(unsigned long old_val, unsigned long new_val)
1335 if (!(old_val & _PAGE_READ))
1338 if ((!(old_val & _PAGE_WRITE)) && (new_val & _PAGE_WRITE))
1345 * Like pmd_huge() and pmd_large(), but works regardless of config options
1347 #define pmd_is_leaf pmd_is_leaf
1348 #define pmd_leaf pmd_is_leaf
1349 static inline bool pmd_is_leaf(pmd_t pmd)
1351 return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
1354 #define pud_is_leaf pud_is_leaf
1355 #define pud_leaf pud_is_leaf
1356 static inline bool pud_is_leaf(pud_t pud)
1358 return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE));
1361 #define p4d_is_leaf p4d_is_leaf
1362 #define p4d_leaf p4d_is_leaf
1363 static inline bool p4d_is_leaf(p4d_t p4d)
1365 return !!(p4d_raw(p4d) & cpu_to_be64(_PAGE_PTE));
1368 #endif /* __ASSEMBLY__ */
1369 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */