1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com>
7 #include <linux/dma-mapping.h>
9 #include <linux/mtd/partitions.h>
10 #include <linux/sizes.h>
11 #include <linux/phy.h>
12 #include <linux/serial_8250.h>
13 #include <linux/stmmac.h>
14 #include <linux/usb/ehci_pdriver.h>
17 #include <loongson1.h>
21 /* 8250/16550 compatible UART */
22 #define LS1X_UART(_id) \
24 .mapbase = LS1X_UART ## _id ## _BASE, \
25 .irq = LS1X_UART ## _id ## _IRQ, \
27 .flags = UPF_IOREMAP | UPF_FIXED_TYPE, \
28 .type = PORT_16550A, \
31 static struct plat_serial8250_port ls1x_serial8250_pdata[] = {
39 struct platform_device ls1x_uart_pdev = {
41 .id = PLAT8250_DEV_PLATFORM,
43 .platform_data = ls1x_serial8250_pdata,
47 void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
50 struct plat_serial8250_port *p;
52 clk = clk_get(&pdev->dev, pdev->name);
54 pr_err("unable to get %s clock, err=%ld",
55 pdev->name, PTR_ERR(clk));
58 clk_prepare_enable(clk);
60 for (p = pdev->dev.platform_data; p->flags != 0; ++p)
61 p->uartclk = clk_get_rate(clk);
64 /* Synopsys Ethernet GMAC */
65 static struct stmmac_mdio_bus_data ls1x_mdio_bus_data = {
69 static struct stmmac_dma_cfg ls1x_eth_dma_cfg = {
73 int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
75 struct plat_stmmacenet_data *plat_dat = NULL;
78 val = __raw_readl(LS1X_MUX_CTRL1);
80 #if defined(CONFIG_LOONGSON1_LS1B)
81 plat_dat = dev_get_platdata(&pdev->dev);
82 if (plat_dat->bus_id) {
83 __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
84 GMAC1_USE_UART0, LS1X_MUX_CTRL0);
85 switch (plat_dat->phy_interface) {
86 case PHY_INTERFACE_MODE_RGMII:
87 val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
89 case PHY_INTERFACE_MODE_MII:
90 val |= (GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
93 pr_err("unsupported mii mode %d\n",
94 plat_dat->phy_interface);
99 switch (plat_dat->phy_interface) {
100 case PHY_INTERFACE_MODE_RGMII:
101 val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
103 case PHY_INTERFACE_MODE_MII:
104 val |= (GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
107 pr_err("unsupported mii mode %d\n",
108 plat_dat->phy_interface);
113 __raw_writel(val, LS1X_MUX_CTRL1);
114 #elif defined(CONFIG_LOONGSON1_LS1C)
115 plat_dat = dev_get_platdata(&pdev->dev);
117 val &= ~PHY_INTF_SELI;
118 if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
119 val |= 0x4 << PHY_INTF_SELI_SHIFT;
120 __raw_writel(val, LS1X_MUX_CTRL1);
122 val = __raw_readl(LS1X_MUX_CTRL0);
123 __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0);
129 static struct plat_stmmacenet_data ls1x_eth0_pdata = {
132 #if defined(CONFIG_LOONGSON1_LS1B)
133 .phy_interface = PHY_INTERFACE_MODE_MII,
134 #elif defined(CONFIG_LOONGSON1_LS1C)
135 .phy_interface = PHY_INTERFACE_MODE_RMII,
137 .mdio_bus_data = &ls1x_mdio_bus_data,
138 .dma_cfg = &ls1x_eth_dma_cfg,
141 .rx_queues_to_use = 1,
142 .tx_queues_to_use = 1,
143 .init = ls1x_eth_mux_init,
146 static struct resource ls1x_eth0_resources[] = {
148 .start = LS1X_GMAC0_BASE,
149 .end = LS1X_GMAC0_BASE + SZ_64K - 1,
150 .flags = IORESOURCE_MEM,
154 .start = LS1X_GMAC0_IRQ,
155 .flags = IORESOURCE_IRQ,
159 struct platform_device ls1x_eth0_pdev = {
162 .num_resources = ARRAY_SIZE(ls1x_eth0_resources),
163 .resource = ls1x_eth0_resources,
165 .platform_data = &ls1x_eth0_pdata,
169 #ifdef CONFIG_LOONGSON1_LS1B
170 static struct plat_stmmacenet_data ls1x_eth1_pdata = {
173 .phy_interface = PHY_INTERFACE_MODE_MII,
174 .mdio_bus_data = &ls1x_mdio_bus_data,
175 .dma_cfg = &ls1x_eth_dma_cfg,
178 .rx_queues_to_use = 1,
179 .tx_queues_to_use = 1,
180 .init = ls1x_eth_mux_init,
183 static struct resource ls1x_eth1_resources[] = {
185 .start = LS1X_GMAC1_BASE,
186 .end = LS1X_GMAC1_BASE + SZ_64K - 1,
187 .flags = IORESOURCE_MEM,
191 .start = LS1X_GMAC1_IRQ,
192 .flags = IORESOURCE_IRQ,
196 struct platform_device ls1x_eth1_pdev = {
199 .num_resources = ARRAY_SIZE(ls1x_eth1_resources),
200 .resource = ls1x_eth1_resources,
202 .platform_data = &ls1x_eth1_pdata,
205 #endif /* CONFIG_LOONGSON1_LS1B */
208 static struct resource ls1x_gpio0_resources[] = {
210 .start = LS1X_GPIO0_BASE,
211 .end = LS1X_GPIO0_BASE + SZ_4 - 1,
212 .flags = IORESOURCE_MEM,
216 struct platform_device ls1x_gpio0_pdev = {
219 .num_resources = ARRAY_SIZE(ls1x_gpio0_resources),
220 .resource = ls1x_gpio0_resources,
223 static struct resource ls1x_gpio1_resources[] = {
225 .start = LS1X_GPIO1_BASE,
226 .end = LS1X_GPIO1_BASE + SZ_4 - 1,
227 .flags = IORESOURCE_MEM,
231 struct platform_device ls1x_gpio1_pdev = {
234 .num_resources = ARRAY_SIZE(ls1x_gpio1_resources),
235 .resource = ls1x_gpio1_resources,
239 static u64 ls1x_ehci_dmamask = DMA_BIT_MASK(32);
241 static struct resource ls1x_ehci_resources[] = {
243 .start = LS1X_EHCI_BASE,
244 .end = LS1X_EHCI_BASE + SZ_32K - 1,
245 .flags = IORESOURCE_MEM,
248 .start = LS1X_EHCI_IRQ,
249 .flags = IORESOURCE_IRQ,
253 static struct usb_ehci_pdata ls1x_ehci_pdata = {
256 struct platform_device ls1x_ehci_pdev = {
257 .name = "ehci-platform",
259 .num_resources = ARRAY_SIZE(ls1x_ehci_resources),
260 .resource = ls1x_ehci_resources,
262 .dma_mask = &ls1x_ehci_dmamask,
263 .platform_data = &ls1x_ehci_pdata,
267 /* Real Time Clock */
268 void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
270 u32 val = __raw_readl(LS1X_RTC_CTRL);
272 if (!(val & RTC_EXTCLK_OK))
273 __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
276 struct platform_device ls1x_rtc_pdev = {
282 static struct resource ls1x_wdt_resources[] = {
284 .start = LS1X_WDT_BASE,
285 .end = LS1X_WDT_BASE + SZ_16 - 1,
286 .flags = IORESOURCE_MEM,
290 struct platform_device ls1x_wdt_pdev = {
293 .num_resources = ARRAY_SIZE(ls1x_wdt_resources),
294 .resource = ls1x_wdt_resources,