1 #include <asm/asm-offsets.h>
2 #include <asm/thread_info.h>
4 #define PAGE_SIZE _PAGE_SIZE
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
10 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12 #include <asm-generic/vmlinux.lds.h>
19 text PT_LOAD FLAGS(7); /* RWX */
20 #ifndef CONFIG_CAVIUM_OCTEON_SOC
21 note PT_NOTE FLAGS(4); /* R__ */
22 #endif /* CAVIUM_OCTEON_SOC */
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
29 jiffies = jiffies_64 + 4;
37 #ifdef CONFIG_BOOT_ELF64
38 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
44 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
49 /* . = 0xa800000000300000; */
50 . = 0xffffffff80300000;
52 . = VMLINUX_LOAD_ADDRESS;
54 _text = .; /* Text and read-only data */
67 _etext = .; /* End of text section */
71 /* Exception table for data bus errors */
73 __start___dbe_table = .;
75 __stop___dbe_table = .;
78 #ifdef CONFIG_CAVIUM_OCTEON_SOC
80 #else /* CONFIG_CAVIUM_OCTEON_SOC */
81 #define NOTES_HEADER :note
82 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
83 NOTES :text NOTES_HEADER
84 .dummy : { *(.dummy) } :text
86 _sdata = .; /* Start of data section */
91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
93 INIT_TASK_DATA(THREAD_SIZE)
95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
107 /* We want the small data sections together, so single-instruction offsets
108 can access them all, and initialized data all before uninitialized, so
109 we can shorten the on-disk segment size. */
113 _edata = .; /* End of data section */
115 /* will be freed after init */
116 . = ALIGN(PAGE_SIZE); /* Init code and data */
118 INIT_TEXT_SECTION(PAGE_SIZE)
119 INIT_DATA_SECTION(16)
122 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
123 __mips_machines_start = .;
124 *(.mips.machines.init)
125 __mips_machines_end = .;
128 /* .exit.text is discarded at runtime, not link time, to deal with
129 * references from .rodata
138 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141 #ifdef CONFIG_RELOCATABLE
145 _relocation_start = .;
147 * Space for relocation table
148 * This needs to be filled so that the
149 * relocs tool can overwrite the content.
150 * An invalid value is left at the start of the
151 * section to abort relocation if the table
152 * has not been filled in.
156 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
161 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
163 /* leave space for appended DTB */
165 #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
166 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
168 KEEP(*(.appended_dtb))
172 * Align to 64K in attempt to eliminate holes before the
173 * .bss..swapper_pg_dir section at the start of .bss. This
174 * also satisfies PAGE_SIZE alignment as the largest page size
179 /* freed after init ends here */
182 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
183 * gets that alignment. .sbss should be empty, so there will be
184 * no holes after __init_end. */
185 BSS_SECTION(0, 0x10000, 8)
189 /* These mark the ABI of the kernel for debuggers. */
191 KEEP(*(.mdebug.abi32))
194 KEEP(*(.mdebug.abi64))
197 /* This is the MIPS specific mdebug section. */
205 /* These must appear regardless of . */
215 /* Sections to be discarded */
218 /* ABI crap starts here */