2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
10 * Copyright (C) 2013 Imagination Technologies Ltd.
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/sched/debug.h>
15 #include <linux/sched/task.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/tick.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/export.h>
23 #include <linux/ptrace.h>
24 #include <linux/mman.h>
25 #include <linux/personality.h>
26 #include <linux/sys.h>
27 #include <linux/init.h>
28 #include <linux/completion.h>
29 #include <linux/kallsyms.h>
30 #include <linux/random.h>
31 #include <linux/prctl.h>
32 #include <linux/nmi.h>
33 #include <linux/cpu.h>
36 #include <asm/bootinfo.h>
38 #include <asm/dsemul.h>
43 #include <asm/pgtable.h>
44 #include <asm/mipsregs.h>
45 #include <asm/processor.h>
47 #include <linux/uaccess.h>
50 #include <asm/isadep.h>
52 #include <asm/stacktrace.h>
53 #include <asm/irq_regs.h>
55 #ifdef CONFIG_HOTPLUG_CPU
56 void arch_cpu_idle_dead(void)
62 asmlinkage void ret_from_fork(void);
63 asmlinkage void ret_from_kernel_thread(void);
65 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
69 /* New thread loses kernel privileges. */
70 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
72 regs->cp0_status = status;
74 clear_thread_flag(TIF_MSA_CTX_LIVE);
76 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
82 void exit_thread(struct task_struct *tsk)
85 * User threads may have allocated a delay slot emulation frame.
86 * If so, clean up that allocation.
88 if (!(current->flags & PF_KTHREAD))
89 dsemul_thread_cleanup(tsk);
92 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
95 * Save any process state which is live in hardware registers to the
96 * parent context prior to duplication. This prevents the new child
97 * state becoming stale if the parent is preempted before copy_thread()
98 * gets a chance to save the parent's live hardware registers to the
103 if (is_msa_enabled())
105 else if (is_fpu_owner())
117 * Copy architecture-specific thread state
119 int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
120 unsigned long kthread_arg, struct task_struct *p, unsigned long tls)
122 struct thread_info *ti = task_thread_info(p);
123 struct pt_regs *childregs, *regs = current_pt_regs();
124 unsigned long childksp;
126 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
128 /* set up new TSS. */
129 childregs = (struct pt_regs *) childksp - 1;
130 /* Put the stack after the struct pt_regs. */
131 childksp = (unsigned long) childregs;
132 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
133 if (unlikely(p->flags & PF_KTHREAD)) {
135 unsigned long status = p->thread.cp0_status;
136 memset(childregs, 0, sizeof(struct pt_regs));
137 ti->addr_limit = KERNEL_DS;
138 p->thread.reg16 = usp; /* fn */
139 p->thread.reg17 = kthread_arg;
140 p->thread.reg29 = childksp;
141 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
142 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
143 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
144 ((status & (ST0_KUC | ST0_IEC)) << 2);
148 childregs->cp0_status = status;
154 childregs->regs[7] = 0; /* Clear error flag */
155 childregs->regs[2] = 0; /* Child gets zero as return value */
157 childregs->regs[29] = usp;
158 ti->addr_limit = USER_DS;
160 p->thread.reg29 = (unsigned long) childregs;
161 p->thread.reg31 = (unsigned long) ret_from_fork;
164 * New tasks lose permission to use the fpu. This accelerates context
165 * switching for most programs since they don't use the fpu.
167 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
169 clear_tsk_thread_flag(p, TIF_USEDFPU);
170 clear_tsk_thread_flag(p, TIF_USEDMSA);
171 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
173 #ifdef CONFIG_MIPS_MT_FPAFF
174 clear_tsk_thread_flag(p, TIF_FPUBOUND);
175 #endif /* CONFIG_MIPS_MT_FPAFF */
177 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
179 if (clone_flags & CLONE_SETTLS)
185 #ifdef CONFIG_STACKPROTECTOR
186 #include <linux/stackprotector.h>
187 unsigned long __stack_chk_guard __read_mostly;
188 EXPORT_SYMBOL(__stack_chk_guard);
191 struct mips_frame_info {
193 unsigned long func_size;
198 #define J_TARGET(pc,target) \
199 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
201 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
203 #ifdef CONFIG_CPU_MICROMIPS
206 * swm16 reglist,offset(sp)
207 * swm32 reglist,offset(sp)
209 * jradiussp - NOT SUPPORTED
211 * microMIPS is way more fun...
213 if (mm_insn_16bit(ip->word >> 16)) {
214 switch (ip->mm16_r5_format.opcode) {
216 if (ip->mm16_r5_format.rt != 31)
219 *poff = ip->mm16_r5_format.imm;
220 *poff = (*poff << 2) / sizeof(ulong);
224 switch (ip->mm16_m_format.func) {
226 *poff = ip->mm16_m_format.imm;
227 *poff += 1 + ip->mm16_m_format.rlist;
228 *poff = (*poff << 2) / sizeof(ulong);
240 switch (ip->i_format.opcode) {
242 if (ip->i_format.rs != 29)
244 if (ip->i_format.rt != 31)
247 *poff = ip->i_format.simmediate / sizeof(ulong);
251 switch (ip->mm_m_format.func) {
253 if (ip->mm_m_format.rd < 0x10)
255 if (ip->mm_m_format.base != 29)
258 *poff = ip->mm_m_format.simmediate;
259 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
260 *poff /= sizeof(ulong);
270 /* sw / sd $ra, offset($sp) */
271 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
272 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
273 *poff = ip->i_format.simmediate / sizeof(ulong);
281 static inline int is_jump_ins(union mips_instruction *ip)
283 #ifdef CONFIG_CPU_MICROMIPS
285 * jr16,jrc,jalr16,jalr16
287 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
288 * jraddiusp - NOT SUPPORTED
290 * microMIPS is kind of more fun...
292 if (mm_insn_16bit(ip->word >> 16)) {
293 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
294 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
299 if (ip->j_format.opcode == mm_j32_op)
301 if (ip->j_format.opcode == mm_jal32_op)
303 if (ip->r_format.opcode != mm_pool32a_op ||
304 ip->r_format.func != mm_pool32axf_op)
306 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
308 if (ip->j_format.opcode == j_op)
310 if (ip->j_format.opcode == jal_op)
312 if (ip->r_format.opcode != spec_op)
314 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
318 static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size)
320 #ifdef CONFIG_CPU_MICROMIPS
327 * jradiussp - NOT SUPPORTED
329 * microMIPS is not more fun...
331 if (mm_insn_16bit(ip->word >> 16)) {
332 if (ip->mm16_r3_format.opcode == mm_pool16d_op &&
333 ip->mm16_r3_format.simmediate & mm_addiusp_func) {
334 tmp = ip->mm_b0_format.simmediate >> 1;
335 tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100;
336 if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */
338 *frame_size = -(signed short)(tmp << 2);
341 if (ip->mm16_r5_format.opcode == mm_pool16d_op &&
342 ip->mm16_r5_format.rt == 29) {
343 tmp = ip->mm16_r5_format.imm >> 1;
344 *frame_size = -(signed short)(tmp & 0xf);
350 if (ip->mm_i_format.opcode == mm_addiu32_op &&
351 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
352 *frame_size = -ip->i_format.simmediate;
356 /* addiu/daddiu sp,sp,-imm */
357 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
360 if (ip->i_format.opcode == addiu_op ||
361 ip->i_format.opcode == daddiu_op) {
362 *frame_size = -ip->i_format.simmediate;
369 static int get_frame_info(struct mips_frame_info *info)
371 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
372 union mips_instruction insn, *ip, *ip_end;
373 const unsigned int max_insns = 128;
374 unsigned int last_insn_size = 0;
376 bool saw_jump = false;
378 info->pc_offset = -1;
379 info->frame_size = 0;
381 ip = (void *)msk_isa16_mode((ulong)info->func);
385 ip_end = (void *)ip + info->func_size;
387 for (i = 0; i < max_insns && ip < ip_end; i++) {
388 ip = (void *)ip + last_insn_size;
389 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
390 insn.word = ip->halfword[0] << 16;
392 } else if (is_mmips) {
393 insn.word = ip->halfword[0] << 16 | ip->halfword[1];
396 insn.word = ip->word;
400 if (!info->frame_size) {
401 is_sp_move_ins(&insn, &info->frame_size);
403 } else if (!saw_jump && is_jump_ins(ip)) {
405 * If we see a jump instruction, we are finished
406 * with the frame save.
408 * Some functions can have a shortcut return at
409 * the beginning of the function, so don't start
410 * looking for jump instruction until we see the
413 * The RA save instruction can get put into the
414 * delay slot of the jump instruction, so look
415 * at the next instruction, too.
420 if (info->pc_offset == -1 &&
421 is_ra_save_ins(&insn, &info->pc_offset))
426 if (info->frame_size && info->pc_offset >= 0) /* nested */
428 if (info->pc_offset < 0) /* leaf */
430 /* prologue seems bogus... */
435 static struct mips_frame_info schedule_mfi __read_mostly;
437 #ifdef CONFIG_KALLSYMS
438 static unsigned long get___schedule_addr(void)
440 return kallsyms_lookup_name("__schedule");
443 static unsigned long get___schedule_addr(void)
445 union mips_instruction *ip = (void *)schedule;
449 for (i = 0; i < max_insns; i++, ip++) {
450 if (ip->j_format.opcode == j_op)
451 return J_TARGET(ip, ip->j_format.target);
457 static int __init frame_info_init(void)
459 unsigned long size = 0;
460 #ifdef CONFIG_KALLSYMS
465 addr = get___schedule_addr();
467 addr = (unsigned long)schedule;
469 #ifdef CONFIG_KALLSYMS
470 kallsyms_lookup_size_offset(addr, &size, &ofs);
472 schedule_mfi.func = (void *)addr;
473 schedule_mfi.func_size = size;
475 get_frame_info(&schedule_mfi);
478 * Without schedule() frame info, result given by
479 * thread_saved_pc() and get_wchan() are not reliable.
481 if (schedule_mfi.pc_offset < 0)
482 printk("Can't analyze schedule() prologue at %p\n", schedule);
487 arch_initcall(frame_info_init);
490 * Return saved PC of a blocked thread.
492 static unsigned long thread_saved_pc(struct task_struct *tsk)
494 struct thread_struct *t = &tsk->thread;
496 /* New born processes are a special case */
497 if (t->reg31 == (unsigned long) ret_from_fork)
499 if (schedule_mfi.pc_offset < 0)
501 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
505 #ifdef CONFIG_KALLSYMS
506 /* generic stack unwinding function */
507 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
512 unsigned long low, high, irq_stack_high;
513 struct mips_frame_info info;
514 unsigned long size, ofs;
515 struct pt_regs *regs;
522 * IRQ stacks start at IRQ_STACK_START
523 * task stacks at THREAD_SIZE - 32
526 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
527 high = stack_page + IRQ_STACK_START;
528 irq_stack_high = high;
530 high = stack_page + THREAD_SIZE - 32;
535 * If we reached the top of the interrupt stack, start unwinding
536 * the interrupted task stack.
538 if (unlikely(*sp == irq_stack_high)) {
539 unsigned long task_sp = *(unsigned long *)*sp;
542 * Check that the pointer saved in the IRQ stack head points to
543 * something within the stack of the current task
545 if (!object_is_on_stack((void *)task_sp))
549 * Follow pointer to tasks kernel stack frame where interrupted
552 regs = (struct pt_regs *)task_sp;
554 if (!user_mode(regs) && __kernel_text_address(pc)) {
555 *sp = regs->regs[29];
556 *ra = regs->regs[31];
561 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
564 * Return ra if an exception occurred at the first instruction
566 if (unlikely(ofs == 0)) {
572 info.func = (void *)(pc - ofs);
573 info.func_size = ofs; /* analyze from start to ofs */
574 leaf = get_frame_info(&info);
578 if (*sp < low || *sp + info.frame_size > high)
583 * For some extreme cases, get_frame_info() can
584 * consider wrongly a nested function as a leaf
585 * one. In that cases avoid to return always the
588 pc = pc != *ra ? *ra : 0;
590 pc = ((unsigned long *)(*sp))[info.pc_offset];
592 *sp += info.frame_size;
594 return __kernel_text_address(pc) ? pc : 0;
596 EXPORT_SYMBOL(unwind_stack_by_address);
598 /* used by show_backtrace() */
599 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
600 unsigned long pc, unsigned long *ra)
602 unsigned long stack_page = 0;
605 for_each_possible_cpu(cpu) {
606 if (on_irq_stack(cpu, *sp)) {
607 stack_page = (unsigned long)irq_stack[cpu];
613 stack_page = (unsigned long)task_stack_page(task);
615 return unwind_stack_by_address(stack_page, sp, pc, ra);
620 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
622 unsigned long get_wchan(struct task_struct *task)
624 unsigned long pc = 0;
625 #ifdef CONFIG_KALLSYMS
627 unsigned long ra = 0;
630 if (!task || task == current || task->state == TASK_RUNNING)
632 if (!task_stack_page(task))
635 pc = thread_saved_pc(task);
637 #ifdef CONFIG_KALLSYMS
638 sp = task->thread.reg29 + schedule_mfi.frame_size;
640 while (in_sched_functions(pc))
641 pc = unwind_stack(task, &sp, pc, &ra);
649 * Don't forget that the stack pointer must be aligned on a 8 bytes
650 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
652 unsigned long arch_align_stack(unsigned long sp)
654 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
655 sp -= get_random_int() & ~PAGE_MASK;
660 static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
661 static struct cpumask backtrace_csd_busy;
663 static void handle_backtrace(void *info)
665 nmi_cpu_backtrace(get_irq_regs());
666 cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
669 static void raise_backtrace(cpumask_t *mask)
671 call_single_data_t *csd;
674 for_each_cpu(cpu, mask) {
676 * If we previously sent an IPI to the target CPU & it hasn't
677 * cleared its bit in the busy cpumask then it didn't handle
678 * our previous IPI & it's not safe for us to reuse the
679 * call_single_data_t.
681 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
682 pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
687 csd = &per_cpu(backtrace_csd, cpu);
688 csd->func = handle_backtrace;
689 smp_call_function_single_async(cpu, csd);
693 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
695 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
698 int mips_get_process_fp_mode(struct task_struct *task)
702 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
703 value |= PR_FP_MODE_FR;
704 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
705 value |= PR_FP_MODE_FRE;
710 static long prepare_for_fp_mode_switch(void *unused)
713 * This is icky, but we use this to simply ensure that all CPUs have
714 * context switched, regardless of whether they were previously running
715 * kernel or user code. This ensures that no CPU currently has its FPU
716 * enabled, or is about to attempt to enable it through any path other
717 * than enable_restore_fp_context() which will wait appropriately for
718 * fp_mode_switching to be zero.
723 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
725 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
726 struct task_struct *t;
727 struct cpumask process_cpus;
730 /* If nothing to change, return right away, successfully. */
731 if (value == mips_get_process_fp_mode(task))
734 /* Only accept a mode change if 64-bit FP enabled for o32. */
735 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
738 /* And only for o32 tasks. */
739 if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
742 /* Check the value is valid */
743 if (value & ~known_bits)
746 /* Setting FRE without FR is not supported. */
747 if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
750 /* Avoid inadvertently triggering emulation */
751 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
752 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
754 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
757 /* FR = 0 not supported in MIPS R6 */
758 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
761 /* Indicate the new FP mode in each thread */
762 for_each_thread(task, t) {
763 /* Update desired FP register width */
764 if (value & PR_FP_MODE_FR) {
765 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
767 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
768 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
771 /* Update desired FP single layout */
772 if (value & PR_FP_MODE_FRE)
773 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
775 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
779 * We need to ensure that all threads in the process have switched mode
780 * before returning, in order to allow userland to not worry about
781 * races. We can do this by forcing all CPUs that any thread in the
782 * process may be running on to schedule something else - in this case
783 * prepare_for_fp_mode_switch().
785 * We begin by generating a mask of all CPUs that any thread in the
786 * process may be running on.
788 cpumask_clear(&process_cpus);
789 for_each_thread(task, t)
790 cpumask_set_cpu(task_cpu(t), &process_cpus);
793 * Now we schedule prepare_for_fp_mode_switch() on each of those CPUs.
795 * The CPUs may have rescheduled already since we switched mode or
796 * generated the cpumask, but that doesn't matter. If the task in this
797 * process is scheduled out then our scheduling
798 * prepare_for_fp_mode_switch() will simply be redundant. If it's
799 * scheduled in then it will already have picked up the new FP mode
803 for_each_cpu_and(cpu, &process_cpus, cpu_online_mask)
804 work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL);
807 wake_up_var(&task->mm->context.fp_mode_switching);
812 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
813 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
817 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
818 /* k0/k1 are copied as zero. */
819 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
822 uregs[i] = regs->regs[i - MIPS32_EF_R0];
825 uregs[MIPS32_EF_LO] = regs->lo;
826 uregs[MIPS32_EF_HI] = regs->hi;
827 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
828 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
829 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
830 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
832 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
835 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
839 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
840 /* k0/k1 are copied as zero. */
841 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
844 uregs[i] = regs->regs[i - MIPS64_EF_R0];
847 uregs[MIPS64_EF_LO] = regs->lo;
848 uregs[MIPS64_EF_HI] = regs->hi;
849 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
850 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
851 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
852 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
854 #endif /* CONFIG_64BIT */