arch/mips/jz4740/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
   4  *  Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
   5  *  JZ4740 setup code
   6  */
   7
   8 #include <linux/clk-provider.h>
   9 #include <linux/clocksource.h>
  10 #include <linux/init.h>
  11 #include <linux/io.h>
  12 #include <linux/irqchip.h>
  13 #include <linux/kernel.h>
  14 #include <linux/libfdt.h>
  15 #include <linux/of_fdt.h>
  16 #include <linux/pm.h>
  17 #include <linux/suspend.h>
  18
  19 #include <asm/bootinfo.h>
  20 #include <asm/fw/fw.h>
  21 #include <asm/prom.h>
  22 #include <asm/reboot.h>
  23
  24 #define JZ4740_EMC_BASE_ADDR 0x13010000
  25
  26 #define JZ4740_EMC_SDRAM_CTRL 0x80
  27
  28 static void __init jz4740_detect_mem(void)
  29 {
  30         void __iomem *jz_emc_base;
  31         u32 ctrl, bus, bank, rows, cols;
  32         phys_addr_t size;
  33
  34         jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
  35         ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
  36         bus = 2 - ((ctrl >> 31) & 1);
  37         bank = 1 + ((ctrl >> 19) & 1);
  38         cols = 8 + ((ctrl >> 26) & 7);
  39         rows = 11 + ((ctrl >> 20) & 3);
  40         printk(KERN_DEBUG
  41                 "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
  42                 bus, bank, rows, cols);
  43         iounmap(jz_emc_base);
  44
  45         size = 1 << (bus + bank + cols + rows);
  46         add_memory_region(0, size, BOOT_MEM_RAM);
  47 }
  48
  49 static unsigned long __init get_board_mach_type(const void *fdt)
  50 {
  51         if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1830"))
  52                 return MACH_INGENIC_X1830;
  53         if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1000"))
  54                 return MACH_INGENIC_X1000;
  55         if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4780"))
  56                 return MACH_INGENIC_JZ4780;
  57         if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4770"))
  58                 return MACH_INGENIC_JZ4770;
  59
  60         return MACH_INGENIC_JZ4740;
  61 }
  62
  63 void __init plat_mem_setup(void)
  64 {
  65         int offset;
  66         void *dtb;
  67
  68         if (__dtb_start != __dtb_end)
  69                 dtb = __dtb_start;
  70         else
  71                 dtb = (void *)fw_passed_dtb;
  72
  73         __dt_setup_arch(dtb);
  74
  75         offset = fdt_path_offset(dtb, "/memory");
  76         if (offset < 0)
  77                 jz4740_detect_mem();
  78
  79         mips_machtype = get_board_mach_type(dtb);
  80 }
  81
  82 void __init device_tree_init(void)
  83 {
  84         if (!initial_boot_params)
  85                 return;
  86
  87         unflatten_and_copy_device_tree();
  88 }
  89
  90 const char *get_system_type(void)
  91 {
  92         switch (mips_machtype) {
  93         case MACH_INGENIC_X1830:
  94                 return "X1830";
  95         case MACH_INGENIC_X1000:
  96                 return "X1000";
  97         case MACH_INGENIC_JZ4780:
  98                 return "JZ4780";
  99         case MACH_INGENIC_JZ4770:
 100                 return "JZ4770";
 101         default:
 102                 return "JZ4740";
 103         }
 104 }
 105
 106 void __init arch_init_irq(void)
 107 {
 108         irqchip_init();
 109 }
 110
 111 void __init plat_time_init(void)
 112 {
 113         of_clk_init(NULL);
 114         timer_probe();
 115 }
 116
 117 void __init prom_init(void)
 118 {
 119         fw_init_cmdline();
 120 }
 121
 122 void __init prom_free_prom_memory(void)
 123 {
 124 }
 125
 126 static void jz4740_wait_instr(void)
 127 {
 128         __asm__(".set push;\n"
 129                 ".set mips3;\n"
 130                 "wait;\n"
 131                 ".set pop;\n"
 132         );
 133 }
 134
 135 static void jz4740_halt(void)
 136 {
 137         for (;;)
 138                 jz4740_wait_instr();
 139 }
 140
 141 static int __maybe_unused jz4740_pm_enter(suspend_state_t state)
 142 {
 143         jz4740_wait_instr();
 144
 145         return 0;
 146 }
 147
 148 static const struct platform_suspend_ops jz4740_pm_ops __maybe_unused = {
 149         .valid = suspend_valid_only_mem,
 150         .enter = jz4740_pm_enter,
 151 };
 152
 153 static int __init jz4740_pm_init(void)
 154 {
 155         if (IS_ENABLED(CONFIG_PM_SLEEP))
 156                 suspend_set_ops(&jz4740_pm_ops);
 157         _machine_halt = jz4740_halt;
 158
 159         return 0;
 160
 161 }
 162 late_initcall(jz4740_pm_init);