2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
14 * This file essentially defines the interface between board
15 * specific PCI code and MIPS common PCI code. Should potentially put
16 * into include/asm/pci.h file.
19 #include <linux/ioport.h>
20 #include <linux/list.h>
23 #ifdef CONFIG_PCI_DRIVERS_LEGACY
26 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
27 * multiple PCI channels may have multiple PCI host controllers or a
28 * single controller supporting multiple channels.
30 struct pci_controller {
31 struct list_head list;
33 struct device_node *of_node;
35 struct pci_ops *pci_ops;
36 struct resource *mem_resource;
37 unsigned long mem_offset;
38 struct resource *io_resource;
39 unsigned long io_offset;
40 unsigned long io_map_base;
41 struct resource *busn_resource;
42 unsigned long busn_offset;
44 #ifndef CONFIG_PCI_DOMAINS_GENERIC
46 /* For compatibility with current (as of July 2003) pciutils
47 and XFree86. Eventually will be removed. */
48 unsigned int need_domain_info;
51 /* Optional access methods for reading/writing the bus number
52 of the PCI controller */
53 int (*get_busno)(void);
54 void (*set_busno)(int busno);
58 * Used by boards to register their PCI busses before the actual scanning.
60 extern void register_pci_controller(struct pci_controller *hose);
63 * board supplied pci irq fixup routine
65 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
67 /* Do platform specific device initialization at pci_enable_device() time */
68 extern int pcibios_plat_dev_init(struct pci_dev *dev);
70 extern char * (*pcibios_plat_setup)(char *str);
73 /* this function parses memory ranges from a device node */
74 extern void pci_load_of_ranges(struct pci_controller *hose,
75 struct device_node *node);
77 static inline void pci_load_of_ranges(struct pci_controller *hose,
78 struct device_node *node) {}
81 #ifdef CONFIG_PCI_DOMAINS_GENERIC
82 static inline void set_pci_need_domain_info(struct pci_controller *hose,
87 #elif defined(CONFIG_PCI_DOMAINS)
88 static inline void set_pci_need_domain_info(struct pci_controller *hose,
91 hose->need_domain_info = need_domain_info;
93 #endif /* CONFIG_PCI_DOMAINS */
97 /* Can be used to override the logic in pci_scan_bus for skipping
98 already-configured bus numbers - to be used for buggy BIOSes
99 or architectures with incomplete PCI setup by the loader */
100 static inline unsigned int pcibios_assign_all_busses(void)
105 extern unsigned long PCIBIOS_MIN_IO;
106 extern unsigned long PCIBIOS_MIN_MEM;
108 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
110 extern void pcibios_set_master(struct pci_dev *dev);
112 #define HAVE_PCI_MMAP
114 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
117 * Dynamic DMA mapping stuff.
118 * MIPS has everything mapped statically.
121 #include <linux/types.h>
122 #include <linux/slab.h>
123 #include <linux/scatterlist.h>
124 #include <linux/string.h>
130 * The PCI address space does equal the physical memory address space.
131 * The networking and block device layers use this boolean for bounce
134 #define PCI_DMA_BUS_IS_PHYS (1)
136 #ifdef CONFIG_PCI_DOMAINS_GENERIC
137 static inline int pci_proc_domain(struct pci_bus *bus)
139 return pci_domain_nr(bus);
141 #elif defined(CONFIG_PCI_DOMAINS)
142 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
144 static inline int pci_proc_domain(struct pci_bus *bus)
146 struct pci_controller *hose = bus->sysdata;
147 return hose->need_domain_info;
149 #endif /* CONFIG_PCI_DOMAINS */
151 #endif /* __KERNEL__ */
153 /* Do platform specific device initialization at pci_enable_device() time */
154 extern int pcibios_plat_dev_init(struct pci_dev *dev);
156 /* Chances are this interrupt is wired PC-style ... */
157 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
159 return channel ? 15 : 14;
162 #endif /* _ASM_PCI_H */