io_uring: fix provided buffer import
[linux-2.6-microblaze.git] / arch / mips / boot / dts / ingenic / x1000.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h>
5
6 / {
7         #address-cells = <1>;
8         #size-cells = <1>;
9         compatible = "ingenic,x1000", "ingenic,x1000e";
10
11         cpus {
12                 #address-cells = <1>;
13                 #size-cells = <0>;
14
15                 cpu0: cpu@0 {
16                         device_type = "cpu";
17                         compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18                         reg = <0>;
19
20                         clocks = <&cgu X1000_CLK_CPU>;
21                         clock-names = "cpu";
22                 };
23         };
24
25         cpuintc: interrupt-controller {
26                 #address-cells = <0>;
27                 #interrupt-cells = <1>;
28                 interrupt-controller;
29                 compatible = "mti,cpu-interrupt-controller";
30         };
31
32         intc: interrupt-controller@10001000 {
33                 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
34                 reg = <0x10001000 0x50>;
35
36                 interrupt-controller;
37                 #interrupt-cells = <1>;
38
39                 interrupt-parent = <&cpuintc>;
40                 interrupts = <2>;
41         };
42
43         exclk: ext {
44                 compatible = "fixed-clock";
45                 #clock-cells = <0>;
46         };
47
48         rtclk: rtc {
49                 compatible = "fixed-clock";
50                 #clock-cells = <0>;
51                 clock-frequency = <32768>;
52         };
53
54         cgu: x1000-cgu@10000000 {
55                 compatible = "ingenic,x1000-cgu", "simple-mfd";
56                 reg = <0x10000000 0x100>;
57                 #address-cells = <1>;
58                 #size-cells = <1>;
59                 ranges = <0x0 0x10000000 0x100>;
60
61                 #clock-cells = <1>;
62
63                 clocks = <&exclk>, <&rtclk>;
64                 clock-names = "ext", "rtc";
65
66                 otg_phy: usb-phy@3c {
67                         compatible = "ingenic,x1000-phy";
68                         reg = <0x3c 0x10>;
69
70                         clocks = <&cgu X1000_CLK_OTGPHY>;
71
72                         #phy-cells = <0>;
73
74                         status = "disabled";
75                 };
76
77                 rng: rng@d8 {
78                         compatible = "ingenic,x1000-rng";
79                         reg = <0xd8 0x8>;
80
81                         status = "disabled";
82                 };
83
84                 mac_phy_ctrl: mac-phy-ctrl@e8 {
85                         compatible = "syscon";
86                         reg = <0xe8 0x4>;
87                 };
88         };
89
90         ost: timer@12000000 {
91                 compatible = "ingenic,x1000-ost";
92                 reg = <0x12000000 0x3c>;
93
94                 #clock-cells = <1>;
95
96                 clocks = <&cgu X1000_CLK_OST>;
97                 clock-names = "ost";
98
99                 interrupt-parent = <&cpuintc>;
100                 interrupts = <3>;
101         };
102
103         tcu: timer@10002000 {
104                 compatible = "ingenic,x1000-tcu", "simple-mfd";
105                 reg = <0x10002000 0x1000>;
106                 #address-cells = <1>;
107                 #size-cells = <1>;
108                 ranges = <0x0 0x10002000 0x1000>;
109
110                 #clock-cells = <1>;
111
112                 clocks = <&cgu X1000_CLK_RTCLK>,
113                          <&cgu X1000_CLK_EXCLK>,
114                          <&cgu X1000_CLK_PCLK>;
115                 clock-names = "rtc", "ext", "pclk";
116
117                 interrupt-controller;
118                 #interrupt-cells = <1>;
119
120                 interrupt-parent = <&intc>;
121                 interrupts = <27 26 25>;
122
123                 wdt: watchdog@0 {
124                         compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
125                         reg = <0x0 0x10>;
126
127                         clocks = <&tcu TCU_CLK_WDT>;
128                         clock-names = "wdt";
129                 };
130
131                 pwm: pwm@40 {
132                         compatible = "ingenic,x1000-pwm";
133                         reg = <0x40 0x50>;
134
135                         #pwm-cells = <3>;
136
137                         clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
138                                  <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
139                                  <&tcu TCU_CLK_TIMER4>;
140                         clock-names = "timer0", "timer1", "timer2", "timer3", "timer4";
141                 };
142         };
143
144         rtc: rtc@10003000 {
145                 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
146                 reg = <0x10003000 0x4c>;
147
148                 interrupt-parent = <&intc>;
149                 interrupts = <32>;
150
151                 clocks = <&cgu X1000_CLK_RTCLK>;
152                 clock-names = "rtc";
153         };
154
155         pinctrl: pin-controller@10010000 {
156                 compatible = "ingenic,x1000-pinctrl";
157                 reg = <0x10010000 0x800>;
158                 #address-cells = <1>;
159                 #size-cells = <0>;
160
161                 gpa: gpio@0 {
162                         compatible = "ingenic,x1000-gpio";
163                         reg = <0>;
164
165                         gpio-controller;
166                         gpio-ranges = <&pinctrl 0 0 32>;
167                         #gpio-cells = <2>;
168
169                         interrupt-controller;
170                         #interrupt-cells = <2>;
171
172                         interrupt-parent = <&intc>;
173                         interrupts = <17>;
174                 };
175
176                 gpb: gpio@1 {
177                         compatible = "ingenic,x1000-gpio";
178                         reg = <1>;
179
180                         gpio-controller;
181                         gpio-ranges = <&pinctrl 0 32 32>;
182                         #gpio-cells = <2>;
183
184                         interrupt-controller;
185                         #interrupt-cells = <2>;
186
187                         interrupt-parent = <&intc>;
188                         interrupts = <16>;
189                 };
190
191                 gpc: gpio@2 {
192                         compatible = "ingenic,x1000-gpio";
193                         reg = <2>;
194
195                         gpio-controller;
196                         gpio-ranges = <&pinctrl 0 64 32>;
197                         #gpio-cells = <2>;
198
199                         interrupt-controller;
200                         #interrupt-cells = <2>;
201
202                         interrupt-parent = <&intc>;
203                         interrupts = <15>;
204                 };
205
206                 gpd: gpio@3 {
207                         compatible = "ingenic,x1000-gpio";
208                         reg = <3>;
209
210                         gpio-controller;
211                         gpio-ranges = <&pinctrl 0 96 32>;
212                         #gpio-cells = <2>;
213
214                         interrupt-controller;
215                         #interrupt-cells = <2>;
216
217                         interrupt-parent = <&intc>;
218                         interrupts = <14>;
219                 };
220         };
221
222         uart0: serial@10030000 {
223                 compatible = "ingenic,x1000-uart";
224                 reg = <0x10030000 0x100>;
225
226                 interrupt-parent = <&intc>;
227                 interrupts = <51>;
228
229                 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
230                 clock-names = "baud", "module";
231
232                 status = "disabled";
233         };
234
235         uart1: serial@10031000 {
236                 compatible = "ingenic,x1000-uart";
237                 reg = <0x10031000 0x100>;
238
239                 interrupt-parent = <&intc>;
240                 interrupts = <50>;
241
242                 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
243                 clock-names = "baud", "module";
244
245                 status = "disabled";
246         };
247
248         uart2: serial@10032000 {
249                 compatible = "ingenic,x1000-uart";
250                 reg = <0x10032000 0x100>;
251
252                 interrupt-parent = <&intc>;
253                 interrupts = <49>;
254
255                 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
256                 clock-names = "baud", "module";
257
258                 status = "disabled";
259         };
260
261         ssi: spi@10043000 {
262                 compatible = "ingenic,x1000-spi";
263                 reg = <0x10043000 0x20>;
264                 #address-cells = <1>;
265                 #size-cells = <0>;
266
267                 interrupt-parent = <&intc>;
268                 interrupts = <8>;
269
270                 clocks = <&cgu X1000_CLK_SSI>;
271                 clock-names = "spi";
272
273                 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
274                            <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
275                 dma-names = "rx", "tx";
276
277                 status = "disabled";
278         };
279
280         i2c0: i2c-controller@10050000 {
281                 compatible = "ingenic,x1000-i2c";
282                 reg = <0x10050000 0x1000>;
283                 #address-cells = <1>;
284                 #size-cells = <0>;
285
286                 interrupt-parent = <&intc>;
287                 interrupts = <60>;
288
289                 clocks = <&cgu X1000_CLK_I2C0>;
290
291                 status = "disabled";
292         };
293
294         i2c1: i2c-controller@10051000 {
295                 compatible = "ingenic,x1000-i2c";
296                 reg = <0x10051000 0x1000>;
297                 #address-cells = <1>;
298                 #size-cells = <0>;
299
300                 interrupt-parent = <&intc>;
301                 interrupts = <59>;
302
303                 clocks = <&cgu X1000_CLK_I2C1>;
304
305                 status = "disabled";
306         };
307
308         i2c2: i2c-controller@10052000 {
309                 compatible = "ingenic,x1000-i2c";
310                 reg = <0x10052000 0x1000>;
311                 #address-cells = <1>;
312                 #size-cells = <0>;
313
314                 interrupt-parent = <&intc>;
315                 interrupts = <58>;
316
317                 clocks = <&cgu X1000_CLK_I2C2>;
318
319                 status = "disabled";
320         };
321
322         pdma: dma-controller@13420000 {
323                 compatible = "ingenic,x1000-dma";
324                 reg = <0x13420000 0x400>, <0x13421000 0x40>;
325
326                 #dma-cells = <2>;
327
328                 interrupt-parent = <&intc>;
329                 interrupts = <10>;
330
331                 clocks = <&cgu X1000_CLK_PDMA>;
332         };
333
334         msc0: mmc@13450000 {
335                 compatible = "ingenic,x1000-mmc";
336                 reg = <0x13450000 0x1000>;
337
338                 interrupt-parent = <&intc>;
339                 interrupts = <37>;
340
341                 clocks = <&cgu X1000_CLK_MSC0>;
342                 clock-names = "mmc";
343
344                 cap-sd-highspeed;
345                 cap-mmc-highspeed;
346                 cap-sdio-irq;
347
348                 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
349                            <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
350                 dma-names = "rx", "tx";
351
352                 status = "disabled";
353         };
354
355         msc1: mmc@13460000 {
356                 compatible = "ingenic,x1000-mmc";
357                 reg = <0x13460000 0x1000>;
358
359                 interrupt-parent = <&intc>;
360                 interrupts = <36>;
361
362                 clocks = <&cgu X1000_CLK_MSC1>;
363                 clock-names = "mmc";
364
365                 cap-sd-highspeed;
366                 cap-mmc-highspeed;
367                 cap-sdio-irq;
368
369                 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
370                            <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
371                 dma-names = "rx", "tx";
372
373                 status = "disabled";
374         };
375
376         mac: ethernet@134b0000 {
377                 compatible = "ingenic,x1000-mac", "snps,dwmac";
378                 reg = <0x134b0000 0x2000>;
379
380                 interrupt-parent = <&intc>;
381                 interrupts = <55>;
382                 interrupt-names = "macirq";
383
384                 clocks = <&cgu X1000_CLK_MAC>;
385                 clock-names = "stmmaceth";
386
387                 mode-reg = <&mac_phy_ctrl>;
388
389                 status = "disabled";
390
391                 mdio: mdio {
392                         compatible = "snps,dwmac-mdio";
393                         #address-cells = <1>;
394                         #size-cells = <0>;
395
396                         status = "disabled";
397                 };
398         };
399
400         otg: usb@13500000 {
401                 compatible = "ingenic,x1000-otg";
402                 reg = <0x13500000 0x40000>;
403
404                 interrupt-parent = <&intc>;
405                 interrupts = <21>;
406
407                 clocks = <&cgu X1000_CLK_OTG>;
408                 clock-names = "otg";
409
410                 phys = <&otg_phy>;
411                 phy-names = "usb2-phy";
412
413                 g-rx-fifo-size = <768>;
414                 g-np-tx-fifo-size = <256>;
415                 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
416
417                 status = "disabled";
418         };
419 };