1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4740-cgu.h>
7 compatible = "ingenic,jz4740";
9 cpuintc: interrupt-controller {
11 #interrupt-cells = <1>;
13 compatible = "mti,cpu-interrupt-controller";
16 intc: interrupt-controller@10001000 {
17 compatible = "ingenic,jz4740-intc";
18 reg = <0x10001000 0x14>;
21 #interrupt-cells = <1>;
23 interrupt-parent = <&cpuintc>;
28 compatible = "fixed-clock";
33 compatible = "fixed-clock";
35 clock-frequency = <32768>;
38 cgu: jz4740-cgu@10000000 {
39 compatible = "ingenic,jz4740-cgu";
40 reg = <0x10000000 0x100>;
42 clocks = <&ext>, <&rtc>;
43 clock-names = "ext", "rtc";
48 watchdog: watchdog@10002000 {
49 compatible = "ingenic,jz4740-watchdog";
50 reg = <0x10002000 0x10>;
52 clocks = <&cgu JZ4740_CLK_RTC>;
56 rtc_dev: rtc@10003000 {
57 compatible = "ingenic,jz4740-rtc";
58 reg = <0x10003000 0x40>;
60 interrupt-parent = <&intc>;
63 clocks = <&cgu JZ4740_CLK_RTC>;
67 pinctrl: pin-controller@10010000 {
68 compatible = "ingenic,jz4740-pinctrl";
69 reg = <0x10010000 0x400>;
75 compatible = "ingenic,jz4740-gpio";
79 gpio-ranges = <&pinctrl 0 0 32>;
83 #interrupt-cells = <2>;
85 interrupt-parent = <&intc>;
90 compatible = "ingenic,jz4740-gpio";
94 gpio-ranges = <&pinctrl 0 32 32>;
98 #interrupt-cells = <2>;
100 interrupt-parent = <&intc>;
105 compatible = "ingenic,jz4740-gpio";
109 gpio-ranges = <&pinctrl 0 64 32>;
112 interrupt-controller;
113 #interrupt-cells = <2>;
115 interrupt-parent = <&intc>;
120 compatible = "ingenic,jz4740-gpio";
124 gpio-ranges = <&pinctrl 0 96 32>;
127 interrupt-controller;
128 #interrupt-cells = <2>;
130 interrupt-parent = <&intc>;
136 compatible = "ingenic,jz4740-mmc";
137 reg = <0x10021000 0x1000>;
139 clocks = <&cgu JZ4740_CLK_MMC>;
142 interrupt-parent = <&intc>;
145 dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
146 dma-names = "rx", "tx";
153 uart0: serial@10030000 {
154 compatible = "ingenic,jz4740-uart";
155 reg = <0x10030000 0x100>;
157 interrupt-parent = <&intc>;
160 clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
161 clock-names = "baud", "module";
164 uart1: serial@10031000 {
165 compatible = "ingenic,jz4740-uart";
166 reg = <0x10031000 0x100>;
168 interrupt-parent = <&intc>;
171 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
172 clock-names = "baud", "module";
175 dmac: dma-controller@13020000 {
176 compatible = "ingenic,jz4740-dma";
177 reg = <0x13020000 0xbc
181 interrupt-parent = <&intc>;
184 clocks = <&cgu JZ4740_CLK_DMA>;
188 compatible = "ingenic,jz4740-ohci", "generic-ohci";
189 reg = <0x13030000 0x1000>;
191 clocks = <&cgu JZ4740_CLK_UHC>;
192 assigned-clocks = <&cgu JZ4740_CLK_UHC>;
193 assigned-clock-rates = <48000000>;
195 interrupt-parent = <&intc>;