MIPS: CI20: Reduce system timer and clocksource to 3 MHz
[linux-2.6-microblaze.git] / arch / mips / boot / dts / ingenic / ci20.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include "jz4780.dtsi"
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9         compatible = "img,ci20", "ingenic,jz4780";
10
11         aliases {
12                 serial0 = &uart0;
13                 serial1 = &uart1;
14                 serial3 = &uart3;
15                 serial4 = &uart4;
16         };
17
18         chosen {
19                 stdout-path = &uart4;
20         };
21
22         memory {
23                 device_type = "memory";
24                 reg = <0x0 0x10000000
25                        0x30000000 0x30000000>;
26         };
27
28         eth0_power: fixedregulator@0 {
29                 compatible = "regulator-fixed";
30                 regulator-name = "eth0_power";
31                 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
32                 enable-active-high;
33         };
34 };
35
36 &ext {
37         clock-frequency = <48000000>;
38 };
39
40 &mmc0 {
41         status = "okay";
42
43         bus-width = <4>;
44         max-frequency = <50000000>;
45
46         pinctrl-names = "default";
47         pinctrl-0 = <&pins_mmc0>;
48
49         cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
50 };
51
52 &mmc1 {
53         status = "okay";
54
55         bus-width = <4>;
56         max-frequency = <50000000>;
57
58         pinctrl-names = "default";
59         pinctrl-0 = <&pins_mmc1>;
60 };
61
62 &uart0 {
63         status = "okay";
64
65         pinctrl-names = "default";
66         pinctrl-0 = <&pins_uart0>;
67 };
68
69 &uart1 {
70         status = "okay";
71
72         pinctrl-names = "default";
73         pinctrl-0 = <&pins_uart1>;
74 };
75
76 &uart3 {
77         status = "okay";
78
79         pinctrl-names = "default";
80         pinctrl-0 = <&pins_uart3>;
81 };
82
83 &uart4 {
84         status = "okay";
85
86         pinctrl-names = "default";
87         pinctrl-0 = <&pins_uart4>;
88 };
89
90 &nemc {
91         status = "okay";
92
93         nandc: nand-controller@1 {
94                 compatible = "ingenic,jz4780-nand";
95                 reg = <1 0 0x1000000>;
96
97                 #address-cells = <1>;
98                 #size-cells = <0>;
99
100                 ingenic,bch-controller = <&bch>;
101
102                 ingenic,nemc-tAS = <10>;
103                 ingenic,nemc-tAH = <5>;
104                 ingenic,nemc-tBP = <10>;
105                 ingenic,nemc-tAW = <15>;
106                 ingenic,nemc-tSTRV = <100>;
107
108                 /*
109                  * Only CLE/ALE are needed for the devices that are connected, rather
110                  * than the full address line set.
111                  */
112                 pinctrl-names = "default";
113                 pinctrl-0 = <&pins_nemc>;
114
115                 nand@1 {
116                         reg = <1>;
117
118                         nand-ecc-step-size = <1024>;
119                         nand-ecc-strength = <24>;
120                         nand-ecc-mode = "hw";
121                         nand-on-flash-bbt;
122
123                         pinctrl-names = "default";
124                         pinctrl-0 = <&pins_nemc_cs1>;
125
126                         partitions {
127                                 compatible = "fixed-partitions";
128                                 #address-cells = <2>;
129                                 #size-cells = <2>;
130
131                                 partition@0 {
132                                         label = "u-boot-spl";
133                                         reg = <0x0 0x0 0x0 0x800000>;
134                                 };
135
136                                 partition@800000 {
137                                         label = "u-boot";
138                                         reg = <0x0 0x800000 0x0 0x200000>;
139                                 };
140
141                                 partition@a00000 {
142                                         label = "u-boot-env";
143                                         reg = <0x0 0xa00000 0x0 0x200000>;
144                                 };
145
146                                 partition@c00000 {
147                                         label = "boot";
148                                         reg = <0x0 0xc00000 0x0 0x4000000>;
149                                 };
150
151                                 partition@4c00000 {
152                                         label = "system";
153                                         reg = <0x0 0x4c00000 0x1 0xfb400000>;
154                                 };
155                         };
156                 };
157         };
158
159         dm9000@6 {
160                 compatible = "davicom,dm9000";
161                 davicom,no-eeprom;
162
163                 pinctrl-names = "default";
164                 pinctrl-0 = <&pins_nemc_cs6>;
165
166                 reg = <6 0 1   /* addr */
167                        6 2 1>; /* data */
168
169                 ingenic,nemc-tAS = <15>;
170                 ingenic,nemc-tAH = <10>;
171                 ingenic,nemc-tBP = <20>;
172                 ingenic,nemc-tAW = <50>;
173                 ingenic,nemc-tSTRV = <100>;
174
175                 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
176                 vcc-supply = <&eth0_power>;
177
178                 interrupt-parent = <&gpe>;
179                 interrupts = <19 4>;
180         };
181 };
182
183 &bch {
184         status = "okay";
185 };
186
187 &pinctrl {
188         pins_uart0: uart0 {
189                 function = "uart0";
190                 groups = "uart0-data";
191                 bias-disable;
192         };
193
194         pins_uart1: uart1 {
195                 function = "uart1";
196                 groups = "uart1-data";
197                 bias-disable;
198         };
199
200         pins_uart3: uart3 {
201                 function = "uart3";
202                 groups = "uart3-data", "uart3-hwflow";
203                 bias-disable;
204         };
205
206         pins_uart4: uart4 {
207                 function = "uart4";
208                 groups = "uart4-data";
209                 bias-disable;
210         };
211
212         pins_nemc: nemc {
213                 function = "nemc";
214                 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
215                 bias-disable;
216         };
217
218         pins_nemc_cs1: nemc-cs1 {
219                 function = "nemc-cs1";
220                 groups = "nemc-cs1";
221                 bias-disable;
222         };
223
224         pins_nemc_cs6: nemc-cs6 {
225                 function = "nemc-cs6";
226                 groups = "nemc-cs6";
227                 bias-disable;
228         };
229
230         pins_mmc0: mmc0 {
231                 function = "mmc0";
232                 groups = "mmc0-1bit-e", "mmc0-4bit-e";
233                 bias-disable;
234         };
235
236         pins_mmc1: mmc1 {
237                 function = "mmc1";
238                 groups = "mmc1-1bit-d", "mmc1-4bit-d";
239                 bias-disable;
240         };
241 };
242
243 &tcu {
244         /* 3 MHz for the system timer and clocksource */
245         assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
246         assigned-clock-rates = <3000000>, <3000000>;
247 };