1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
22 select ARCH_WANT_IPC_PARSE_VERSION
23 select ARCH_WANT_LD_ORPHAN_WARN
24 select BUILDTIME_TABLE_SORT
25 select CLONE_BACKWARDS
26 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
27 select CPU_PM if CPU_IDLE
28 select GENERIC_ATOMIC64 if !64BIT
29 select GENERIC_CMOS_UPDATE
30 select GENERIC_CPU_AUTOPROBE
31 select GENERIC_FIND_FIRST_BIT
32 select GENERIC_GETTIMEOFDAY
34 select GENERIC_IRQ_PROBE
35 select GENERIC_IRQ_SHOW
36 select GENERIC_ISA_DMA if EISA
37 select GENERIC_LIB_ASHLDI3
38 select GENERIC_LIB_ASHRDI3
39 select GENERIC_LIB_CMPDI2
40 select GENERIC_LIB_LSHRDI3
41 select GENERIC_LIB_UCMPDI2
42 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
43 select GENERIC_SMP_IDLE_THREAD
44 select GENERIC_TIME_VSYSCALL
45 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
46 select HANDLE_DOMAIN_IRQ
47 select HAVE_ARCH_COMPILER_H
48 select HAVE_ARCH_JUMP_LABEL
49 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
50 select HAVE_ARCH_MMAP_RND_BITS if MMU
51 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
52 select HAVE_ARCH_SECCOMP_FILTER
53 select HAVE_ARCH_TRACEHOOK
54 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
55 select HAVE_ASM_MODVERSIONS
56 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
57 select HAVE_CONTEXT_TRACKING
59 select HAVE_C_RECORDMCOUNT
60 select HAVE_DEBUG_KMEMLEAK
61 select HAVE_DEBUG_STACKOVERFLOW
62 select HAVE_DMA_CONTIGUOUS
63 select HAVE_DYNAMIC_FTRACE
64 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
65 select HAVE_EXIT_THREAD
67 select HAVE_FTRACE_MCOUNT_RECORD
68 select HAVE_FUNCTION_GRAPH_TRACER
69 select HAVE_FUNCTION_TRACER
70 select HAVE_GCC_PLUGINS
71 select HAVE_GENERIC_VDSO
73 select HAVE_IOREMAP_PROT
74 select HAVE_IRQ_EXIT_ON_IRQ_STACK
75 select HAVE_IRQ_TIME_ACCOUNTING
77 select HAVE_KRETPROBES
78 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
79 select HAVE_MOD_ARCH_SPECIFIC
81 select HAVE_PERF_EVENTS
83 select HAVE_PERF_USER_STACK_DUMP
84 select HAVE_REGS_AND_STACK_ACCESS_API
86 select HAVE_SPARSE_SYSCALL_NR
87 select HAVE_STACKPROTECTOR
88 select HAVE_SYSCALL_TRACEPOINTS
89 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
90 select IRQ_FORCED_THREADING
92 select MODULES_USE_ELF_REL if MODULES
93 select MODULES_USE_ELF_RELA if MODULES && 64BIT
94 select PERF_USE_VMALLOC
95 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
97 select SYSCTL_EXCEPTION_TRACE
99 select ARCH_HAS_ELFCORE_COMPAT
101 config MIPS_FIXUP_BIGPHYS_ADDR
109 select SYS_SUPPORTS_32BIT_KERNEL
110 select SYS_SUPPORTS_LITTLE_ENDIAN
111 select SYS_SUPPORTS_ZBOOT
112 select DMA_NONCOHERENT
117 select GENERIC_IRQ_CHIP
118 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
120 select CPU_SUPPORTS_CPUFREQ
121 select MIPS_EXTERNAL_TIMER
123 menu "Machine selection"
127 default MIPS_GENERIC_KERNEL
129 config MIPS_GENERIC_KERNEL
130 bool "Generic board-agnostic MIPS kernel"
131 select ARCH_HAS_SETUP_DMA_OPS
136 select CLKSRC_MIPS_GIC
138 select CPU_MIPSR2_IRQ_EI
139 select CPU_MIPSR2_IRQ_VI
141 select DMA_NONCOHERENT
144 select MIPS_AUTO_PFN_OFFSET
145 select MIPS_CPU_SCACHE
147 select MIPS_L1_CACHE_SHIFT_7
148 select NO_EXCEPT_FILL
149 select PCI_DRIVERS_GENERIC
152 select SYS_HAS_CPU_MIPS32_R1
153 select SYS_HAS_CPU_MIPS32_R2
154 select SYS_HAS_CPU_MIPS32_R6
155 select SYS_HAS_CPU_MIPS64_R1
156 select SYS_HAS_CPU_MIPS64_R2
157 select SYS_HAS_CPU_MIPS64_R6
158 select SYS_SUPPORTS_32BIT_KERNEL
159 select SYS_SUPPORTS_64BIT_KERNEL
160 select SYS_SUPPORTS_BIG_ENDIAN
161 select SYS_SUPPORTS_HIGHMEM
162 select SYS_SUPPORTS_LITTLE_ENDIAN
163 select SYS_SUPPORTS_MICROMIPS
164 select SYS_SUPPORTS_MIPS16
165 select SYS_SUPPORTS_MIPS_CPS
166 select SYS_SUPPORTS_MULTITHREADING
167 select SYS_SUPPORTS_RELOCATABLE
168 select SYS_SUPPORTS_SMARTMIPS
169 select SYS_SUPPORTS_ZBOOT
171 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
172 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 Select this to build a kernel which aims to support multiple boards,
180 generally using a flattened device tree passed from the bootloader
181 using the boot protocol defined in the UHI (Unified Hosting
182 Interface) specification.
185 bool "Alchemy processor based machines"
186 select PHYS_ADDR_T_64BIT
190 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
191 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
192 select SYS_HAS_CPU_MIPS32_R1
193 select SYS_SUPPORTS_32BIT_KERNEL
194 select SYS_SUPPORTS_APM_EMULATION
196 select SYS_SUPPORTS_ZBOOT
200 bool "Texas Instruments AR7"
202 select DMA_NONCOHERENT
206 select NO_EXCEPT_FILL
208 select SYS_HAS_CPU_MIPS32_R1
209 select SYS_HAS_EARLY_PRINTK
210 select SYS_SUPPORTS_32BIT_KERNEL
211 select SYS_SUPPORTS_LITTLE_ENDIAN
212 select SYS_SUPPORTS_MIPS16
213 select SYS_SUPPORTS_ZBOOT_UART16550
216 select HAVE_LEGACY_CLK
218 Support for the Texas Instruments AR7 System-on-a-Chip
219 family: TNETD7100, 7200 and 7300.
222 bool "Atheros AR231x/AR531x SoC support"
225 select DMA_NONCOHERENT
228 select SYS_HAS_CPU_MIPS32_R1
229 select SYS_SUPPORTS_BIG_ENDIAN
230 select SYS_SUPPORTS_32BIT_KERNEL
231 select SYS_HAS_EARLY_PRINTK
233 Support for Atheros AR231x and Atheros AR531x based boards
236 bool "Atheros AR71XX/AR724X/AR913X based boards"
237 select ARCH_HAS_RESET_CONTROLLER
241 select DMA_NONCOHERENT
246 select SYS_HAS_CPU_MIPS32_R2
247 select SYS_HAS_EARLY_PRINTK
248 select SYS_SUPPORTS_32BIT_KERNEL
249 select SYS_SUPPORTS_BIG_ENDIAN
250 select SYS_SUPPORTS_MIPS16
251 select SYS_SUPPORTS_ZBOOT_UART_PROM
253 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
255 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
258 bool "Broadcom Generic BMIPS kernel"
259 select ARCH_HAS_RESET_CONTROLLER
260 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
261 select ARCH_HAS_PHYS_TO_DMA
263 select NO_EXCEPT_FILL
269 select BCM6345_L1_IRQ
270 select BCM7038_L1_IRQ
271 select BCM7120_L2_IRQ
272 select BRCMSTB_L2_IRQ
274 select DMA_NONCOHERENT
275 select SYS_SUPPORTS_32BIT_KERNEL
276 select SYS_SUPPORTS_LITTLE_ENDIAN
277 select SYS_SUPPORTS_BIG_ENDIAN
278 select SYS_SUPPORTS_HIGHMEM
279 select SYS_HAS_CPU_BMIPS32_3300
280 select SYS_HAS_CPU_BMIPS4350
281 select SYS_HAS_CPU_BMIPS4380
282 select SYS_HAS_CPU_BMIPS5000
284 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
285 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
286 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select HARDIRQS_SW_RESEND
290 Build a generic DT-based kernel image that boots on select
291 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
292 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
293 must be set appropriately for your board.
296 bool "Broadcom BCM47XX based boards"
300 select DMA_NONCOHERENT
303 select SYS_HAS_CPU_MIPS32_R1
304 select NO_EXCEPT_FILL
305 select SYS_SUPPORTS_32BIT_KERNEL
306 select SYS_SUPPORTS_LITTLE_ENDIAN
307 select SYS_SUPPORTS_MIPS16
308 select SYS_SUPPORTS_ZBOOT
309 select SYS_HAS_EARLY_PRINTK
310 select USE_GENERIC_EARLY_PRINTK_8250
312 select LEDS_GPIO_REGISTER
315 select BCM47XX_SSB if !BCM47XX_BCMA
317 Support for BCM47XX based boards
320 bool "Broadcom BCM63XX based boards"
325 select DMA_NONCOHERENT
327 select SYS_SUPPORTS_32BIT_KERNEL
328 select SYS_SUPPORTS_BIG_ENDIAN
329 select SYS_HAS_EARLY_PRINTK
332 select MIPS_L1_CACHE_SHIFT_4
334 select HAVE_LEGACY_CLK
336 Support for BCM63XX based boards
343 select DMA_NONCOHERENT
349 select PCI_GT64XXX_PCI0
350 select SYS_HAS_CPU_NEVADA
351 select SYS_HAS_EARLY_PRINTK
352 select SYS_SUPPORTS_32BIT_KERNEL
353 select SYS_SUPPORTS_64BIT_KERNEL
354 select SYS_SUPPORTS_LITTLE_ENDIAN
355 select USE_GENERIC_EARLY_PRINTK_8250
357 config MACH_DECSTATION
361 select CEVT_R4K if CPU_R4X00
363 select CSRC_R4K if CPU_R4X00
364 select CPU_DADDI_WORKAROUNDS if 64BIT
365 select CPU_R4000_WORKAROUNDS if 64BIT
366 select CPU_R4400_WORKAROUNDS if 64BIT
367 select DMA_NONCOHERENT
370 select SYS_HAS_CPU_R3000
371 select SYS_HAS_CPU_R4X00
372 select SYS_SUPPORTS_32BIT_KERNEL
373 select SYS_SUPPORTS_64BIT_KERNEL
374 select SYS_SUPPORTS_LITTLE_ENDIAN
375 select SYS_SUPPORTS_128HZ
376 select SYS_SUPPORTS_256HZ
377 select SYS_SUPPORTS_1024HZ
378 select MIPS_L1_CACHE_SHIFT_4
380 This enables support for DEC's MIPS based workstations. For details
381 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
382 DECstation porting pages on <http://decstation.unix-ag.org/>.
384 If you have one of the following DECstation Models you definitely
385 want to choose R4xx0 for the CPU Type:
392 otherwise choose R3000.
395 bool "Jazz family of machines"
398 select ARCH_MIGHT_HAVE_PC_PARPORT
399 select ARCH_MIGHT_HAVE_PC_SERIO
403 select ARCH_MAY_HAVE_PC_FDC
406 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
407 select GENERIC_ISA_DMA
408 select HAVE_PCSPKR_PLATFORM
413 select SYS_HAS_CPU_R4X00
414 select SYS_SUPPORTS_32BIT_KERNEL
415 select SYS_SUPPORTS_64BIT_KERNEL
416 select SYS_SUPPORTS_100HZ
417 select SYS_SUPPORTS_LITTLE_ENDIAN
419 This a family of machines based on the MIPS R4030 chipset which was
420 used by several vendors to build RISC/os and Windows NT workstations.
421 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
422 Olivetti M700-10 workstations.
424 config MACH_INGENIC_SOC
425 bool "Ingenic SoC based machines"
428 select SYS_SUPPORTS_ZBOOT_UART16550
431 bool "Lantiq based platforms"
432 select DMA_NONCOHERENT
436 select SYS_HAS_CPU_MIPS32_R1
437 select SYS_HAS_CPU_MIPS32_R2
438 select SYS_SUPPORTS_BIG_ENDIAN
439 select SYS_SUPPORTS_32BIT_KERNEL
440 select SYS_SUPPORTS_MIPS16
441 select SYS_SUPPORTS_MULTITHREADING
442 select SYS_SUPPORTS_VPE_LOADER
443 select SYS_HAS_EARLY_PRINTK
448 select HAVE_LEGACY_CLK
451 select PINCTRL_LANTIQ
452 select ARCH_HAS_RESET_CONTROLLER
453 select RESET_CONTROLLER
455 config MACH_LOONGSON32
456 bool "Loongson 32-bit family of machines"
457 select SYS_SUPPORTS_ZBOOT
459 This enables support for the Loongson-1 family of machines.
461 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
462 the Institute of Computing Technology (ICT), Chinese Academy of
465 config MACH_LOONGSON2EF
466 bool "Loongson-2E/F family of machines"
467 select SYS_SUPPORTS_ZBOOT
469 This enables the support of early Loongson-2E/F family of machines.
471 config MACH_LOONGSON64
472 bool "Loongson 64-bit family of machines"
473 select ARCH_SPARSEMEM_ENABLE
474 select ARCH_MIGHT_HAVE_PC_PARPORT
475 select ARCH_MIGHT_HAVE_PC_SERIO
476 select GENERIC_ISA_DMA_SUPPORT_BROKEN
486 select NO_EXCEPT_FILL
487 select NR_CPUS_DEFAULT_64
488 select USE_GENERIC_EARLY_PRINTK_8250
489 select PCI_DRIVERS_GENERIC
490 select SYS_HAS_CPU_LOONGSON64
491 select SYS_HAS_EARLY_PRINTK
492 select SYS_SUPPORTS_SMP
493 select SYS_SUPPORTS_HOTPLUG_CPU
494 select SYS_SUPPORTS_NUMA
495 select SYS_SUPPORTS_64BIT_KERNEL
496 select SYS_SUPPORTS_HIGHMEM
497 select SYS_SUPPORTS_LITTLE_ENDIAN
498 select SYS_SUPPORTS_ZBOOT
499 select SYS_SUPPORTS_RELOCATABLE
504 select PCI_HOST_GENERIC
506 This enables the support of Loongson-2/3 family of machines.
508 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
509 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
510 and Loongson-2F which will be removed), developed by the Institute
511 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
513 config MACH_PISTACHIO
514 bool "IMG Pistachio SoC based boards"
518 select CLKSRC_MIPS_GIC
521 select DMA_NONCOHERENT
525 select MIPS_CPU_SCACHE
529 select SYS_HAS_CPU_MIPS32_R2
530 select SYS_SUPPORTS_32BIT_KERNEL
531 select SYS_SUPPORTS_LITTLE_ENDIAN
532 select SYS_SUPPORTS_MIPS_CPS
533 select SYS_SUPPORTS_MULTITHREADING
534 select SYS_SUPPORTS_RELOCATABLE
535 select SYS_SUPPORTS_ZBOOT
536 select SYS_HAS_EARLY_PRINTK
537 select USE_GENERIC_EARLY_PRINTK_8250
540 This enables support for the IMG Pistachio SoC platform.
543 bool "MIPS Malta board"
544 select ARCH_MAY_HAVE_PC_FDC
545 select ARCH_MIGHT_HAVE_PC_PARPORT
546 select ARCH_MIGHT_HAVE_PC_SERIO
551 select CLKSRC_MIPS_GIC
554 select DMA_NONCOHERENT
555 select GENERIC_ISA_DMA
556 select HAVE_PCSPKR_PLATFORM
562 select MIPS_CPU_SCACHE
564 select MIPS_L1_CACHE_SHIFT_6
566 select PCI_GT64XXX_PCI0
569 select SYS_HAS_CPU_MIPS32_R1
570 select SYS_HAS_CPU_MIPS32_R2
571 select SYS_HAS_CPU_MIPS32_R3_5
572 select SYS_HAS_CPU_MIPS32_R5
573 select SYS_HAS_CPU_MIPS32_R6
574 select SYS_HAS_CPU_MIPS64_R1
575 select SYS_HAS_CPU_MIPS64_R2
576 select SYS_HAS_CPU_MIPS64_R6
577 select SYS_HAS_CPU_NEVADA
578 select SYS_HAS_CPU_RM7000
579 select SYS_SUPPORTS_32BIT_KERNEL
580 select SYS_SUPPORTS_64BIT_KERNEL
581 select SYS_SUPPORTS_BIG_ENDIAN
582 select SYS_SUPPORTS_HIGHMEM
583 select SYS_SUPPORTS_LITTLE_ENDIAN
584 select SYS_SUPPORTS_MICROMIPS
585 select SYS_SUPPORTS_MIPS16
586 select SYS_SUPPORTS_MIPS_CMP
587 select SYS_SUPPORTS_MIPS_CPS
588 select SYS_SUPPORTS_MULTITHREADING
589 select SYS_SUPPORTS_RELOCATABLE
590 select SYS_SUPPORTS_SMARTMIPS
591 select SYS_SUPPORTS_VPE_LOADER
592 select SYS_SUPPORTS_ZBOOT
594 select WAR_ICACHE_REFILLS
595 select ZONE_DMA32 if 64BIT
597 This enables support for the MIPS Technologies Malta evaluation
601 bool "Microchip PIC32 Family"
603 This enables support for the Microchip PIC32 family of platforms.
605 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
609 bool "NEC VR4100 series based machines"
612 select SYS_HAS_CPU_VR41XX
613 select SYS_SUPPORTS_MIPS16
616 config MACH_NINTENDO64
617 bool "Nintendo 64 console"
620 select SYS_HAS_CPU_R4300
621 select SYS_SUPPORTS_BIG_ENDIAN
622 select SYS_SUPPORTS_ZBOOT
623 select SYS_SUPPORTS_32BIT_KERNEL
624 select SYS_SUPPORTS_64BIT_KERNEL
625 select DMA_NONCOHERENT
629 bool "Ralink based machines"
633 select DMA_NONCOHERENT
636 select SYS_HAS_CPU_MIPS32_R1
637 select SYS_HAS_CPU_MIPS32_R2
638 select SYS_SUPPORTS_32BIT_KERNEL
639 select SYS_SUPPORTS_LITTLE_ENDIAN
640 select SYS_SUPPORTS_MIPS16
641 select SYS_SUPPORTS_ZBOOT
642 select SYS_HAS_EARLY_PRINTK
644 select ARCH_HAS_RESET_CONTROLLER
645 select RESET_CONTROLLER
647 config MACH_REALTEK_RTL
648 bool "Realtek RTL838x/RTL839x based machines"
650 select DMA_NONCOHERENT
654 select SYS_HAS_CPU_MIPS32_R1
655 select SYS_HAS_CPU_MIPS32_R2
656 select SYS_SUPPORTS_BIG_ENDIAN
657 select SYS_SUPPORTS_32BIT_KERNEL
658 select SYS_SUPPORTS_MIPS16
659 select SYS_SUPPORTS_MULTITHREADING
660 select SYS_SUPPORTS_VPE_LOADER
661 select SYS_HAS_EARLY_PRINTK
662 select SYS_HAS_EARLY_PRINTK_8250
663 select USE_GENERIC_EARLY_PRINTK_8250
669 bool "SGI IP22 (Indy/Indigo2)"
674 select ARCH_MIGHT_HAVE_PC_SERIO
678 select DEFAULT_SGI_PARTITION
679 select DMA_NONCOHERENT
683 select IP22_CPU_SCACHE
685 select GENERIC_ISA_DMA_SUPPORT_BROKEN
687 select SGI_HAS_INDYDOG
693 select SYS_HAS_CPU_R4X00
694 select SYS_HAS_CPU_R5000
695 select SYS_HAS_EARLY_PRINTK
696 select SYS_SUPPORTS_32BIT_KERNEL
697 select SYS_SUPPORTS_64BIT_KERNEL
698 select SYS_SUPPORTS_BIG_ENDIAN
699 select WAR_R4600_V1_INDEX_ICACHEOP
700 select WAR_R4600_V1_HIT_CACHEOP
701 select WAR_R4600_V2_HIT_CACHEOP
702 select MIPS_L1_CACHE_SHIFT_7
704 This are the SGI Indy, Challenge S and Indigo2, as well as certain
705 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
706 that runs on these, say Y here.
709 bool "SGI IP27 (Origin200/2000)"
710 select ARCH_HAS_PHYS_TO_DMA
711 select ARCH_SPARSEMEM_ENABLE
714 select ARC_CMDLINE_ONLY
716 select DEFAULT_SGI_PARTITION
718 select SYS_HAS_EARLY_PRINTK
721 select IRQ_DOMAIN_HIERARCHY
722 select NR_CPUS_DEFAULT_64
723 select PCI_DRIVERS_GENERIC
724 select PCI_XTALK_BRIDGE
725 select SYS_HAS_CPU_R10000
726 select SYS_SUPPORTS_64BIT_KERNEL
727 select SYS_SUPPORTS_BIG_ENDIAN
728 select SYS_SUPPORTS_NUMA
729 select SYS_SUPPORTS_SMP
730 select WAR_R10000_LLSC
731 select MIPS_L1_CACHE_SHIFT_7
734 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
735 workstations. To compile a Linux kernel that runs on these, say Y
739 bool "SGI IP28 (Indigo2 R10k)"
744 select ARCH_MIGHT_HAVE_PC_SERIO
748 select DEFAULT_SGI_PARTITION
749 select DMA_NONCOHERENT
750 select GENERIC_ISA_DMA_SUPPORT_BROKEN
756 select SGI_HAS_INDYDOG
762 select SYS_HAS_CPU_R10000
763 select SYS_HAS_EARLY_PRINTK
764 select SYS_SUPPORTS_64BIT_KERNEL
765 select SYS_SUPPORTS_BIG_ENDIAN
766 select WAR_R10000_LLSC
767 select MIPS_L1_CACHE_SHIFT_7
769 This is the SGI Indigo2 with R10000 processor. To compile a Linux
770 kernel that runs on these, say Y here.
773 bool "SGI IP30 (Octane/Octane2)"
774 select ARCH_HAS_PHYS_TO_DMA
781 select SYNC_R4K if SMP
785 select IRQ_DOMAIN_HIERARCHY
786 select NR_CPUS_DEFAULT_2
787 select PCI_DRIVERS_GENERIC
788 select PCI_XTALK_BRIDGE
789 select SYS_HAS_EARLY_PRINTK
790 select SYS_HAS_CPU_R10000
791 select SYS_SUPPORTS_64BIT_KERNEL
792 select SYS_SUPPORTS_BIG_ENDIAN
793 select SYS_SUPPORTS_SMP
794 select WAR_R10000_LLSC
795 select MIPS_L1_CACHE_SHIFT_7
798 These are the SGI Octane and Octane2 graphics workstations. To
799 compile a Linux kernel that runs on these, say Y here.
805 select ARCH_HAS_PHYS_TO_DMA
811 select DMA_NONCOHERENT
814 select R5000_CPU_SCACHE
815 select RM7000_CPU_SCACHE
816 select SYS_HAS_CPU_R5000
817 select SYS_HAS_CPU_R10000 if BROKEN
818 select SYS_HAS_CPU_RM7000
819 select SYS_HAS_CPU_NEVADA
820 select SYS_SUPPORTS_64BIT_KERNEL
821 select SYS_SUPPORTS_BIG_ENDIAN
822 select WAR_ICACHE_REFILLS
824 If you want this kernel to run on SGI O2 workstation, say Y here.
827 bool "Sibyte BCM91120C-CRhine"
829 select SIBYTE_BCM1120
831 select SYS_HAS_CPU_SB1
832 select SYS_SUPPORTS_BIG_ENDIAN
833 select SYS_SUPPORTS_LITTLE_ENDIAN
836 bool "Sibyte BCM91120x-Carmel"
838 select SIBYTE_BCM1120
840 select SYS_HAS_CPU_SB1
841 select SYS_SUPPORTS_BIG_ENDIAN
842 select SYS_SUPPORTS_LITTLE_ENDIAN
845 bool "Sibyte BCM91125C-CRhone"
847 select SIBYTE_BCM1125
849 select SYS_HAS_CPU_SB1
850 select SYS_SUPPORTS_BIG_ENDIAN
851 select SYS_SUPPORTS_HIGHMEM
852 select SYS_SUPPORTS_LITTLE_ENDIAN
855 bool "Sibyte BCM91125E-Rhone"
857 select SIBYTE_BCM1125H
859 select SYS_HAS_CPU_SB1
860 select SYS_SUPPORTS_BIG_ENDIAN
861 select SYS_SUPPORTS_LITTLE_ENDIAN
864 bool "Sibyte BCM91250A-SWARM"
866 select HAVE_PATA_PLATFORM
869 select SYS_HAS_CPU_SB1
870 select SYS_SUPPORTS_BIG_ENDIAN
871 select SYS_SUPPORTS_HIGHMEM
872 select SYS_SUPPORTS_LITTLE_ENDIAN
873 select ZONE_DMA32 if 64BIT
874 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
876 config SIBYTE_LITTLESUR
877 bool "Sibyte BCM91250C2-LittleSur"
879 select HAVE_PATA_PLATFORM
882 select SYS_HAS_CPU_SB1
883 select SYS_SUPPORTS_BIG_ENDIAN
884 select SYS_SUPPORTS_HIGHMEM
885 select SYS_SUPPORTS_LITTLE_ENDIAN
886 select ZONE_DMA32 if 64BIT
888 config SIBYTE_SENTOSA
889 bool "Sibyte BCM91250E-Sentosa"
893 select SYS_HAS_CPU_SB1
894 select SYS_SUPPORTS_BIG_ENDIAN
895 select SYS_SUPPORTS_LITTLE_ENDIAN
896 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
899 bool "Sibyte BCM91480B-BigSur"
901 select NR_CPUS_DEFAULT_4
902 select SIBYTE_BCM1x80
904 select SYS_HAS_CPU_SB1
905 select SYS_SUPPORTS_BIG_ENDIAN
906 select SYS_SUPPORTS_HIGHMEM
907 select SYS_SUPPORTS_LITTLE_ENDIAN
908 select ZONE_DMA32 if 64BIT
909 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
912 bool "SNI RM200/300/400"
915 select FW_ARC if CPU_LITTLE_ENDIAN
916 select FW_ARC32 if CPU_LITTLE_ENDIAN
917 select FW_SNIPROM if CPU_BIG_ENDIAN
918 select ARCH_MAY_HAVE_PC_FDC
919 select ARCH_MIGHT_HAVE_PC_PARPORT
920 select ARCH_MIGHT_HAVE_PC_SERIO
924 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
925 select DMA_NONCOHERENT
926 select GENERIC_ISA_DMA
928 select HAVE_PCSPKR_PLATFORM
934 select MIPS_L1_CACHE_SHIFT_6
935 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
936 select SYS_HAS_CPU_R4X00
937 select SYS_HAS_CPU_R5000
938 select SYS_HAS_CPU_R10000
939 select R5000_CPU_SCACHE
940 select SYS_HAS_EARLY_PRINTK
941 select SYS_SUPPORTS_32BIT_KERNEL
942 select SYS_SUPPORTS_64BIT_KERNEL
943 select SYS_SUPPORTS_BIG_ENDIAN
944 select SYS_SUPPORTS_HIGHMEM
945 select SYS_SUPPORTS_LITTLE_ENDIAN
946 select WAR_R4600_V2_HIT_CACHEOP
948 The SNI RM200/300/400 are MIPS-based machines manufactured by
949 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
950 Technology and now in turn merged with Fujitsu. Say Y here to
951 support this machine type.
954 bool "Toshiba TX39 series based machines"
957 bool "Toshiba TX49 series based machines"
958 select WAR_TX49XX_ICACHE_INDEX_INV
960 config MIKROTIK_RB532
961 bool "Mikrotik RB532 boards"
964 select DMA_NONCOHERENT
967 select SYS_HAS_CPU_MIPS32_R1
968 select SYS_SUPPORTS_32BIT_KERNEL
969 select SYS_SUPPORTS_LITTLE_ENDIAN
973 select MIPS_L1_CACHE_SHIFT_4
975 Support the Mikrotik(tm) RouterBoard 532 series,
976 based on the IDT RC32434 SoC.
978 config CAVIUM_OCTEON_SOC
979 bool "Cavium Networks Octeon SoC based boards"
981 select ARCH_HAS_PHYS_TO_DMA
983 select PHYS_ADDR_T_64BIT
984 select SYS_SUPPORTS_64BIT_KERNEL
985 select SYS_SUPPORTS_BIG_ENDIAN
987 select EDAC_ATOMIC_SCRUB
988 select SYS_SUPPORTS_LITTLE_ENDIAN
989 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
990 select SYS_HAS_EARLY_PRINTK
991 select SYS_HAS_CPU_CAVIUM_OCTEON
993 select HAVE_PLAT_DELAY
994 select HAVE_PLAT_FW_INIT_CMDLINE
995 select HAVE_PLAT_MEMCPY
1000 select ARCH_SPARSEMEM_ENABLE
1001 select SYS_SUPPORTS_SMP
1002 select NR_CPUS_DEFAULT_64
1003 select MIPS_NR_CPU_NR_MAP_1024
1006 select MTD_COMPLEX_MAPPINGS
1008 select SYS_SUPPORTS_RELOCATABLE
1010 This option supports all of the Octeon reference boards from Cavium
1011 Networks. It builds a kernel that dynamically determines the Octeon
1012 CPU type and supports all known board reference implementations.
1013 Some of the supported boards are:
1020 Say Y here for most Octeon reference boards.
1022 config NLM_XLR_BOARD
1023 bool "Netlogic XLR/XLS based systems"
1026 select SYS_HAS_CPU_XLR
1027 select SYS_SUPPORTS_SMP
1029 select SWAP_IO_SPACE
1030 select SYS_SUPPORTS_32BIT_KERNEL
1031 select SYS_SUPPORTS_64BIT_KERNEL
1032 select PHYS_ADDR_T_64BIT
1033 select SYS_SUPPORTS_BIG_ENDIAN
1034 select SYS_SUPPORTS_HIGHMEM
1035 select NR_CPUS_DEFAULT_32
1039 select ZONE_DMA32 if 64BIT
1041 select SYS_HAS_EARLY_PRINTK
1042 select SYS_SUPPORTS_ZBOOT
1043 select SYS_SUPPORTS_ZBOOT_UART16550
1045 Support for systems based on Netlogic XLR and XLS processors.
1046 Say Y here if you have a XLR or XLS based board.
1048 config NLM_XLP_BOARD
1049 bool "Netlogic XLP based systems"
1052 select SYS_HAS_CPU_XLP
1053 select SYS_SUPPORTS_SMP
1055 select SYS_SUPPORTS_32BIT_KERNEL
1056 select SYS_SUPPORTS_64BIT_KERNEL
1057 select PHYS_ADDR_T_64BIT
1059 select SYS_SUPPORTS_BIG_ENDIAN
1060 select SYS_SUPPORTS_LITTLE_ENDIAN
1061 select SYS_SUPPORTS_HIGHMEM
1062 select NR_CPUS_DEFAULT_32
1066 select ZONE_DMA32 if 64BIT
1068 select SYS_HAS_EARLY_PRINTK
1070 select SYS_SUPPORTS_ZBOOT
1071 select SYS_SUPPORTS_ZBOOT_UART16550
1073 This board is based on Netlogic XLP Processor.
1074 Say Y here if you have a XLP based board.
1078 source "arch/mips/alchemy/Kconfig"
1079 source "arch/mips/ath25/Kconfig"
1080 source "arch/mips/ath79/Kconfig"
1081 source "arch/mips/bcm47xx/Kconfig"
1082 source "arch/mips/bcm63xx/Kconfig"
1083 source "arch/mips/bmips/Kconfig"
1084 source "arch/mips/generic/Kconfig"
1085 source "arch/mips/ingenic/Kconfig"
1086 source "arch/mips/jazz/Kconfig"
1087 source "arch/mips/lantiq/Kconfig"
1088 source "arch/mips/pic32/Kconfig"
1089 source "arch/mips/pistachio/Kconfig"
1090 source "arch/mips/ralink/Kconfig"
1091 source "arch/mips/sgi-ip27/Kconfig"
1092 source "arch/mips/sibyte/Kconfig"
1093 source "arch/mips/txx9/Kconfig"
1094 source "arch/mips/vr41xx/Kconfig"
1095 source "arch/mips/cavium-octeon/Kconfig"
1096 source "arch/mips/loongson2ef/Kconfig"
1097 source "arch/mips/loongson32/Kconfig"
1098 source "arch/mips/loongson64/Kconfig"
1099 source "arch/mips/netlogic/Kconfig"
1103 config GENERIC_HWEIGHT
1107 config GENERIC_CALIBRATE_DELAY
1111 config SCHED_OMIT_FRAME_POINTER
1116 # Select some configuration options automatically based on user selections.
1121 config ARCH_MAY_HAVE_PC_FDC
1152 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1158 config MIPS_CLOCK_VSYSCALL
1159 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1168 config ARCH_SUPPORTS_UPROBES
1171 config DMA_PERDEV_COHERENT
1173 select ARCH_HAS_SETUP_DMA_OPS
1174 select DMA_NONCOHERENT
1176 config DMA_NONCOHERENT
1179 # MIPS allows mixing "slightly different" Cacheability and Coherency
1180 # Attribute bits. It is believed that the uncached access through
1181 # KSEG1 and the implementation specific "uncached accelerated" used
1182 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1183 # significant advantages.
1185 select ARCH_HAS_DMA_WRITE_COMBINE
1186 select ARCH_HAS_DMA_PREP_COHERENT
1187 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1188 select ARCH_HAS_DMA_SET_UNCACHED
1189 select DMA_NONCOHERENT_MMAP
1190 select NEED_DMA_MAP_STATE
1192 config SYS_HAS_EARLY_PRINTK
1195 config SYS_SUPPORTS_HOTPLUG_CPU
1198 config MIPS_BONITO64
1207 config NO_IOPORT_MAP
1211 def_bool CPU_NO_LOAD_STORE_LR
1213 config GENERIC_ISA_DMA
1215 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1218 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1220 select GENERIC_ISA_DMA
1222 config HAVE_PLAT_DELAY
1225 config HAVE_PLAT_FW_INIT_CMDLINE
1228 config HAVE_PLAT_MEMCPY
1234 config HOLES_IN_ZONE
1237 config SYS_SUPPORTS_RELOCATABLE
1240 Selected if the platform supports relocating the kernel.
1241 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1242 to allow access to command line and entropy sources.
1244 config MIPS_CBPF_JIT
1246 depends on BPF_JIT && HAVE_CBPF_JIT
1248 config MIPS_EBPF_JIT
1250 depends on BPF_JIT && HAVE_EBPF_JIT
1254 # Endianness selection. Sufficiently obscure so many users don't know what to
1255 # answer,so we try hard to limit the available choices. Also the use of a
1256 # choice statement should be more obvious to the user.
1259 prompt "Endianness selection"
1261 Some MIPS machines can be configured for either little or big endian
1262 byte order. These modes require different kernels and a different
1263 Linux distribution. In general there is one preferred byteorder for a
1264 particular system but some systems are just as commonly used in the
1265 one or the other endianness.
1267 config CPU_BIG_ENDIAN
1269 depends on SYS_SUPPORTS_BIG_ENDIAN
1271 config CPU_LITTLE_ENDIAN
1272 bool "Little endian"
1273 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1280 config SYS_SUPPORTS_APM_EMULATION
1283 config SYS_SUPPORTS_BIG_ENDIAN
1286 config SYS_SUPPORTS_LITTLE_ENDIAN
1289 config SYS_SUPPORTS_HUGETLBFS
1291 depends on CPU_SUPPORTS_HUGEPAGES
1294 config MIPS_HUGE_TLB_SUPPORT
1295 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1309 config PCI_GT64XXX_PCI0
1312 config PCI_XTALK_BRIDGE
1315 config NO_EXCEPT_FILL
1321 config SWAP_IO_SPACE
1324 config SGI_HAS_INDYDOG
1336 config SGI_HAS_ZILOG
1339 config SGI_HAS_I8042
1342 config DEFAULT_SGI_PARTITION
1354 config MIPS_L1_CACHE_SHIFT_4
1357 config MIPS_L1_CACHE_SHIFT_5
1360 config MIPS_L1_CACHE_SHIFT_6
1363 config MIPS_L1_CACHE_SHIFT_7
1366 config MIPS_L1_CACHE_SHIFT
1368 default "7" if MIPS_L1_CACHE_SHIFT_7
1369 default "6" if MIPS_L1_CACHE_SHIFT_6
1370 default "5" if MIPS_L1_CACHE_SHIFT_5
1371 default "4" if MIPS_L1_CACHE_SHIFT_4
1374 config ARC_CMDLINE_ONLY
1378 bool "ARC console support"
1379 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1393 menu "CPU selection"
1399 config CPU_LOONGSON64
1400 bool "Loongson 64-bit CPU"
1401 depends on SYS_HAS_CPU_LOONGSON64
1402 select ARCH_HAS_PHYS_TO_DMA
1404 select CPU_HAS_PREFETCH
1405 select CPU_SUPPORTS_64BIT_KERNEL
1406 select CPU_SUPPORTS_HIGHMEM
1407 select CPU_SUPPORTS_HUGEPAGES
1408 select CPU_SUPPORTS_MSA
1409 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1410 select CPU_MIPSR2_IRQ_VI
1411 select WEAK_ORDERING
1412 select WEAK_REORDERING_BEYOND_LLSC
1413 select MIPS_ASID_BITS_VARIABLE
1414 select MIPS_PGD_C0_CONTEXT
1415 select MIPS_L1_CACHE_SHIFT_6
1420 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1421 cores implements the MIPS64R2 instruction set with many extensions,
1422 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1423 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1424 Loongson-2E/2F is not covered here and will be removed in future.
1426 config LOONGSON3_ENHANCEMENT
1427 bool "New Loongson-3 CPU Enhancements"
1429 depends on CPU_LOONGSON64
1431 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1432 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1433 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1434 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1435 Fast TLB refill support, etc.
1437 This option enable those enhancements which are not probed at run
1438 time. If you want a generic kernel to run on all Loongson 3 machines,
1439 please say 'N' here. If you want a high-performance kernel to run on
1440 new Loongson-3 machines only, please say 'Y' here.
1442 config CPU_LOONGSON3_WORKAROUNDS
1443 bool "Old Loongson-3 LLSC Workarounds"
1445 depends on CPU_LOONGSON64
1447 Loongson-3 processors have the llsc issues which require workarounds.
1448 Without workarounds the system may hang unexpectedly.
1450 Newer Loongson-3 will fix these issues and no workarounds are needed.
1451 The workarounds have no significant side effect on them but may
1452 decrease the performance of the system so this option should be
1453 disabled unless the kernel is intended to be run on old systems.
1455 If unsure, please say Y.
1457 config CPU_LOONGSON3_CPUCFG_EMULATION
1458 bool "Emulate the CPUCFG instruction on older Loongson cores"
1460 depends on CPU_LOONGSON64
1462 Loongson-3A R4 and newer have the CPUCFG instruction available for
1463 userland to query CPU capabilities, much like CPUID on x86. This
1464 option provides emulation of the instruction on older Loongson
1465 cores, back to Loongson-3A1000.
1467 If unsure, please say Y.
1469 config CPU_LOONGSON2E
1471 depends on SYS_HAS_CPU_LOONGSON2E
1472 select CPU_LOONGSON2EF
1474 The Loongson 2E processor implements the MIPS III instruction set
1475 with many extensions.
1477 It has an internal FPGA northbridge, which is compatible to
1480 config CPU_LOONGSON2F
1482 depends on SYS_HAS_CPU_LOONGSON2F
1483 select CPU_LOONGSON2EF
1486 The Loongson 2F processor implements the MIPS III instruction set
1487 with many extensions.
1489 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1490 have a similar programming interface with FPGA northbridge used in
1493 config CPU_LOONGSON1B
1495 depends on SYS_HAS_CPU_LOONGSON1B
1496 select CPU_LOONGSON32
1497 select LEDS_GPIO_REGISTER
1499 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1500 Release 1 instruction set and part of the MIPS32 Release 2
1503 config CPU_LOONGSON1C
1505 depends on SYS_HAS_CPU_LOONGSON1C
1506 select CPU_LOONGSON32
1507 select LEDS_GPIO_REGISTER
1509 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1510 Release 1 instruction set and part of the MIPS32 Release 2
1513 config CPU_MIPS32_R1
1514 bool "MIPS32 Release 1"
1515 depends on SYS_HAS_CPU_MIPS32_R1
1516 select CPU_HAS_PREFETCH
1517 select CPU_SUPPORTS_32BIT_KERNEL
1518 select CPU_SUPPORTS_HIGHMEM
1520 Choose this option to build a kernel for release 1 or later of the
1521 MIPS32 architecture. Most modern embedded systems with a 32-bit
1522 MIPS processor are based on a MIPS32 processor. If you know the
1523 specific type of processor in your system, choose those that one
1524 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1525 Release 2 of the MIPS32 architecture is available since several
1526 years so chances are you even have a MIPS32 Release 2 processor
1527 in which case you should choose CPU_MIPS32_R2 instead for better
1530 config CPU_MIPS32_R2
1531 bool "MIPS32 Release 2"
1532 depends on SYS_HAS_CPU_MIPS32_R2
1533 select CPU_HAS_PREFETCH
1534 select CPU_SUPPORTS_32BIT_KERNEL
1535 select CPU_SUPPORTS_HIGHMEM
1536 select CPU_SUPPORTS_MSA
1539 Choose this option to build a kernel for release 2 or later of the
1540 MIPS32 architecture. Most modern embedded systems with a 32-bit
1541 MIPS processor are based on a MIPS32 processor. If you know the
1542 specific type of processor in your system, choose those that one
1543 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1545 config CPU_MIPS32_R5
1546 bool "MIPS32 Release 5"
1547 depends on SYS_HAS_CPU_MIPS32_R5
1548 select CPU_HAS_PREFETCH
1549 select CPU_SUPPORTS_32BIT_KERNEL
1550 select CPU_SUPPORTS_HIGHMEM
1551 select CPU_SUPPORTS_MSA
1553 select MIPS_O32_FP64_SUPPORT
1555 Choose this option to build a kernel for release 5 or later of the
1556 MIPS32 architecture. New MIPS processors, starting with the Warrior
1557 family, are based on a MIPS32r5 processor. If you own an older
1558 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1560 config CPU_MIPS32_R6
1561 bool "MIPS32 Release 6"
1562 depends on SYS_HAS_CPU_MIPS32_R6
1563 select CPU_HAS_PREFETCH
1564 select CPU_NO_LOAD_STORE_LR
1565 select CPU_SUPPORTS_32BIT_KERNEL
1566 select CPU_SUPPORTS_HIGHMEM
1567 select CPU_SUPPORTS_MSA
1569 select MIPS_O32_FP64_SUPPORT
1571 Choose this option to build a kernel for release 6 or later of the
1572 MIPS32 architecture. New MIPS processors, starting with the Warrior
1573 family, are based on a MIPS32r6 processor. If you own an older
1574 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1576 config CPU_MIPS64_R1
1577 bool "MIPS64 Release 1"
1578 depends on SYS_HAS_CPU_MIPS64_R1
1579 select CPU_HAS_PREFETCH
1580 select CPU_SUPPORTS_32BIT_KERNEL
1581 select CPU_SUPPORTS_64BIT_KERNEL
1582 select CPU_SUPPORTS_HIGHMEM
1583 select CPU_SUPPORTS_HUGEPAGES
1585 Choose this option to build a kernel for release 1 or later of the
1586 MIPS64 architecture. Many modern embedded systems with a 64-bit
1587 MIPS processor are based on a MIPS64 processor. If you know the
1588 specific type of processor in your system, choose those that one
1589 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1590 Release 2 of the MIPS64 architecture is available since several
1591 years so chances are you even have a MIPS64 Release 2 processor
1592 in which case you should choose CPU_MIPS64_R2 instead for better
1595 config CPU_MIPS64_R2
1596 bool "MIPS64 Release 2"
1597 depends on SYS_HAS_CPU_MIPS64_R2
1598 select CPU_HAS_PREFETCH
1599 select CPU_SUPPORTS_32BIT_KERNEL
1600 select CPU_SUPPORTS_64BIT_KERNEL
1601 select CPU_SUPPORTS_HIGHMEM
1602 select CPU_SUPPORTS_HUGEPAGES
1603 select CPU_SUPPORTS_MSA
1606 Choose this option to build a kernel for release 2 or later of the
1607 MIPS64 architecture. Many modern embedded systems with a 64-bit
1608 MIPS processor are based on a MIPS64 processor. If you know the
1609 specific type of processor in your system, choose those that one
1610 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1612 config CPU_MIPS64_R5
1613 bool "MIPS64 Release 5"
1614 depends on SYS_HAS_CPU_MIPS64_R5
1615 select CPU_HAS_PREFETCH
1616 select CPU_SUPPORTS_32BIT_KERNEL
1617 select CPU_SUPPORTS_64BIT_KERNEL
1618 select CPU_SUPPORTS_HIGHMEM
1619 select CPU_SUPPORTS_HUGEPAGES
1620 select CPU_SUPPORTS_MSA
1621 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1624 Choose this option to build a kernel for release 5 or later of the
1625 MIPS64 architecture. This is a intermediate MIPS architecture
1626 release partly implementing release 6 features. Though there is no
1627 any hardware known to be based on this release.
1629 config CPU_MIPS64_R6
1630 bool "MIPS64 Release 6"
1631 depends on SYS_HAS_CPU_MIPS64_R6
1632 select CPU_HAS_PREFETCH
1633 select CPU_NO_LOAD_STORE_LR
1634 select CPU_SUPPORTS_32BIT_KERNEL
1635 select CPU_SUPPORTS_64BIT_KERNEL
1636 select CPU_SUPPORTS_HIGHMEM
1637 select CPU_SUPPORTS_HUGEPAGES
1638 select CPU_SUPPORTS_MSA
1639 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1642 Choose this option to build a kernel for release 6 or later of the
1643 MIPS64 architecture. New MIPS processors, starting with the Warrior
1644 family, are based on a MIPS64r6 processor. If you own an older
1645 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1648 bool "MIPS Warrior P5600"
1649 depends on SYS_HAS_CPU_P5600
1650 select CPU_HAS_PREFETCH
1651 select CPU_SUPPORTS_32BIT_KERNEL
1652 select CPU_SUPPORTS_HIGHMEM
1653 select CPU_SUPPORTS_MSA
1654 select CPU_SUPPORTS_CPUFREQ
1655 select CPU_MIPSR2_IRQ_VI
1656 select CPU_MIPSR2_IRQ_EI
1658 select MIPS_O32_FP64_SUPPORT
1660 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1661 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1662 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1663 level features like up to six P5600 calculation cores, CM2 with L2
1664 cache, IOCU/IOMMU (though might be unused depending on the system-
1665 specific IP core configuration), GIC, CPC, virtualisation module,
1670 depends on SYS_HAS_CPU_R3000
1673 select CPU_SUPPORTS_32BIT_KERNEL
1674 select CPU_SUPPORTS_HIGHMEM
1676 Please make sure to pick the right CPU type. Linux/MIPS is not
1677 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1678 *not* work on R4000 machines and vice versa. However, since most
1679 of the supported machines have an R4000 (or similar) CPU, R4x00
1680 might be a safe bet. If the resulting kernel does not work,
1681 try to recompile with R3000.
1685 depends on SYS_HAS_CPU_TX39XX
1686 select CPU_SUPPORTS_32BIT_KERNEL
1691 depends on SYS_HAS_CPU_VR41XX
1692 select CPU_SUPPORTS_32BIT_KERNEL
1693 select CPU_SUPPORTS_64BIT_KERNEL
1695 The options selects support for the NEC VR4100 series of processors.
1696 Only choose this option if you have one of these processors as a
1697 kernel built with this option will not run on any other type of
1698 processor or vice versa.
1702 depends on SYS_HAS_CPU_R4300
1703 select CPU_SUPPORTS_32BIT_KERNEL
1704 select CPU_SUPPORTS_64BIT_KERNEL
1705 select CPU_HAS_LOAD_STORE_LR
1707 MIPS Technologies R4300-series processors.
1711 depends on SYS_HAS_CPU_R4X00
1712 select CPU_SUPPORTS_32BIT_KERNEL
1713 select CPU_SUPPORTS_64BIT_KERNEL
1714 select CPU_SUPPORTS_HUGEPAGES
1716 MIPS Technologies R4000-series processors other than 4300, including
1717 the R4000, R4400, R4600, and 4700.
1721 depends on SYS_HAS_CPU_TX49XX
1722 select CPU_HAS_PREFETCH
1723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
1725 select CPU_SUPPORTS_HUGEPAGES
1729 depends on SYS_HAS_CPU_R5000
1730 select CPU_SUPPORTS_32BIT_KERNEL
1731 select CPU_SUPPORTS_64BIT_KERNEL
1732 select CPU_SUPPORTS_HUGEPAGES
1734 MIPS Technologies R5000-series processors other than the Nevada.
1738 depends on SYS_HAS_CPU_R5500
1739 select CPU_SUPPORTS_32BIT_KERNEL
1740 select CPU_SUPPORTS_64BIT_KERNEL
1741 select CPU_SUPPORTS_HUGEPAGES
1743 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1748 depends on SYS_HAS_CPU_NEVADA
1749 select CPU_SUPPORTS_32BIT_KERNEL
1750 select CPU_SUPPORTS_64BIT_KERNEL
1751 select CPU_SUPPORTS_HUGEPAGES
1753 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1757 depends on SYS_HAS_CPU_R10000
1758 select CPU_HAS_PREFETCH
1759 select CPU_SUPPORTS_32BIT_KERNEL
1760 select CPU_SUPPORTS_64BIT_KERNEL
1761 select CPU_SUPPORTS_HIGHMEM
1762 select CPU_SUPPORTS_HUGEPAGES
1764 MIPS Technologies R10000-series processors.
1768 depends on SYS_HAS_CPU_RM7000
1769 select CPU_HAS_PREFETCH
1770 select CPU_SUPPORTS_32BIT_KERNEL
1771 select CPU_SUPPORTS_64BIT_KERNEL
1772 select CPU_SUPPORTS_HIGHMEM
1773 select CPU_SUPPORTS_HUGEPAGES
1777 depends on SYS_HAS_CPU_SB1
1778 select CPU_SUPPORTS_32BIT_KERNEL
1779 select CPU_SUPPORTS_64BIT_KERNEL
1780 select CPU_SUPPORTS_HIGHMEM
1781 select CPU_SUPPORTS_HUGEPAGES
1782 select WEAK_ORDERING
1784 config CPU_CAVIUM_OCTEON
1785 bool "Cavium Octeon processor"
1786 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1787 select CPU_HAS_PREFETCH
1788 select CPU_SUPPORTS_64BIT_KERNEL
1789 select WEAK_ORDERING
1790 select CPU_SUPPORTS_HIGHMEM
1791 select CPU_SUPPORTS_HUGEPAGES
1792 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1793 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1794 select MIPS_L1_CACHE_SHIFT_7
1797 The Cavium Octeon processor is a highly integrated chip containing
1798 many ethernet hardware widgets for networking tasks. The processor
1799 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1800 Full details can be found at http://www.caviumnetworks.com.
1803 bool "Broadcom BMIPS"
1804 depends on SYS_HAS_CPU_BMIPS
1806 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1807 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1808 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1809 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1810 select CPU_SUPPORTS_32BIT_KERNEL
1811 select DMA_NONCOHERENT
1813 select SWAP_IO_SPACE
1814 select WEAK_ORDERING
1815 select CPU_SUPPORTS_HIGHMEM
1816 select CPU_HAS_PREFETCH
1817 select CPU_SUPPORTS_CPUFREQ
1818 select MIPS_EXTERNAL_TIMER
1820 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1823 bool "Netlogic XLR SoC"
1824 depends on SYS_HAS_CPU_XLR
1825 select CPU_SUPPORTS_32BIT_KERNEL
1826 select CPU_SUPPORTS_64BIT_KERNEL
1827 select CPU_SUPPORTS_HIGHMEM
1828 select CPU_SUPPORTS_HUGEPAGES
1829 select WEAK_ORDERING
1830 select WEAK_REORDERING_BEYOND_LLSC
1832 Netlogic Microsystems XLR/XLS processors.
1835 bool "Netlogic XLP SoC"
1836 depends on SYS_HAS_CPU_XLP
1837 select CPU_SUPPORTS_32BIT_KERNEL
1838 select CPU_SUPPORTS_64BIT_KERNEL
1839 select CPU_SUPPORTS_HIGHMEM
1840 select WEAK_ORDERING
1841 select WEAK_REORDERING_BEYOND_LLSC
1842 select CPU_HAS_PREFETCH
1844 select CPU_SUPPORTS_HUGEPAGES
1845 select MIPS_ASID_BITS_VARIABLE
1847 Netlogic Microsystems XLP processors.
1850 config CPU_MIPS32_3_5_FEATURES
1851 bool "MIPS32 Release 3.5 Features"
1852 depends on SYS_HAS_CPU_MIPS32_R3_5
1853 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1856 Choose this option to build a kernel for release 2 or later of the
1857 MIPS32 architecture including features from the 3.5 release such as
1858 support for Enhanced Virtual Addressing (EVA).
1860 config CPU_MIPS32_3_5_EVA
1861 bool "Enhanced Virtual Addressing (EVA)"
1862 depends on CPU_MIPS32_3_5_FEATURES
1866 Choose this option if you want to enable the Enhanced Virtual
1867 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1868 One of its primary benefits is an increase in the maximum size
1869 of lowmem (up to 3GB). If unsure, say 'N' here.
1871 config CPU_MIPS32_R5_FEATURES
1872 bool "MIPS32 Release 5 Features"
1873 depends on SYS_HAS_CPU_MIPS32_R5
1874 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1876 Choose this option to build a kernel for release 2 or later of the
1877 MIPS32 architecture including features from release 5 such as
1878 support for Extended Physical Addressing (XPA).
1880 config CPU_MIPS32_R5_XPA
1881 bool "Extended Physical Addressing (XPA)"
1882 depends on CPU_MIPS32_R5_FEATURES
1884 depends on !PAGE_SIZE_4KB
1885 depends on SYS_SUPPORTS_HIGHMEM
1888 select PHYS_ADDR_T_64BIT
1891 Choose this option if you want to enable the Extended Physical
1892 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1893 benefit is to increase physical addressing equal to or greater
1894 than 40 bits. Note that this has the side effect of turning on
1895 64-bit addressing which in turn makes the PTEs 64-bit in size.
1896 If unsure, say 'N' here.
1899 config CPU_NOP_WORKAROUNDS
1902 config CPU_JUMP_WORKAROUNDS
1905 config CPU_LOONGSON2F_WORKAROUNDS
1906 bool "Loongson 2F Workarounds"
1908 select CPU_NOP_WORKAROUNDS
1909 select CPU_JUMP_WORKAROUNDS
1911 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1912 require workarounds. Without workarounds the system may hang
1913 unexpectedly. For more information please refer to the gas
1914 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1916 Loongson 2F03 and later have fixed these issues and no workarounds
1917 are needed. The workarounds have no significant side effect on them
1918 but may decrease the performance of the system so this option should
1919 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1922 If unsure, please say Y.
1923 endif # CPU_LOONGSON2F
1925 config SYS_SUPPORTS_ZBOOT
1927 select HAVE_KERNEL_GZIP
1928 select HAVE_KERNEL_BZIP2
1929 select HAVE_KERNEL_LZ4
1930 select HAVE_KERNEL_LZMA
1931 select HAVE_KERNEL_LZO
1932 select HAVE_KERNEL_XZ
1933 select HAVE_KERNEL_ZSTD
1935 config SYS_SUPPORTS_ZBOOT_UART16550
1937 select SYS_SUPPORTS_ZBOOT
1939 config SYS_SUPPORTS_ZBOOT_UART_PROM
1941 select SYS_SUPPORTS_ZBOOT
1943 config CPU_LOONGSON2EF
1945 select CPU_SUPPORTS_32BIT_KERNEL
1946 select CPU_SUPPORTS_64BIT_KERNEL
1947 select CPU_SUPPORTS_HIGHMEM
1948 select CPU_SUPPORTS_HUGEPAGES
1949 select ARCH_HAS_PHYS_TO_DMA
1951 config CPU_LOONGSON32
1955 select CPU_HAS_PREFETCH
1956 select CPU_SUPPORTS_32BIT_KERNEL
1957 select CPU_SUPPORTS_HIGHMEM
1958 select CPU_SUPPORTS_CPUFREQ
1960 config CPU_BMIPS32_3300
1961 select SMP_UP if SMP
1964 config CPU_BMIPS4350
1966 select SYS_SUPPORTS_SMP
1967 select SYS_SUPPORTS_HOTPLUG_CPU
1969 config CPU_BMIPS4380
1971 select MIPS_L1_CACHE_SHIFT_6
1972 select SYS_SUPPORTS_SMP
1973 select SYS_SUPPORTS_HOTPLUG_CPU
1976 config CPU_BMIPS5000
1978 select MIPS_CPU_SCACHE
1979 select MIPS_L1_CACHE_SHIFT_7
1980 select SYS_SUPPORTS_SMP
1981 select SYS_SUPPORTS_HOTPLUG_CPU
1984 config SYS_HAS_CPU_LOONGSON64
1986 select CPU_SUPPORTS_CPUFREQ
1989 config SYS_HAS_CPU_LOONGSON2E
1992 config SYS_HAS_CPU_LOONGSON2F
1994 select CPU_SUPPORTS_CPUFREQ
1995 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1997 config SYS_HAS_CPU_LOONGSON1B
2000 config SYS_HAS_CPU_LOONGSON1C
2003 config SYS_HAS_CPU_MIPS32_R1
2006 config SYS_HAS_CPU_MIPS32_R2
2009 config SYS_HAS_CPU_MIPS32_R3_5
2012 config SYS_HAS_CPU_MIPS32_R5
2014 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2016 config SYS_HAS_CPU_MIPS32_R6
2018 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2020 config SYS_HAS_CPU_MIPS64_R1
2023 config SYS_HAS_CPU_MIPS64_R2
2026 config SYS_HAS_CPU_MIPS64_R6
2028 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2030 config SYS_HAS_CPU_P5600
2032 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2034 config SYS_HAS_CPU_R3000
2037 config SYS_HAS_CPU_TX39XX
2040 config SYS_HAS_CPU_VR41XX
2043 config SYS_HAS_CPU_R4300
2046 config SYS_HAS_CPU_R4X00
2049 config SYS_HAS_CPU_TX49XX
2052 config SYS_HAS_CPU_R5000
2055 config SYS_HAS_CPU_R5500
2058 config SYS_HAS_CPU_NEVADA
2061 config SYS_HAS_CPU_R10000
2063 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2065 config SYS_HAS_CPU_RM7000
2068 config SYS_HAS_CPU_SB1
2071 config SYS_HAS_CPU_CAVIUM_OCTEON
2074 config SYS_HAS_CPU_BMIPS
2077 config SYS_HAS_CPU_BMIPS32_3300
2079 select SYS_HAS_CPU_BMIPS
2081 config SYS_HAS_CPU_BMIPS4350
2083 select SYS_HAS_CPU_BMIPS
2085 config SYS_HAS_CPU_BMIPS4380
2087 select SYS_HAS_CPU_BMIPS
2089 config SYS_HAS_CPU_BMIPS5000
2091 select SYS_HAS_CPU_BMIPS
2092 select ARCH_HAS_SYNC_DMA_FOR_CPU
2094 config SYS_HAS_CPU_XLR
2097 config SYS_HAS_CPU_XLP
2101 # CPU may reorder R->R, R->W, W->R, W->W
2102 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2104 config WEAK_ORDERING
2108 # CPU may reorder reads and writes beyond LL/SC
2109 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2111 config WEAK_REORDERING_BEYOND_LLSC
2116 # These two indicate any level of the MIPS32 and MIPS64 architecture
2120 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2121 CPU_MIPS32_R6 || CPU_P5600
2125 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2126 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2129 # These indicate the revision of the architecture
2133 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2137 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2139 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2144 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2146 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2151 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2153 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2154 select HAVE_ARCH_BITREVERSE
2155 select MIPS_ASID_BITS_VARIABLE
2156 select MIPS_CRC_SUPPORT
2159 config TARGET_ISA_REV
2161 default 1 if CPU_MIPSR1
2162 default 2 if CPU_MIPSR2
2163 default 5 if CPU_MIPSR5
2164 default 6 if CPU_MIPSR6
2167 Reflects the ISA revision being targeted by the kernel build. This
2168 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2176 config SYS_SUPPORTS_32BIT_KERNEL
2178 config SYS_SUPPORTS_64BIT_KERNEL
2180 config CPU_SUPPORTS_32BIT_KERNEL
2182 config CPU_SUPPORTS_64BIT_KERNEL
2184 config CPU_SUPPORTS_CPUFREQ
2186 config CPU_SUPPORTS_ADDRWINCFG
2188 config CPU_SUPPORTS_HUGEPAGES
2190 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2191 config MIPS_PGD_C0_CONTEXT
2194 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2197 # Set to y for ptrace access to watch registers.
2199 config HARDWARE_WATCHPOINTS
2201 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2206 prompt "Kernel code model"
2208 You should only select this option if you have a workload that
2209 actually benefits from 64-bit processing or if your machine has
2210 large memory. You will only be presented a single option in this
2211 menu if your system does not support both 32-bit and 64-bit kernels.
2214 bool "32-bit kernel"
2215 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2218 Select this option if you want to build a 32-bit kernel.
2221 bool "64-bit kernel"
2222 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2224 Select this option if you want to build a 64-bit kernel.
2228 config MIPS_VA_BITS_48
2229 bool "48 bits virtual memory"
2232 Support a maximum at least 48 bits of application virtual
2233 memory. Default is 40 bits or less, depending on the CPU.
2234 For page sizes 16k and above, this option results in a small
2235 memory overhead for page tables. For 4k page size, a fourth
2236 level of page tables is added which imposes both a memory
2237 overhead as well as slower TLB fault handling.
2242 prompt "Kernel page size"
2243 default PAGE_SIZE_4KB
2245 config PAGE_SIZE_4KB
2247 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2249 This option select the standard 4kB Linux page size. On some
2250 R3000-family processors this is the only available page size. Using
2251 4kB page size will minimize memory consumption and is therefore
2252 recommended for low memory systems.
2254 config PAGE_SIZE_8KB
2256 depends on CPU_CAVIUM_OCTEON
2257 depends on !MIPS_VA_BITS_48
2259 Using 8kB page size will result in higher performance kernel at
2260 the price of higher memory consumption. This option is available
2261 only on cnMIPS processors. Note that you will need a suitable Linux
2262 distribution to support this.
2264 config PAGE_SIZE_16KB
2266 depends on !CPU_R3000 && !CPU_TX39XX
2268 Using 16kB page size will result in higher performance kernel at
2269 the price of higher memory consumption. This option is available on
2270 all non-R3000 family processors. Note that you will need a suitable
2271 Linux distribution to support this.
2273 config PAGE_SIZE_32KB
2275 depends on CPU_CAVIUM_OCTEON
2276 depends on !MIPS_VA_BITS_48
2278 Using 32kB page size will result in higher performance kernel at
2279 the price of higher memory consumption. This option is available
2280 only on cnMIPS cores. Note that you will need a suitable Linux
2281 distribution to support this.
2283 config PAGE_SIZE_64KB
2285 depends on !CPU_R3000 && !CPU_TX39XX
2287 Using 64kB page size will result in higher performance kernel at
2288 the price of higher memory consumption. This option is available on
2289 all non-R3000 family processor. Not that at the time of this
2290 writing this option is still high experimental.
2294 config FORCE_MAX_ZONEORDER
2295 int "Maximum zone order"
2296 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2297 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2298 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2299 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2300 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2301 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2305 The kernel memory allocator divides physically contiguous memory
2306 blocks into "zones", where each zone is a power of two number of
2307 pages. This option selects the largest power of two that the kernel
2308 keeps in the memory allocator. If you need to allocate very large
2309 blocks of physically contiguous memory, then you may need to
2310 increase this value.
2312 This config option is actually maximum order plus one. For example,
2313 a value of 11 means that the largest free memory block is 2^10 pages.
2315 The page size is not necessarily 4KB. Keep this in mind
2316 when choosing a value for this option.
2321 config IP22_CPU_SCACHE
2326 # Support for a MIPS32 / MIPS64 style S-caches
2328 config MIPS_CPU_SCACHE
2332 config R5000_CPU_SCACHE
2336 config RM7000_CPU_SCACHE
2340 config SIBYTE_DMA_PAGEOPS
2341 bool "Use DMA to clear/copy pages"
2344 Instead of using the CPU to zero and copy pages, use a Data Mover
2345 channel. These DMA channels are otherwise unused by the standard
2346 SiByte Linux port. Seems to give a small performance benefit.
2348 config CPU_HAS_PREFETCH
2351 config CPU_GENERIC_DUMP_TLB
2353 default y if !(CPU_R3000 || CPU_TX39XX)
2355 config MIPS_FP_SUPPORT
2356 bool "Floating Point support" if EXPERT
2359 Select y to include support for floating point in the kernel
2360 including initialization of FPU hardware, FP context save & restore
2361 and emulation of an FPU where necessary. Without this support any
2362 userland program attempting to use floating point instructions will
2365 If you know that your userland will not attempt to use floating point
2366 instructions then you can say n here to shrink the kernel a little.
2370 config CPU_R2300_FPU
2372 depends on MIPS_FP_SUPPORT
2373 default y if CPU_R3000 || CPU_TX39XX
2380 depends on MIPS_FP_SUPPORT
2381 default y if !CPU_R2300_FPU
2383 config CPU_R4K_CACHE_TLB
2385 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2388 bool "MIPS MT SMP support (1 TC on each available VPE)"
2390 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2391 select CPU_MIPSR2_IRQ_VI
2392 select CPU_MIPSR2_IRQ_EI
2397 select SYS_SUPPORTS_SMP
2398 select SYS_SUPPORTS_SCHED_SMT
2399 select MIPS_PERF_SHARED_TC_COUNTERS
2401 This is a kernel model which is known as SMVP. This is supported
2402 on cores with the MT ASE and uses the available VPEs to implement
2403 virtual processors which supports SMP. This is equivalent to the
2404 Intel Hyperthreading feature. For further information go to
2405 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2411 bool "SMT (multithreading) scheduler support"
2412 depends on SYS_SUPPORTS_SCHED_SMT
2415 SMT scheduler support improves the CPU scheduler's decision making
2416 when dealing with MIPS MT enabled cores at a cost of slightly
2417 increased overhead in some places. If unsure say N here.
2419 config SYS_SUPPORTS_SCHED_SMT
2422 config SYS_SUPPORTS_MULTITHREADING
2425 config MIPS_MT_FPAFF
2426 bool "Dynamic FPU affinity for FP-intensive threads"
2428 depends on MIPS_MT_SMP
2430 config MIPSR2_TO_R6_EMULATOR
2431 bool "MIPS R2-to-R6 emulator"
2432 depends on CPU_MIPSR6
2433 depends on MIPS_FP_SUPPORT
2436 Choose this option if you want to run non-R6 MIPS userland code.
2437 Even if you say 'Y' here, the emulator will still be disabled by
2438 default. You can enable it using the 'mipsr2emu' kernel option.
2439 The only reason this is a build-time option is to save ~14K from the
2442 config SYS_SUPPORTS_VPE_LOADER
2444 depends on SYS_SUPPORTS_MULTITHREADING
2446 Indicates that the platform supports the VPE loader, and provides
2449 config MIPS_VPE_LOADER
2450 bool "VPE loader support."
2451 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2452 select CPU_MIPSR2_IRQ_VI
2453 select CPU_MIPSR2_IRQ_EI
2456 Includes a loader for loading an elf relocatable object
2457 onto another VPE and running it.
2459 config MIPS_VPE_LOADER_CMP
2462 depends on MIPS_VPE_LOADER && MIPS_CMP
2464 config MIPS_VPE_LOADER_MT
2467 depends on MIPS_VPE_LOADER && !MIPS_CMP
2469 config MIPS_VPE_LOADER_TOM
2470 bool "Load VPE program into memory hidden from linux"
2471 depends on MIPS_VPE_LOADER
2474 The loader can use memory that is present but has been hidden from
2475 Linux using the kernel command line option "mem=xxMB". It's up to
2476 you to ensure the amount you put in the option and the space your
2477 program requires is less or equal to the amount physically present.
2479 config MIPS_VPE_APSP_API
2480 bool "Enable support for AP/SP API (RTLX)"
2481 depends on MIPS_VPE_LOADER
2483 config MIPS_VPE_APSP_API_CMP
2486 depends on MIPS_VPE_APSP_API && MIPS_CMP
2488 config MIPS_VPE_APSP_API_MT
2491 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2494 bool "MIPS CMP framework support (DEPRECATED)"
2495 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2498 select SYS_SUPPORTS_SMP
2499 select WEAK_ORDERING
2502 Select this if you are using a bootloader which implements the "CMP
2503 framework" protocol (ie. YAMON) and want your kernel to make use of
2504 its ability to start secondary CPUs.
2506 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2510 bool "MIPS Coherent Processing System support"
2511 depends on SYS_SUPPORTS_MIPS_CPS
2513 select MIPS_CPS_PM if HOTPLUG_CPU
2515 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2516 select SYS_SUPPORTS_HOTPLUG_CPU
2517 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2518 select SYS_SUPPORTS_SMP
2519 select WEAK_ORDERING
2520 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2522 Select this if you wish to run an SMP kernel across multiple cores
2523 within a MIPS Coherent Processing System. When this option is
2524 enabled the kernel will probe for other cores and boot them with
2525 no external assistance. It is safe to enable this when hardware
2526 support is unavailable.
2539 config SB1_PASS_2_WORKAROUNDS
2541 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2544 config SB1_PASS_2_1_WORKAROUNDS
2546 depends on CPU_SB1 && CPU_SB1_PASS_2
2550 prompt "SmartMIPS or microMIPS ASE support"
2552 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2555 Select this if you want neither microMIPS nor SmartMIPS support
2557 config CPU_HAS_SMARTMIPS
2558 depends on SYS_SUPPORTS_SMARTMIPS
2561 SmartMIPS is a extension of the MIPS32 architecture aimed at
2562 increased security at both hardware and software level for
2563 smartcards. Enabling this option will allow proper use of the
2564 SmartMIPS instructions by Linux applications. However a kernel with
2565 this option will not work on a MIPS core without SmartMIPS core. If
2566 you don't know you probably don't have SmartMIPS and should say N
2569 config CPU_MICROMIPS
2570 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2573 When this option is enabled the kernel will be built using the
2579 bool "Support for the MIPS SIMD Architecture"
2580 depends on CPU_SUPPORTS_MSA
2581 depends on MIPS_FP_SUPPORT
2582 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2584 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2585 and a set of SIMD instructions to operate on them. When this option
2586 is enabled the kernel will support allocating & switching MSA
2587 vector register contexts. If you know that your kernel will only be
2588 running on CPUs which do not support MSA or that your userland will
2589 not be making use of it then you may wish to say N here to reduce
2590 the size & complexity of your kernel.
2601 depends on !CPU_DIEI_BROKEN
2604 config CPU_DIEI_BROKEN
2610 config CPU_NO_LOAD_STORE_LR
2613 CPU lacks support for unaligned load and store instructions:
2614 LWL, LWR, SWL, SWR (Load/store word left/right).
2615 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2619 # Vectored interrupt mode is an R2 feature
2621 config CPU_MIPSR2_IRQ_VI
2625 # Extended interrupt mode is an R2 feature
2627 config CPU_MIPSR2_IRQ_EI
2632 depends on !CPU_R3000
2638 config CPU_DADDI_WORKAROUNDS
2641 config CPU_R4000_WORKAROUNDS
2643 select CPU_R4400_WORKAROUNDS
2645 config CPU_R4400_WORKAROUNDS
2648 config CPU_R4X00_BUGS64
2650 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2652 config MIPS_ASID_SHIFT
2654 default 6 if CPU_R3000 || CPU_TX39XX
2657 config MIPS_ASID_BITS
2659 default 0 if MIPS_ASID_BITS_VARIABLE
2660 default 6 if CPU_R3000 || CPU_TX39XX
2663 config MIPS_ASID_BITS_VARIABLE
2666 config MIPS_CRC_SUPPORT
2669 # R4600 erratum. Due to the lack of errata information the exact
2670 # technical details aren't known. I've experimentally found that disabling
2671 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2673 config WAR_R4600_V1_INDEX_ICACHEOP
2676 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2678 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2679 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2680 # executed if there is no other dcache activity. If the dcache is
2681 # accessed for another instruction immediately preceding when these
2682 # cache instructions are executing, it is possible that the dcache
2683 # tag match outputs used by these cache instructions will be
2684 # incorrect. These cache instructions should be preceded by at least
2685 # four instructions that are not any kind of load or store
2688 # This is not allowed: lw
2692 # cache Hit_Writeback_Invalidate_D
2694 # This is allowed: lw
2699 # cache Hit_Writeback_Invalidate_D
2700 config WAR_R4600_V1_HIT_CACHEOP
2703 # Writeback and invalidate the primary cache dcache before DMA.
2705 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2706 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2707 # operate correctly if the internal data cache refill buffer is empty. These
2708 # CACHE instructions should be separated from any potential data cache miss
2709 # by a load instruction to an uncached address to empty the response buffer."
2710 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2712 config WAR_R4600_V2_HIT_CACHEOP
2715 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2716 # the line which this instruction itself exists, the following
2717 # operation is not guaranteed."
2719 # Workaround: do two phase flushing for Index_Invalidate_I
2720 config WAR_TX49XX_ICACHE_INDEX_INV
2723 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2724 # opposes it being called that) where invalid instructions in the same
2725 # I-cache line worth of instructions being fetched may case spurious
2727 config WAR_ICACHE_REFILLS
2730 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2731 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2732 config WAR_R10000_LLSC
2735 # 34K core erratum: "Problems Executing the TLBR Instruction"
2736 config WAR_MIPS34K_MISSED_ITLB
2740 # - Highmem only makes sense for the 32-bit kernel.
2741 # - The current highmem code will only work properly on physically indexed
2742 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2743 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2744 # moment we protect the user and offer the highmem option only on machines
2745 # where it's known to be safe. This will not offer highmem on a few systems
2746 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2747 # indexed CPUs but we're playing safe.
2748 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2749 # know they might have memory configurations that could make use of highmem
2753 bool "High Memory Support"
2754 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2757 config CPU_SUPPORTS_HIGHMEM
2760 config SYS_SUPPORTS_HIGHMEM
2763 config SYS_SUPPORTS_SMARTMIPS
2766 config SYS_SUPPORTS_MICROMIPS
2769 config SYS_SUPPORTS_MIPS16
2772 This option must be set if a kernel might be executed on a MIPS16-
2773 enabled CPU even if MIPS16 is not actually being used. In other
2774 words, it makes the kernel MIPS16-tolerant.
2776 config CPU_SUPPORTS_MSA
2779 config ARCH_FLATMEM_ENABLE
2781 depends on !NUMA && !CPU_LOONGSON2EF
2783 config ARCH_SPARSEMEM_ENABLE
2785 select SPARSEMEM_STATIC if !SGI_IP27
2789 depends on SYS_SUPPORTS_NUMA
2792 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2793 Access). This option improves performance on systems with more
2794 than two nodes; on two node systems it is generally better to
2795 leave it disabled; on single node systems leave this option
2798 config SYS_SUPPORTS_NUMA
2801 config HAVE_SETUP_PER_CPU_AREA
2805 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2810 bool "Relocatable kernel"
2811 depends on SYS_SUPPORTS_RELOCATABLE
2812 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2813 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2814 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2815 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2818 This builds a kernel image that retains relocation information
2819 so it can be loaded someplace besides the default 1MB.
2820 The relocations make the kernel binary about 15% larger,
2821 but are discarded at runtime
2823 config RELOCATION_TABLE_SIZE
2824 hex "Relocation table size"
2825 depends on RELOCATABLE
2826 range 0x0 0x01000000
2827 default "0x00200000" if CPU_LOONGSON64
2828 default "0x00100000"
2830 A table of relocation data will be appended to the kernel binary
2831 and parsed at boot to fix up the relocated kernel.
2833 This option allows the amount of space reserved for the table to be
2834 adjusted, although the default of 1Mb should be ok in most cases.
2836 The build will fail and a valid size suggested if this is too small.
2838 If unsure, leave at the default value.
2840 config RANDOMIZE_BASE
2841 bool "Randomize the address of the kernel image"
2842 depends on RELOCATABLE
2844 Randomizes the physical and virtual address at which the
2845 kernel image is loaded, as a security feature that
2846 deters exploit attempts relying on knowledge of the location
2847 of kernel internals.
2849 Entropy is generated using any coprocessor 0 registers available.
2851 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2855 config RANDOMIZE_BASE_MAX_OFFSET
2856 hex "Maximum kASLR offset" if EXPERT
2857 depends on RANDOMIZE_BASE
2858 range 0x0 0x40000000 if EVA || 64BIT
2859 range 0x0 0x08000000
2860 default "0x01000000"
2862 When kASLR is active, this provides the maximum offset that will
2863 be applied to the kernel image. It should be set according to the
2864 amount of physical RAM available in the target system minus
2865 PHYSICAL_START and must be a power of 2.
2867 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2868 EVA or 64-bit. The default is 16Mb.
2873 depends on NEED_MULTIPLE_NODES
2875 config HW_PERF_EVENTS
2876 bool "Enable hardware performance counter support for perf events"
2877 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2880 Enable hardware performance counter support for perf events. If
2881 disabled, perf events will use software events only.
2884 bool "Enable DMI scanning"
2885 depends on MACH_LOONGSON64
2886 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2889 Enabled scanning of DMI to identify machine quirks. Say Y
2890 here unless you have verified that your setup is not
2891 affected by entries in the DMI blacklist. Required by PNP
2895 bool "Multi-Processing support"
2896 depends on SYS_SUPPORTS_SMP
2898 This enables support for systems with more than one CPU. If you have
2899 a system with only one CPU, say N. If you have a system with more
2900 than one CPU, say Y.
2902 If you say N here, the kernel will run on uni- and multiprocessor
2903 machines, but will use only one CPU of a multiprocessor machine. If
2904 you say Y here, the kernel will run on many, but not all,
2905 uniprocessor machines. On a uniprocessor machine, the kernel
2906 will run faster if you say N here.
2908 People using multiprocessor machines who say Y here should also say
2909 Y to "Enhanced Real Time Clock Support", below.
2911 See also the SMP-HOWTO available at
2912 <https://www.tldp.org/docs.html#howto>.
2914 If you don't know what to do here, say N.
2917 bool "Support for hot-pluggable CPUs"
2918 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2920 Say Y here to allow turning CPUs off and on. CPUs can be
2921 controlled through /sys/devices/system/cpu.
2922 (Note: power management support will enable this option
2923 automatically on SMP systems. )
2924 Say N if you want to disable CPU hotplug.
2929 config SYS_SUPPORTS_MIPS_CMP
2932 config SYS_SUPPORTS_MIPS_CPS
2935 config SYS_SUPPORTS_SMP
2938 config NR_CPUS_DEFAULT_4
2941 config NR_CPUS_DEFAULT_8
2944 config NR_CPUS_DEFAULT_16
2947 config NR_CPUS_DEFAULT_32
2950 config NR_CPUS_DEFAULT_64
2954 int "Maximum number of CPUs (2-256)"
2957 default "4" if NR_CPUS_DEFAULT_4
2958 default "8" if NR_CPUS_DEFAULT_8
2959 default "16" if NR_CPUS_DEFAULT_16
2960 default "32" if NR_CPUS_DEFAULT_32
2961 default "64" if NR_CPUS_DEFAULT_64
2963 This allows you to specify the maximum number of CPUs which this
2964 kernel will support. The maximum supported value is 32 for 32-bit
2965 kernel and 64 for 64-bit kernels; the minimum value which makes
2966 sense is 1 for Qemu (useful only for kernel debugging purposes)
2967 and 2 for all others.
2969 This is purely to save memory - each supported CPU adds
2970 approximately eight kilobytes to the kernel image. For best
2971 performance should round up your number of processors to the next
2974 config MIPS_PERF_SHARED_TC_COUNTERS
2977 config MIPS_NR_CPU_NR_MAP_1024
2980 config MIPS_NR_CPU_NR_MAP
2983 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2984 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2987 # Timer Interrupt Frequency Configuration
2991 prompt "Timer frequency"
2994 Allows the configuration of the timer frequency.
2997 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
3000 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
3003 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
3006 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3009 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3012 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3015 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3018 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3022 config SYS_SUPPORTS_24HZ
3025 config SYS_SUPPORTS_48HZ
3028 config SYS_SUPPORTS_100HZ
3031 config SYS_SUPPORTS_128HZ
3034 config SYS_SUPPORTS_250HZ
3037 config SYS_SUPPORTS_256HZ
3040 config SYS_SUPPORTS_1000HZ
3043 config SYS_SUPPORTS_1024HZ
3046 config SYS_SUPPORTS_ARBIT_HZ
3048 default y if !SYS_SUPPORTS_24HZ && \
3049 !SYS_SUPPORTS_48HZ && \
3050 !SYS_SUPPORTS_100HZ && \
3051 !SYS_SUPPORTS_128HZ && \
3052 !SYS_SUPPORTS_250HZ && \
3053 !SYS_SUPPORTS_256HZ && \
3054 !SYS_SUPPORTS_1000HZ && \
3055 !SYS_SUPPORTS_1024HZ
3061 default 100 if HZ_100
3062 default 128 if HZ_128
3063 default 250 if HZ_250
3064 default 256 if HZ_256
3065 default 1000 if HZ_1000
3066 default 1024 if HZ_1024
3069 def_bool HIGH_RES_TIMERS
3072 bool "Kexec system call"
3075 kexec is a system call that implements the ability to shutdown your
3076 current kernel, and to start another kernel. It is like a reboot
3077 but it is independent of the system firmware. And like a reboot
3078 you can start any kernel with it, not just Linux.
3080 The name comes from the similarity to the exec system call.
3082 It is an ongoing process to be certain the hardware in a machine
3083 is properly shutdown, so do not be surprised if this code does not
3084 initially work for you. As of this writing the exact hardware
3085 interface is strongly in flux, so no good recommendation can be
3089 bool "Kernel crash dumps"
3091 Generate crash dump after being started by kexec.
3092 This should be normally only set in special crash dump kernels
3093 which are loaded in the main kernel with kexec-tools into
3094 a specially reserved region and then later executed after
3095 a crash by kdump/kexec. The crash dump kernel must be compiled
3096 to a memory address not used by the main kernel or firmware using
3099 config PHYSICAL_START
3100 hex "Physical address where the kernel is loaded"
3101 default "0xffffffff84000000"
3102 depends on CRASH_DUMP
3104 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3105 If you plan to use kernel for capturing the crash dump change
3106 this value to start of the reserved region (the "X" value as
3107 specified in the "crashkernel=YM@XM" command line boot parameter
3108 passed to the panic-ed kernel).
3110 config MIPS_O32_FP64_SUPPORT
3111 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3112 depends on 32BIT || MIPS32_O32
3114 When this is enabled, the kernel will support use of 64-bit floating
3115 point registers with binaries using the O32 ABI along with the
3116 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3117 32-bit MIPS systems this support is at the cost of increasing the
3118 size and complexity of the compiled FPU emulator. Thus if you are
3119 running a MIPS32 system and know that none of your userland binaries
3120 will require 64-bit floating point, you may wish to reduce the size
3121 of your kernel & potentially improve FP emulation performance by
3124 Although binutils currently supports use of this flag the details
3125 concerning its effect upon the O32 ABI in userland are still being
3126 worked on. In order to avoid userland becoming dependent upon current
3127 behaviour before the details have been finalised, this option should
3128 be considered experimental and only enabled by those working upon
3136 select OF_EARLY_FLATTREE
3146 prompt "Kernel appended dtb support" if USE_OF
3147 default MIPS_NO_APPENDED_DTB
3149 config MIPS_NO_APPENDED_DTB
3152 Do not enable appended dtb support.
3154 config MIPS_ELF_APPENDED_DTB
3157 With this option, the boot code will look for a device tree binary
3158 DTB) included in the vmlinux ELF section .appended_dtb. By default
3159 it is empty and the DTB can be appended using binutils command
3162 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3164 This is meant as a backward compatibility convenience for those
3165 systems with a bootloader that can't be upgraded to accommodate
3166 the documented boot protocol using a device tree.
3168 config MIPS_RAW_APPENDED_DTB
3169 bool "vmlinux.bin or vmlinuz.bin"
3171 With this option, the boot code will look for a device tree binary
3172 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3173 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3175 This is meant as a backward compatibility convenience for those
3176 systems with a bootloader that can't be upgraded to accommodate
3177 the documented boot protocol using a device tree.
3179 Beware that there is very little in terms of protection against
3180 this option being confused by leftover garbage in memory that might
3181 look like a DTB header after a reboot if no actual DTB is appended
3182 to vmlinux.bin. Do not leave this option active in a production kernel
3183 if you don't intend to always append a DTB.
3187 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3188 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3189 !MACH_LOONGSON64 && !MIPS_MALTA && \
3191 default MIPS_CMDLINE_FROM_BOOTLOADER
3193 config MIPS_CMDLINE_FROM_DTB
3195 bool "Dtb kernel arguments if available"
3197 config MIPS_CMDLINE_DTB_EXTEND
3199 bool "Extend dtb kernel arguments with bootloader arguments"
3201 config MIPS_CMDLINE_FROM_BOOTLOADER
3202 bool "Bootloader kernel arguments if available"
3204 config MIPS_CMDLINE_BUILTIN_EXTEND
3205 depends on CMDLINE_BOOL
3206 bool "Extend builtin kernel arguments with bootloader arguments"
3211 config LOCKDEP_SUPPORT
3215 config STACKTRACE_SUPPORT
3219 config PGTABLE_LEVELS
3221 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3222 default 3 if 64BIT && !PAGE_SIZE_64KB
3225 config MIPS_AUTO_PFN_OFFSET
3228 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3230 config PCI_DRIVERS_GENERIC
3231 select PCI_DOMAINS_GENERIC if PCI
3234 config PCI_DRIVERS_LEGACY
3235 def_bool !PCI_DRIVERS_GENERIC
3236 select NO_GENERIC_PCI_IOPORT_MAP
3237 select PCI_DOMAINS if PCI
3240 # ISA support is now enabled via select. Too many systems still have the one
3241 # or other ISA chip on the board that users don't know about so don't expect
3242 # users to choose the right thing ...
3248 bool "TURBOchannel support"
3249 depends on MACH_DECSTATION
3251 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3252 processors. TURBOchannel programming specifications are available
3254 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3256 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3257 Linux driver support status is documented at:
3258 <http://www.linux-mips.org/wiki/DECstation>
3264 config ARCH_MMAP_RND_BITS_MIN
3268 config ARCH_MMAP_RND_BITS_MAX
3272 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3275 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3282 select MIPS_EXTERNAL_TIMER
3295 config MIPS32_COMPAT
3301 config SYSVIPC_COMPAT
3305 bool "Kernel support for o32 binaries"
3307 select ARCH_WANT_OLD_COMPAT_IPC
3309 select MIPS32_COMPAT
3310 select SYSVIPC_COMPAT if SYSVIPC
3312 Select this option if you want to run o32 binaries. These are pure
3313 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3314 existing binaries are in this format.
3319 bool "Kernel support for n32 binaries"
3321 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3323 select MIPS32_COMPAT
3324 select SYSVIPC_COMPAT if SYSVIPC
3326 Select this option if you want to run n32 binaries. These are
3327 64-bit binaries using 32-bit quantities for addressing and certain
3328 data that would normally be 64-bit. They are used in special
3333 menu "Power management options"
3335 config ARCH_HIBERNATION_POSSIBLE
3337 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3339 config ARCH_SUSPEND_POSSIBLE
3341 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3343 source "kernel/power/Kconfig"
3347 config MIPS_EXTERNAL_TIMER
3350 menu "CPU Power Management"
3352 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3353 source "drivers/cpufreq/Kconfig"
3356 source "drivers/cpuidle/Kconfig"
3360 source "drivers/firmware/Kconfig"
3362 source "arch/mips/kvm/Kconfig"
3364 source "arch/mips/vdso/Kconfig"