1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_MEMTEST
20 select ARCH_USE_QUEUED_RWLOCKS
21 select ARCH_USE_QUEUED_SPINLOCKS
22 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24 select ARCH_WANT_IPC_PARSE_VERSION
25 select ARCH_WANT_LD_ORPHAN_WARN
26 select BUILDTIME_TABLE_SORT
27 select CLONE_BACKWARDS
28 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29 select CPU_PM if CPU_IDLE
30 select GENERIC_ATOMIC64 if !64BIT
31 select GENERIC_CMOS_UPDATE
32 select GENERIC_CPU_AUTOPROBE
33 select GENERIC_FIND_FIRST_BIT
34 select GENERIC_GETTIMEOFDAY
36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
38 select GENERIC_ISA_DMA if EISA
39 select GENERIC_LIB_ASHLDI3
40 select GENERIC_LIB_ASHRDI3
41 select GENERIC_LIB_CMPDI2
42 select GENERIC_LIB_LSHRDI3
43 select GENERIC_LIB_UCMPDI2
44 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45 select GENERIC_SMP_IDLE_THREAD
46 select GENERIC_TIME_VSYSCALL
47 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48 select HANDLE_DOMAIN_IRQ
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59 select HAVE_CONTEXT_TRACKING
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67 select HAVE_EXIT_THREAD
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
75 select HAVE_IOREMAP_PROT
76 select HAVE_IRQ_EXIT_ON_IRQ_STACK
77 select HAVE_IRQ_TIME_ACCOUNTING
79 select HAVE_KRETPROBES
80 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
81 select HAVE_MOD_ARCH_SPECIFIC
83 select HAVE_PERF_EVENTS
85 select HAVE_PERF_USER_STACK_DUMP
86 select HAVE_REGS_AND_STACK_ACCESS_API
88 select HAVE_SPARSE_SYSCALL_NR
89 select HAVE_STACKPROTECTOR
90 select HAVE_SYSCALL_TRACEPOINTS
91 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
92 select IRQ_FORCED_THREADING
94 select MODULES_USE_ELF_REL if MODULES
95 select MODULES_USE_ELF_RELA if MODULES && 64BIT
96 select PERF_USE_VMALLOC
97 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
99 select SYSCTL_EXCEPTION_TRACE
101 select ARCH_HAS_ELFCORE_COMPAT
103 config MIPS_FIXUP_BIGPHYS_ADDR
111 select SYS_SUPPORTS_32BIT_KERNEL
112 select SYS_SUPPORTS_LITTLE_ENDIAN
113 select SYS_SUPPORTS_ZBOOT
114 select DMA_NONCOHERENT
115 select ARCH_HAS_SYNC_DMA_FOR_CPU
120 select GENERIC_IRQ_CHIP
121 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
123 select CPU_SUPPORTS_CPUFREQ
124 select MIPS_EXTERNAL_TIMER
126 menu "Machine selection"
130 default MIPS_GENERIC_KERNEL
132 config MIPS_GENERIC_KERNEL
133 bool "Generic board-agnostic MIPS kernel"
134 select ARCH_HAS_SETUP_DMA_OPS
139 select CLKSRC_MIPS_GIC
141 select CPU_MIPSR2_IRQ_EI
142 select CPU_MIPSR2_IRQ_VI
144 select DMA_NONCOHERENT
147 select MIPS_AUTO_PFN_OFFSET
148 select MIPS_CPU_SCACHE
150 select MIPS_L1_CACHE_SHIFT_7
151 select NO_EXCEPT_FILL
152 select PCI_DRIVERS_GENERIC
155 select SYS_HAS_CPU_MIPS32_R1
156 select SYS_HAS_CPU_MIPS32_R2
157 select SYS_HAS_CPU_MIPS32_R6
158 select SYS_HAS_CPU_MIPS64_R1
159 select SYS_HAS_CPU_MIPS64_R2
160 select SYS_HAS_CPU_MIPS64_R6
161 select SYS_SUPPORTS_32BIT_KERNEL
162 select SYS_SUPPORTS_64BIT_KERNEL
163 select SYS_SUPPORTS_BIG_ENDIAN
164 select SYS_SUPPORTS_HIGHMEM
165 select SYS_SUPPORTS_LITTLE_ENDIAN
166 select SYS_SUPPORTS_MICROMIPS
167 select SYS_SUPPORTS_MIPS16
168 select SYS_SUPPORTS_MIPS_CPS
169 select SYS_SUPPORTS_MULTITHREADING
170 select SYS_SUPPORTS_RELOCATABLE
171 select SYS_SUPPORTS_SMARTMIPS
172 select SYS_SUPPORTS_ZBOOT
174 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
175 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
176 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
177 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
178 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
182 Select this to build a kernel which aims to support multiple boards,
183 generally using a flattened device tree passed from the bootloader
184 using the boot protocol defined in the UHI (Unified Hosting
185 Interface) specification.
188 bool "Alchemy processor based machines"
189 select PHYS_ADDR_T_64BIT
193 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
194 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
195 select SYS_HAS_CPU_MIPS32_R1
196 select SYS_SUPPORTS_32BIT_KERNEL
197 select SYS_SUPPORTS_APM_EMULATION
199 select SYS_SUPPORTS_ZBOOT
203 bool "Texas Instruments AR7"
206 select DMA_NONCOHERENT
210 select NO_EXCEPT_FILL
212 select SYS_HAS_CPU_MIPS32_R1
213 select SYS_HAS_EARLY_PRINTK
214 select SYS_SUPPORTS_32BIT_KERNEL
215 select SYS_SUPPORTS_LITTLE_ENDIAN
216 select SYS_SUPPORTS_MIPS16
217 select SYS_SUPPORTS_ZBOOT_UART16550
221 Support for the Texas Instruments AR7 System-on-a-Chip
222 family: TNETD7100, 7200 and 7300.
225 bool "Atheros AR231x/AR531x SoC support"
228 select DMA_NONCOHERENT
231 select SYS_HAS_CPU_MIPS32_R1
232 select SYS_SUPPORTS_BIG_ENDIAN
233 select SYS_SUPPORTS_32BIT_KERNEL
234 select SYS_HAS_EARLY_PRINTK
236 Support for Atheros AR231x and Atheros AR531x based boards
239 bool "Atheros AR71XX/AR724X/AR913X based boards"
240 select ARCH_HAS_RESET_CONTROLLER
244 select DMA_NONCOHERENT
249 select SYS_HAS_CPU_MIPS32_R2
250 select SYS_HAS_EARLY_PRINTK
251 select SYS_SUPPORTS_32BIT_KERNEL
252 select SYS_SUPPORTS_BIG_ENDIAN
253 select SYS_SUPPORTS_MIPS16
254 select SYS_SUPPORTS_ZBOOT_UART_PROM
256 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
258 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
261 bool "Broadcom Generic BMIPS kernel"
262 select ARCH_HAS_RESET_CONTROLLER
263 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
264 select ARCH_HAS_PHYS_TO_DMA
266 select NO_EXCEPT_FILL
272 select BCM6345_L1_IRQ
273 select BCM7038_L1_IRQ
274 select BCM7120_L2_IRQ
275 select BRCMSTB_L2_IRQ
277 select DMA_NONCOHERENT
278 select SYS_SUPPORTS_32BIT_KERNEL
279 select SYS_SUPPORTS_LITTLE_ENDIAN
280 select SYS_SUPPORTS_BIG_ENDIAN
281 select SYS_SUPPORTS_HIGHMEM
282 select SYS_HAS_CPU_BMIPS32_3300
283 select SYS_HAS_CPU_BMIPS4350
284 select SYS_HAS_CPU_BMIPS4380
285 select SYS_HAS_CPU_BMIPS5000
287 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
288 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select HARDIRQS_SW_RESEND
293 Build a generic DT-based kernel image that boots on select
294 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
295 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
296 must be set appropriately for your board.
299 bool "Broadcom BCM47XX based boards"
303 select DMA_NONCOHERENT
306 select SYS_HAS_CPU_MIPS32_R1
307 select NO_EXCEPT_FILL
308 select SYS_SUPPORTS_32BIT_KERNEL
309 select SYS_SUPPORTS_LITTLE_ENDIAN
310 select SYS_SUPPORTS_MIPS16
311 select SYS_SUPPORTS_ZBOOT
312 select SYS_HAS_EARLY_PRINTK
313 select USE_GENERIC_EARLY_PRINTK_8250
315 select LEDS_GPIO_REGISTER
318 select BCM47XX_SSB if !BCM47XX_BCMA
320 Support for BCM47XX based boards
323 bool "Broadcom BCM63XX based boards"
328 select DMA_NONCOHERENT
330 select SYS_SUPPORTS_32BIT_KERNEL
331 select SYS_SUPPORTS_BIG_ENDIAN
332 select SYS_HAS_EARLY_PRINTK
335 select MIPS_L1_CACHE_SHIFT_4
336 select HAVE_LEGACY_CLK
338 Support for BCM63XX based boards
345 select DMA_NONCOHERENT
351 select PCI_GT64XXX_PCI0
352 select SYS_HAS_CPU_NEVADA
353 select SYS_HAS_EARLY_PRINTK
354 select SYS_SUPPORTS_32BIT_KERNEL
355 select SYS_SUPPORTS_64BIT_KERNEL
356 select SYS_SUPPORTS_LITTLE_ENDIAN
357 select USE_GENERIC_EARLY_PRINTK_8250
359 config MACH_DECSTATION
363 select CEVT_R4K if CPU_R4X00
365 select CSRC_R4K if CPU_R4X00
366 select CPU_DADDI_WORKAROUNDS if 64BIT
367 select CPU_R4000_WORKAROUNDS if 64BIT
368 select CPU_R4400_WORKAROUNDS if 64BIT
369 select DMA_NONCOHERENT
372 select SYS_HAS_CPU_R3000
373 select SYS_HAS_CPU_R4X00
374 select SYS_SUPPORTS_32BIT_KERNEL
375 select SYS_SUPPORTS_64BIT_KERNEL
376 select SYS_SUPPORTS_LITTLE_ENDIAN
377 select SYS_SUPPORTS_128HZ
378 select SYS_SUPPORTS_256HZ
379 select SYS_SUPPORTS_1024HZ
380 select MIPS_L1_CACHE_SHIFT_4
382 This enables support for DEC's MIPS based workstations. For details
383 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
384 DECstation porting pages on <http://decstation.unix-ag.org/>.
386 If you have one of the following DECstation Models you definitely
387 want to choose R4xx0 for the CPU Type:
394 otherwise choose R3000.
397 bool "Jazz family of machines"
400 select ARCH_MIGHT_HAVE_PC_PARPORT
401 select ARCH_MIGHT_HAVE_PC_SERIO
405 select ARCH_MAY_HAVE_PC_FDC
408 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
409 select GENERIC_ISA_DMA
410 select HAVE_PCSPKR_PLATFORM
415 select SYS_HAS_CPU_R4X00
416 select SYS_SUPPORTS_32BIT_KERNEL
417 select SYS_SUPPORTS_64BIT_KERNEL
418 select SYS_SUPPORTS_100HZ
419 select SYS_SUPPORTS_LITTLE_ENDIAN
421 This a family of machines based on the MIPS R4030 chipset which was
422 used by several vendors to build RISC/os and Windows NT workstations.
423 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
424 Olivetti M700-10 workstations.
426 config MACH_INGENIC_SOC
427 bool "Ingenic SoC based machines"
430 select SYS_SUPPORTS_ZBOOT_UART16550
431 select CPU_SUPPORTS_CPUFREQ
432 select MIPS_EXTERNAL_TIMER
435 bool "Lantiq based platforms"
436 select DMA_NONCOHERENT
440 select SYS_HAS_CPU_MIPS32_R1
441 select SYS_HAS_CPU_MIPS32_R2
442 select SYS_SUPPORTS_BIG_ENDIAN
443 select SYS_SUPPORTS_32BIT_KERNEL
444 select SYS_SUPPORTS_MIPS16
445 select SYS_SUPPORTS_MULTITHREADING
446 select SYS_SUPPORTS_VPE_LOADER
447 select SYS_HAS_EARLY_PRINTK
451 select HAVE_LEGACY_CLK
454 select PINCTRL_LANTIQ
455 select ARCH_HAS_RESET_CONTROLLER
456 select RESET_CONTROLLER
458 config MACH_LOONGSON32
459 bool "Loongson 32-bit family of machines"
460 select SYS_SUPPORTS_ZBOOT
462 This enables support for the Loongson-1 family of machines.
464 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
465 the Institute of Computing Technology (ICT), Chinese Academy of
468 config MACH_LOONGSON2EF
469 bool "Loongson-2E/F family of machines"
470 select SYS_SUPPORTS_ZBOOT
472 This enables the support of early Loongson-2E/F family of machines.
474 config MACH_LOONGSON64
475 bool "Loongson 64-bit family of machines"
476 select ARCH_SPARSEMEM_ENABLE
477 select ARCH_MIGHT_HAVE_PC_PARPORT
478 select ARCH_MIGHT_HAVE_PC_SERIO
479 select GENERIC_ISA_DMA_SUPPORT_BROKEN
489 select NO_EXCEPT_FILL
490 select NR_CPUS_DEFAULT_64
491 select USE_GENERIC_EARLY_PRINTK_8250
492 select PCI_DRIVERS_GENERIC
493 select SYS_HAS_CPU_LOONGSON64
494 select SYS_HAS_EARLY_PRINTK
495 select SYS_SUPPORTS_SMP
496 select SYS_SUPPORTS_HOTPLUG_CPU
497 select SYS_SUPPORTS_NUMA
498 select SYS_SUPPORTS_64BIT_KERNEL
499 select SYS_SUPPORTS_HIGHMEM
500 select SYS_SUPPORTS_LITTLE_ENDIAN
501 select SYS_SUPPORTS_ZBOOT
502 select SYS_SUPPORTS_RELOCATABLE
507 select PCI_HOST_GENERIC
509 This enables the support of Loongson-2/3 family of machines.
511 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
512 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
513 and Loongson-2F which will be removed), developed by the Institute
514 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
516 config MACH_PISTACHIO
517 bool "IMG Pistachio SoC based boards"
521 select CLKSRC_MIPS_GIC
524 select DMA_NONCOHERENT
528 select MIPS_CPU_SCACHE
532 select SYS_HAS_CPU_MIPS32_R2
533 select SYS_SUPPORTS_32BIT_KERNEL
534 select SYS_SUPPORTS_LITTLE_ENDIAN
535 select SYS_SUPPORTS_MIPS_CPS
536 select SYS_SUPPORTS_MULTITHREADING
537 select SYS_SUPPORTS_RELOCATABLE
538 select SYS_SUPPORTS_ZBOOT
539 select SYS_HAS_EARLY_PRINTK
540 select USE_GENERIC_EARLY_PRINTK_8250
543 This enables support for the IMG Pistachio SoC platform.
546 bool "MIPS Malta board"
547 select ARCH_MAY_HAVE_PC_FDC
548 select ARCH_MIGHT_HAVE_PC_PARPORT
549 select ARCH_MIGHT_HAVE_PC_SERIO
554 select CLKSRC_MIPS_GIC
557 select DMA_NONCOHERENT
558 select GENERIC_ISA_DMA
559 select HAVE_PCSPKR_PLATFORM
565 select MIPS_CPU_SCACHE
567 select MIPS_L1_CACHE_SHIFT_6
569 select PCI_GT64XXX_PCI0
572 select SYS_HAS_CPU_MIPS32_R1
573 select SYS_HAS_CPU_MIPS32_R2
574 select SYS_HAS_CPU_MIPS32_R3_5
575 select SYS_HAS_CPU_MIPS32_R5
576 select SYS_HAS_CPU_MIPS32_R6
577 select SYS_HAS_CPU_MIPS64_R1
578 select SYS_HAS_CPU_MIPS64_R2
579 select SYS_HAS_CPU_MIPS64_R6
580 select SYS_HAS_CPU_NEVADA
581 select SYS_HAS_CPU_RM7000
582 select SYS_SUPPORTS_32BIT_KERNEL
583 select SYS_SUPPORTS_64BIT_KERNEL
584 select SYS_SUPPORTS_BIG_ENDIAN
585 select SYS_SUPPORTS_HIGHMEM
586 select SYS_SUPPORTS_LITTLE_ENDIAN
587 select SYS_SUPPORTS_MICROMIPS
588 select SYS_SUPPORTS_MIPS16
589 select SYS_SUPPORTS_MIPS_CMP
590 select SYS_SUPPORTS_MIPS_CPS
591 select SYS_SUPPORTS_MULTITHREADING
592 select SYS_SUPPORTS_RELOCATABLE
593 select SYS_SUPPORTS_SMARTMIPS
594 select SYS_SUPPORTS_VPE_LOADER
595 select SYS_SUPPORTS_ZBOOT
597 select WAR_ICACHE_REFILLS
598 select ZONE_DMA32 if 64BIT
600 This enables support for the MIPS Technologies Malta evaluation
604 bool "Microchip PIC32 Family"
606 This enables support for the Microchip PIC32 family of platforms.
608 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
612 bool "NEC VR4100 series based machines"
615 select SYS_HAS_CPU_VR41XX
616 select SYS_SUPPORTS_MIPS16
619 config MACH_NINTENDO64
620 bool "Nintendo 64 console"
623 select SYS_HAS_CPU_R4300
624 select SYS_SUPPORTS_BIG_ENDIAN
625 select SYS_SUPPORTS_ZBOOT
626 select SYS_SUPPORTS_32BIT_KERNEL
627 select SYS_SUPPORTS_64BIT_KERNEL
628 select DMA_NONCOHERENT
632 bool "Ralink based machines"
637 select DMA_NONCOHERENT
640 select SYS_HAS_CPU_MIPS32_R1
641 select SYS_HAS_CPU_MIPS32_R2
642 select SYS_SUPPORTS_32BIT_KERNEL
643 select SYS_SUPPORTS_LITTLE_ENDIAN
644 select SYS_SUPPORTS_MIPS16
645 select SYS_SUPPORTS_ZBOOT
646 select SYS_HAS_EARLY_PRINTK
647 select ARCH_HAS_RESET_CONTROLLER
648 select RESET_CONTROLLER
650 config MACH_REALTEK_RTL
651 bool "Realtek RTL838x/RTL839x based machines"
653 select DMA_NONCOHERENT
657 select SYS_HAS_CPU_MIPS32_R1
658 select SYS_HAS_CPU_MIPS32_R2
659 select SYS_SUPPORTS_BIG_ENDIAN
660 select SYS_SUPPORTS_32BIT_KERNEL
661 select SYS_SUPPORTS_MIPS16
662 select SYS_SUPPORTS_MULTITHREADING
663 select SYS_SUPPORTS_VPE_LOADER
664 select SYS_HAS_EARLY_PRINTK
665 select SYS_HAS_EARLY_PRINTK_8250
666 select USE_GENERIC_EARLY_PRINTK_8250
672 bool "SGI IP22 (Indy/Indigo2)"
677 select ARCH_MIGHT_HAVE_PC_SERIO
681 select DEFAULT_SGI_PARTITION
682 select DMA_NONCOHERENT
686 select IP22_CPU_SCACHE
688 select GENERIC_ISA_DMA_SUPPORT_BROKEN
690 select SGI_HAS_INDYDOG
696 select SYS_HAS_CPU_R4X00
697 select SYS_HAS_CPU_R5000
698 select SYS_HAS_EARLY_PRINTK
699 select SYS_SUPPORTS_32BIT_KERNEL
700 select SYS_SUPPORTS_64BIT_KERNEL
701 select SYS_SUPPORTS_BIG_ENDIAN
702 select WAR_R4600_V1_INDEX_ICACHEOP
703 select WAR_R4600_V1_HIT_CACHEOP
704 select WAR_R4600_V2_HIT_CACHEOP
705 select MIPS_L1_CACHE_SHIFT_7
707 This are the SGI Indy, Challenge S and Indigo2, as well as certain
708 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
709 that runs on these, say Y here.
712 bool "SGI IP27 (Origin200/2000)"
713 select ARCH_HAS_PHYS_TO_DMA
714 select ARCH_SPARSEMEM_ENABLE
717 select ARC_CMDLINE_ONLY
719 select DEFAULT_SGI_PARTITION
721 select SYS_HAS_EARLY_PRINTK
724 select IRQ_DOMAIN_HIERARCHY
725 select NR_CPUS_DEFAULT_64
726 select PCI_DRIVERS_GENERIC
727 select PCI_XTALK_BRIDGE
728 select SYS_HAS_CPU_R10000
729 select SYS_SUPPORTS_64BIT_KERNEL
730 select SYS_SUPPORTS_BIG_ENDIAN
731 select SYS_SUPPORTS_NUMA
732 select SYS_SUPPORTS_SMP
733 select WAR_R10000_LLSC
734 select MIPS_L1_CACHE_SHIFT_7
737 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
738 workstations. To compile a Linux kernel that runs on these, say Y
742 bool "SGI IP28 (Indigo2 R10k)"
747 select ARCH_MIGHT_HAVE_PC_SERIO
751 select DEFAULT_SGI_PARTITION
752 select DMA_NONCOHERENT
753 select GENERIC_ISA_DMA_SUPPORT_BROKEN
759 select SGI_HAS_INDYDOG
765 select SYS_HAS_CPU_R10000
766 select SYS_HAS_EARLY_PRINTK
767 select SYS_SUPPORTS_64BIT_KERNEL
768 select SYS_SUPPORTS_BIG_ENDIAN
769 select WAR_R10000_LLSC
770 select MIPS_L1_CACHE_SHIFT_7
772 This is the SGI Indigo2 with R10000 processor. To compile a Linux
773 kernel that runs on these, say Y here.
776 bool "SGI IP30 (Octane/Octane2)"
777 select ARCH_HAS_PHYS_TO_DMA
784 select SYNC_R4K if SMP
788 select IRQ_DOMAIN_HIERARCHY
789 select NR_CPUS_DEFAULT_2
790 select PCI_DRIVERS_GENERIC
791 select PCI_XTALK_BRIDGE
792 select SYS_HAS_EARLY_PRINTK
793 select SYS_HAS_CPU_R10000
794 select SYS_SUPPORTS_64BIT_KERNEL
795 select SYS_SUPPORTS_BIG_ENDIAN
796 select SYS_SUPPORTS_SMP
797 select WAR_R10000_LLSC
798 select MIPS_L1_CACHE_SHIFT_7
801 These are the SGI Octane and Octane2 graphics workstations. To
802 compile a Linux kernel that runs on these, say Y here.
808 select ARCH_HAS_PHYS_TO_DMA
814 select DMA_NONCOHERENT
817 select R5000_CPU_SCACHE
818 select RM7000_CPU_SCACHE
819 select SYS_HAS_CPU_R5000
820 select SYS_HAS_CPU_R10000 if BROKEN
821 select SYS_HAS_CPU_RM7000
822 select SYS_HAS_CPU_NEVADA
823 select SYS_SUPPORTS_64BIT_KERNEL
824 select SYS_SUPPORTS_BIG_ENDIAN
825 select WAR_ICACHE_REFILLS
827 If you want this kernel to run on SGI O2 workstation, say Y here.
830 bool "Sibyte BCM91120C-CRhine"
832 select SIBYTE_BCM1120
834 select SYS_HAS_CPU_SB1
835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_LITTLE_ENDIAN
839 bool "Sibyte BCM91120x-Carmel"
841 select SIBYTE_BCM1120
843 select SYS_HAS_CPU_SB1
844 select SYS_SUPPORTS_BIG_ENDIAN
845 select SYS_SUPPORTS_LITTLE_ENDIAN
848 bool "Sibyte BCM91125C-CRhone"
850 select SIBYTE_BCM1125
852 select SYS_HAS_CPU_SB1
853 select SYS_SUPPORTS_BIG_ENDIAN
854 select SYS_SUPPORTS_HIGHMEM
855 select SYS_SUPPORTS_LITTLE_ENDIAN
858 bool "Sibyte BCM91125E-Rhone"
860 select SIBYTE_BCM1125H
862 select SYS_HAS_CPU_SB1
863 select SYS_SUPPORTS_BIG_ENDIAN
864 select SYS_SUPPORTS_LITTLE_ENDIAN
867 bool "Sibyte BCM91250A-SWARM"
869 select HAVE_PATA_PLATFORM
872 select SYS_HAS_CPU_SB1
873 select SYS_SUPPORTS_BIG_ENDIAN
874 select SYS_SUPPORTS_HIGHMEM
875 select SYS_SUPPORTS_LITTLE_ENDIAN
876 select ZONE_DMA32 if 64BIT
877 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
879 config SIBYTE_LITTLESUR
880 bool "Sibyte BCM91250C2-LittleSur"
882 select HAVE_PATA_PLATFORM
885 select SYS_HAS_CPU_SB1
886 select SYS_SUPPORTS_BIG_ENDIAN
887 select SYS_SUPPORTS_HIGHMEM
888 select SYS_SUPPORTS_LITTLE_ENDIAN
889 select ZONE_DMA32 if 64BIT
891 config SIBYTE_SENTOSA
892 bool "Sibyte BCM91250E-Sentosa"
896 select SYS_HAS_CPU_SB1
897 select SYS_SUPPORTS_BIG_ENDIAN
898 select SYS_SUPPORTS_LITTLE_ENDIAN
899 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
902 bool "Sibyte BCM91480B-BigSur"
904 select NR_CPUS_DEFAULT_4
905 select SIBYTE_BCM1x80
907 select SYS_HAS_CPU_SB1
908 select SYS_SUPPORTS_BIG_ENDIAN
909 select SYS_SUPPORTS_HIGHMEM
910 select SYS_SUPPORTS_LITTLE_ENDIAN
911 select ZONE_DMA32 if 64BIT
912 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
915 bool "SNI RM200/300/400"
918 select FW_ARC if CPU_LITTLE_ENDIAN
919 select FW_ARC32 if CPU_LITTLE_ENDIAN
920 select FW_SNIPROM if CPU_BIG_ENDIAN
921 select ARCH_MAY_HAVE_PC_FDC
922 select ARCH_MIGHT_HAVE_PC_PARPORT
923 select ARCH_MIGHT_HAVE_PC_SERIO
927 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
928 select DMA_NONCOHERENT
929 select GENERIC_ISA_DMA
931 select HAVE_PCSPKR_PLATFORM
937 select MIPS_L1_CACHE_SHIFT_6
938 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
939 select SYS_HAS_CPU_R4X00
940 select SYS_HAS_CPU_R5000
941 select SYS_HAS_CPU_R10000
942 select R5000_CPU_SCACHE
943 select SYS_HAS_EARLY_PRINTK
944 select SYS_SUPPORTS_32BIT_KERNEL
945 select SYS_SUPPORTS_64BIT_KERNEL
946 select SYS_SUPPORTS_BIG_ENDIAN
947 select SYS_SUPPORTS_HIGHMEM
948 select SYS_SUPPORTS_LITTLE_ENDIAN
949 select WAR_R4600_V2_HIT_CACHEOP
951 The SNI RM200/300/400 are MIPS-based machines manufactured by
952 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
953 Technology and now in turn merged with Fujitsu. Say Y here to
954 support this machine type.
957 bool "Toshiba TX39 series based machines"
960 bool "Toshiba TX49 series based machines"
961 select WAR_TX49XX_ICACHE_INDEX_INV
963 config MIKROTIK_RB532
964 bool "Mikrotik RB532 boards"
967 select DMA_NONCOHERENT
970 select SYS_HAS_CPU_MIPS32_R1
971 select SYS_SUPPORTS_32BIT_KERNEL
972 select SYS_SUPPORTS_LITTLE_ENDIAN
976 select MIPS_L1_CACHE_SHIFT_4
978 Support the Mikrotik(tm) RouterBoard 532 series,
979 based on the IDT RC32434 SoC.
981 config CAVIUM_OCTEON_SOC
982 bool "Cavium Networks Octeon SoC based boards"
984 select ARCH_HAS_PHYS_TO_DMA
986 select PHYS_ADDR_T_64BIT
987 select SYS_SUPPORTS_64BIT_KERNEL
988 select SYS_SUPPORTS_BIG_ENDIAN
990 select EDAC_ATOMIC_SCRUB
991 select SYS_SUPPORTS_LITTLE_ENDIAN
992 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
993 select SYS_HAS_EARLY_PRINTK
994 select SYS_HAS_CPU_CAVIUM_OCTEON
996 select HAVE_PLAT_DELAY
997 select HAVE_PLAT_FW_INIT_CMDLINE
998 select HAVE_PLAT_MEMCPY
1002 select ARCH_SPARSEMEM_ENABLE
1003 select SYS_SUPPORTS_SMP
1004 select NR_CPUS_DEFAULT_64
1005 select MIPS_NR_CPU_NR_MAP_1024
1008 select MTD_COMPLEX_MAPPINGS
1010 select SYS_SUPPORTS_RELOCATABLE
1012 This option supports all of the Octeon reference boards from Cavium
1013 Networks. It builds a kernel that dynamically determines the Octeon
1014 CPU type and supports all known board reference implementations.
1015 Some of the supported boards are:
1022 Say Y here for most Octeon reference boards.
1024 config NLM_XLR_BOARD
1025 bool "Netlogic XLR/XLS based systems"
1028 select SYS_HAS_CPU_XLR
1029 select SYS_SUPPORTS_SMP
1031 select SWAP_IO_SPACE
1032 select SYS_SUPPORTS_32BIT_KERNEL
1033 select SYS_SUPPORTS_64BIT_KERNEL
1034 select PHYS_ADDR_T_64BIT
1035 select SYS_SUPPORTS_BIG_ENDIAN
1036 select SYS_SUPPORTS_HIGHMEM
1037 select NR_CPUS_DEFAULT_32
1041 select ZONE_DMA32 if 64BIT
1043 select SYS_HAS_EARLY_PRINTK
1044 select SYS_SUPPORTS_ZBOOT
1045 select SYS_SUPPORTS_ZBOOT_UART16550
1047 Support for systems based on Netlogic XLR and XLS processors.
1048 Say Y here if you have a XLR or XLS based board.
1050 config NLM_XLP_BOARD
1051 bool "Netlogic XLP based systems"
1054 select SYS_HAS_CPU_XLP
1055 select SYS_SUPPORTS_SMP
1057 select SYS_SUPPORTS_32BIT_KERNEL
1058 select SYS_SUPPORTS_64BIT_KERNEL
1059 select PHYS_ADDR_T_64BIT
1061 select SYS_SUPPORTS_BIG_ENDIAN
1062 select SYS_SUPPORTS_LITTLE_ENDIAN
1063 select SYS_SUPPORTS_HIGHMEM
1064 select NR_CPUS_DEFAULT_32
1068 select ZONE_DMA32 if 64BIT
1070 select SYS_HAS_EARLY_PRINTK
1072 select SYS_SUPPORTS_ZBOOT
1073 select SYS_SUPPORTS_ZBOOT_UART16550
1075 This board is based on Netlogic XLP Processor.
1076 Say Y here if you have a XLP based board.
1080 source "arch/mips/alchemy/Kconfig"
1081 source "arch/mips/ath25/Kconfig"
1082 source "arch/mips/ath79/Kconfig"
1083 source "arch/mips/bcm47xx/Kconfig"
1084 source "arch/mips/bcm63xx/Kconfig"
1085 source "arch/mips/bmips/Kconfig"
1086 source "arch/mips/generic/Kconfig"
1087 source "arch/mips/ingenic/Kconfig"
1088 source "arch/mips/jazz/Kconfig"
1089 source "arch/mips/lantiq/Kconfig"
1090 source "arch/mips/pic32/Kconfig"
1091 source "arch/mips/pistachio/Kconfig"
1092 source "arch/mips/ralink/Kconfig"
1093 source "arch/mips/sgi-ip27/Kconfig"
1094 source "arch/mips/sibyte/Kconfig"
1095 source "arch/mips/txx9/Kconfig"
1096 source "arch/mips/vr41xx/Kconfig"
1097 source "arch/mips/cavium-octeon/Kconfig"
1098 source "arch/mips/loongson2ef/Kconfig"
1099 source "arch/mips/loongson32/Kconfig"
1100 source "arch/mips/loongson64/Kconfig"
1101 source "arch/mips/netlogic/Kconfig"
1105 config GENERIC_HWEIGHT
1109 config GENERIC_CALIBRATE_DELAY
1113 config SCHED_OMIT_FRAME_POINTER
1118 # Select some configuration options automatically based on user selections.
1123 config ARCH_MAY_HAVE_PC_FDC
1154 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1160 config MIPS_CLOCK_VSYSCALL
1161 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1170 config ARCH_SUPPORTS_UPROBES
1173 config DMA_PERDEV_COHERENT
1175 select ARCH_HAS_SETUP_DMA_OPS
1176 select DMA_NONCOHERENT
1178 config DMA_NONCOHERENT
1181 # MIPS allows mixing "slightly different" Cacheability and Coherency
1182 # Attribute bits. It is believed that the uncached access through
1183 # KSEG1 and the implementation specific "uncached accelerated" used
1184 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1185 # significant advantages.
1187 select ARCH_HAS_DMA_WRITE_COMBINE
1188 select ARCH_HAS_DMA_PREP_COHERENT
1189 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1190 select ARCH_HAS_DMA_SET_UNCACHED
1191 select DMA_NONCOHERENT_MMAP
1192 select NEED_DMA_MAP_STATE
1194 config SYS_HAS_EARLY_PRINTK
1197 config SYS_SUPPORTS_HOTPLUG_CPU
1200 config MIPS_BONITO64
1209 config NO_IOPORT_MAP
1213 def_bool CPU_NO_LOAD_STORE_LR
1215 config GENERIC_ISA_DMA
1217 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1220 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1222 select GENERIC_ISA_DMA
1224 config HAVE_PLAT_DELAY
1227 config HAVE_PLAT_FW_INIT_CMDLINE
1230 config HAVE_PLAT_MEMCPY
1236 config SYS_SUPPORTS_RELOCATABLE
1239 Selected if the platform supports relocating the kernel.
1240 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1241 to allow access to command line and entropy sources.
1243 config MIPS_CBPF_JIT
1245 depends on BPF_JIT && HAVE_CBPF_JIT
1247 config MIPS_EBPF_JIT
1249 depends on BPF_JIT && HAVE_EBPF_JIT
1253 # Endianness selection. Sufficiently obscure so many users don't know what to
1254 # answer,so we try hard to limit the available choices. Also the use of a
1255 # choice statement should be more obvious to the user.
1258 prompt "Endianness selection"
1260 Some MIPS machines can be configured for either little or big endian
1261 byte order. These modes require different kernels and a different
1262 Linux distribution. In general there is one preferred byteorder for a
1263 particular system but some systems are just as commonly used in the
1264 one or the other endianness.
1266 config CPU_BIG_ENDIAN
1268 depends on SYS_SUPPORTS_BIG_ENDIAN
1270 config CPU_LITTLE_ENDIAN
1271 bool "Little endian"
1272 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1279 config SYS_SUPPORTS_APM_EMULATION
1282 config SYS_SUPPORTS_BIG_ENDIAN
1285 config SYS_SUPPORTS_LITTLE_ENDIAN
1288 config MIPS_HUGE_TLB_SUPPORT
1289 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1303 config PCI_GT64XXX_PCI0
1306 config PCI_XTALK_BRIDGE
1309 config NO_EXCEPT_FILL
1315 config SWAP_IO_SPACE
1318 config SGI_HAS_INDYDOG
1330 config SGI_HAS_ZILOG
1333 config SGI_HAS_I8042
1336 config DEFAULT_SGI_PARTITION
1348 config MIPS_L1_CACHE_SHIFT_4
1351 config MIPS_L1_CACHE_SHIFT_5
1354 config MIPS_L1_CACHE_SHIFT_6
1357 config MIPS_L1_CACHE_SHIFT_7
1360 config MIPS_L1_CACHE_SHIFT
1362 default "7" if MIPS_L1_CACHE_SHIFT_7
1363 default "6" if MIPS_L1_CACHE_SHIFT_6
1364 default "5" if MIPS_L1_CACHE_SHIFT_5
1365 default "4" if MIPS_L1_CACHE_SHIFT_4
1368 config ARC_CMDLINE_ONLY
1372 bool "ARC console support"
1373 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1387 menu "CPU selection"
1393 config CPU_LOONGSON64
1394 bool "Loongson 64-bit CPU"
1395 depends on SYS_HAS_CPU_LOONGSON64
1396 select ARCH_HAS_PHYS_TO_DMA
1398 select CPU_HAS_PREFETCH
1399 select CPU_SUPPORTS_64BIT_KERNEL
1400 select CPU_SUPPORTS_HIGHMEM
1401 select CPU_SUPPORTS_HUGEPAGES
1402 select CPU_SUPPORTS_MSA
1403 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1404 select CPU_MIPSR2_IRQ_VI
1405 select WEAK_ORDERING
1406 select WEAK_REORDERING_BEYOND_LLSC
1407 select MIPS_ASID_BITS_VARIABLE
1408 select MIPS_PGD_C0_CONTEXT
1409 select MIPS_L1_CACHE_SHIFT_6
1414 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1415 cores implements the MIPS64R2 instruction set with many extensions,
1416 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1417 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1418 Loongson-2E/2F is not covered here and will be removed in future.
1420 config LOONGSON3_ENHANCEMENT
1421 bool "New Loongson-3 CPU Enhancements"
1423 depends on CPU_LOONGSON64
1425 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1426 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1427 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1428 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1429 Fast TLB refill support, etc.
1431 This option enable those enhancements which are not probed at run
1432 time. If you want a generic kernel to run on all Loongson 3 machines,
1433 please say 'N' here. If you want a high-performance kernel to run on
1434 new Loongson-3 machines only, please say 'Y' here.
1436 config CPU_LOONGSON3_WORKAROUNDS
1437 bool "Old Loongson-3 LLSC Workarounds"
1439 depends on CPU_LOONGSON64
1441 Loongson-3 processors have the llsc issues which require workarounds.
1442 Without workarounds the system may hang unexpectedly.
1444 Newer Loongson-3 will fix these issues and no workarounds are needed.
1445 The workarounds have no significant side effect on them but may
1446 decrease the performance of the system so this option should be
1447 disabled unless the kernel is intended to be run on old systems.
1449 If unsure, please say Y.
1451 config CPU_LOONGSON3_CPUCFG_EMULATION
1452 bool "Emulate the CPUCFG instruction on older Loongson cores"
1454 depends on CPU_LOONGSON64
1456 Loongson-3A R4 and newer have the CPUCFG instruction available for
1457 userland to query CPU capabilities, much like CPUID on x86. This
1458 option provides emulation of the instruction on older Loongson
1459 cores, back to Loongson-3A1000.
1461 If unsure, please say Y.
1463 config CPU_LOONGSON2E
1465 depends on SYS_HAS_CPU_LOONGSON2E
1466 select CPU_LOONGSON2EF
1468 The Loongson 2E processor implements the MIPS III instruction set
1469 with many extensions.
1471 It has an internal FPGA northbridge, which is compatible to
1474 config CPU_LOONGSON2F
1476 depends on SYS_HAS_CPU_LOONGSON2F
1477 select CPU_LOONGSON2EF
1480 The Loongson 2F processor implements the MIPS III instruction set
1481 with many extensions.
1483 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1484 have a similar programming interface with FPGA northbridge used in
1487 config CPU_LOONGSON1B
1489 depends on SYS_HAS_CPU_LOONGSON1B
1490 select CPU_LOONGSON32
1491 select LEDS_GPIO_REGISTER
1493 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1494 Release 1 instruction set and part of the MIPS32 Release 2
1497 config CPU_LOONGSON1C
1499 depends on SYS_HAS_CPU_LOONGSON1C
1500 select CPU_LOONGSON32
1501 select LEDS_GPIO_REGISTER
1503 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1504 Release 1 instruction set and part of the MIPS32 Release 2
1507 config CPU_MIPS32_R1
1508 bool "MIPS32 Release 1"
1509 depends on SYS_HAS_CPU_MIPS32_R1
1510 select CPU_HAS_PREFETCH
1511 select CPU_SUPPORTS_32BIT_KERNEL
1512 select CPU_SUPPORTS_HIGHMEM
1514 Choose this option to build a kernel for release 1 or later of the
1515 MIPS32 architecture. Most modern embedded systems with a 32-bit
1516 MIPS processor are based on a MIPS32 processor. If you know the
1517 specific type of processor in your system, choose those that one
1518 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1519 Release 2 of the MIPS32 architecture is available since several
1520 years so chances are you even have a MIPS32 Release 2 processor
1521 in which case you should choose CPU_MIPS32_R2 instead for better
1524 config CPU_MIPS32_R2
1525 bool "MIPS32 Release 2"
1526 depends on SYS_HAS_CPU_MIPS32_R2
1527 select CPU_HAS_PREFETCH
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_HIGHMEM
1530 select CPU_SUPPORTS_MSA
1533 Choose this option to build a kernel for release 2 or later of the
1534 MIPS32 architecture. Most modern embedded systems with a 32-bit
1535 MIPS processor are based on a MIPS32 processor. If you know the
1536 specific type of processor in your system, choose those that one
1537 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1539 config CPU_MIPS32_R5
1540 bool "MIPS32 Release 5"
1541 depends on SYS_HAS_CPU_MIPS32_R5
1542 select CPU_HAS_PREFETCH
1543 select CPU_SUPPORTS_32BIT_KERNEL
1544 select CPU_SUPPORTS_HIGHMEM
1545 select CPU_SUPPORTS_MSA
1547 select MIPS_O32_FP64_SUPPORT
1549 Choose this option to build a kernel for release 5 or later of the
1550 MIPS32 architecture. New MIPS processors, starting with the Warrior
1551 family, are based on a MIPS32r5 processor. If you own an older
1552 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1554 config CPU_MIPS32_R6
1555 bool "MIPS32 Release 6"
1556 depends on SYS_HAS_CPU_MIPS32_R6
1557 select CPU_HAS_PREFETCH
1558 select CPU_NO_LOAD_STORE_LR
1559 select CPU_SUPPORTS_32BIT_KERNEL
1560 select CPU_SUPPORTS_HIGHMEM
1561 select CPU_SUPPORTS_MSA
1563 select MIPS_O32_FP64_SUPPORT
1565 Choose this option to build a kernel for release 6 or later of the
1566 MIPS32 architecture. New MIPS processors, starting with the Warrior
1567 family, are based on a MIPS32r6 processor. If you own an older
1568 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1570 config CPU_MIPS64_R1
1571 bool "MIPS64 Release 1"
1572 depends on SYS_HAS_CPU_MIPS64_R1
1573 select CPU_HAS_PREFETCH
1574 select CPU_SUPPORTS_32BIT_KERNEL
1575 select CPU_SUPPORTS_64BIT_KERNEL
1576 select CPU_SUPPORTS_HIGHMEM
1577 select CPU_SUPPORTS_HUGEPAGES
1579 Choose this option to build a kernel for release 1 or later of the
1580 MIPS64 architecture. Many modern embedded systems with a 64-bit
1581 MIPS processor are based on a MIPS64 processor. If you know the
1582 specific type of processor in your system, choose those that one
1583 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1584 Release 2 of the MIPS64 architecture is available since several
1585 years so chances are you even have a MIPS64 Release 2 processor
1586 in which case you should choose CPU_MIPS64_R2 instead for better
1589 config CPU_MIPS64_R2
1590 bool "MIPS64 Release 2"
1591 depends on SYS_HAS_CPU_MIPS64_R2
1592 select CPU_HAS_PREFETCH
1593 select CPU_SUPPORTS_32BIT_KERNEL
1594 select CPU_SUPPORTS_64BIT_KERNEL
1595 select CPU_SUPPORTS_HIGHMEM
1596 select CPU_SUPPORTS_HUGEPAGES
1597 select CPU_SUPPORTS_MSA
1600 Choose this option to build a kernel for release 2 or later of the
1601 MIPS64 architecture. Many modern embedded systems with a 64-bit
1602 MIPS processor are based on a MIPS64 processor. If you know the
1603 specific type of processor in your system, choose those that one
1604 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1606 config CPU_MIPS64_R5
1607 bool "MIPS64 Release 5"
1608 depends on SYS_HAS_CPU_MIPS64_R5
1609 select CPU_HAS_PREFETCH
1610 select CPU_SUPPORTS_32BIT_KERNEL
1611 select CPU_SUPPORTS_64BIT_KERNEL
1612 select CPU_SUPPORTS_HIGHMEM
1613 select CPU_SUPPORTS_HUGEPAGES
1614 select CPU_SUPPORTS_MSA
1615 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1618 Choose this option to build a kernel for release 5 or later of the
1619 MIPS64 architecture. This is a intermediate MIPS architecture
1620 release partly implementing release 6 features. Though there is no
1621 any hardware known to be based on this release.
1623 config CPU_MIPS64_R6
1624 bool "MIPS64 Release 6"
1625 depends on SYS_HAS_CPU_MIPS64_R6
1626 select CPU_HAS_PREFETCH
1627 select CPU_NO_LOAD_STORE_LR
1628 select CPU_SUPPORTS_32BIT_KERNEL
1629 select CPU_SUPPORTS_64BIT_KERNEL
1630 select CPU_SUPPORTS_HIGHMEM
1631 select CPU_SUPPORTS_HUGEPAGES
1632 select CPU_SUPPORTS_MSA
1633 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1636 Choose this option to build a kernel for release 6 or later of the
1637 MIPS64 architecture. New MIPS processors, starting with the Warrior
1638 family, are based on a MIPS64r6 processor. If you own an older
1639 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1642 bool "MIPS Warrior P5600"
1643 depends on SYS_HAS_CPU_P5600
1644 select CPU_HAS_PREFETCH
1645 select CPU_SUPPORTS_32BIT_KERNEL
1646 select CPU_SUPPORTS_HIGHMEM
1647 select CPU_SUPPORTS_MSA
1648 select CPU_SUPPORTS_CPUFREQ
1649 select CPU_MIPSR2_IRQ_VI
1650 select CPU_MIPSR2_IRQ_EI
1652 select MIPS_O32_FP64_SUPPORT
1654 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1655 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1656 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1657 level features like up to six P5600 calculation cores, CM2 with L2
1658 cache, IOCU/IOMMU (though might be unused depending on the system-
1659 specific IP core configuration), GIC, CPC, virtualisation module,
1664 depends on SYS_HAS_CPU_R3000
1667 select CPU_SUPPORTS_32BIT_KERNEL
1668 select CPU_SUPPORTS_HIGHMEM
1670 Please make sure to pick the right CPU type. Linux/MIPS is not
1671 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1672 *not* work on R4000 machines and vice versa. However, since most
1673 of the supported machines have an R4000 (or similar) CPU, R4x00
1674 might be a safe bet. If the resulting kernel does not work,
1675 try to recompile with R3000.
1679 depends on SYS_HAS_CPU_TX39XX
1680 select CPU_SUPPORTS_32BIT_KERNEL
1685 depends on SYS_HAS_CPU_VR41XX
1686 select CPU_SUPPORTS_32BIT_KERNEL
1687 select CPU_SUPPORTS_64BIT_KERNEL
1689 The options selects support for the NEC VR4100 series of processors.
1690 Only choose this option if you have one of these processors as a
1691 kernel built with this option will not run on any other type of
1692 processor or vice versa.
1696 depends on SYS_HAS_CPU_R4300
1697 select CPU_SUPPORTS_32BIT_KERNEL
1698 select CPU_SUPPORTS_64BIT_KERNEL
1699 select CPU_HAS_LOAD_STORE_LR
1701 MIPS Technologies R4300-series processors.
1705 depends on SYS_HAS_CPU_R4X00
1706 select CPU_SUPPORTS_32BIT_KERNEL
1707 select CPU_SUPPORTS_64BIT_KERNEL
1708 select CPU_SUPPORTS_HUGEPAGES
1710 MIPS Technologies R4000-series processors other than 4300, including
1711 the R4000, R4400, R4600, and 4700.
1715 depends on SYS_HAS_CPU_TX49XX
1716 select CPU_HAS_PREFETCH
1717 select CPU_SUPPORTS_32BIT_KERNEL
1718 select CPU_SUPPORTS_64BIT_KERNEL
1719 select CPU_SUPPORTS_HUGEPAGES
1723 depends on SYS_HAS_CPU_R5000
1724 select CPU_SUPPORTS_32BIT_KERNEL
1725 select CPU_SUPPORTS_64BIT_KERNEL
1726 select CPU_SUPPORTS_HUGEPAGES
1728 MIPS Technologies R5000-series processors other than the Nevada.
1732 depends on SYS_HAS_CPU_R5500
1733 select CPU_SUPPORTS_32BIT_KERNEL
1734 select CPU_SUPPORTS_64BIT_KERNEL
1735 select CPU_SUPPORTS_HUGEPAGES
1737 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1742 depends on SYS_HAS_CPU_NEVADA
1743 select CPU_SUPPORTS_32BIT_KERNEL
1744 select CPU_SUPPORTS_64BIT_KERNEL
1745 select CPU_SUPPORTS_HUGEPAGES
1747 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1751 depends on SYS_HAS_CPU_R10000
1752 select CPU_HAS_PREFETCH
1753 select CPU_SUPPORTS_32BIT_KERNEL
1754 select CPU_SUPPORTS_64BIT_KERNEL
1755 select CPU_SUPPORTS_HIGHMEM
1756 select CPU_SUPPORTS_HUGEPAGES
1758 MIPS Technologies R10000-series processors.
1762 depends on SYS_HAS_CPU_RM7000
1763 select CPU_HAS_PREFETCH
1764 select CPU_SUPPORTS_32BIT_KERNEL
1765 select CPU_SUPPORTS_64BIT_KERNEL
1766 select CPU_SUPPORTS_HIGHMEM
1767 select CPU_SUPPORTS_HUGEPAGES
1771 depends on SYS_HAS_CPU_SB1
1772 select CPU_SUPPORTS_32BIT_KERNEL
1773 select CPU_SUPPORTS_64BIT_KERNEL
1774 select CPU_SUPPORTS_HIGHMEM
1775 select CPU_SUPPORTS_HUGEPAGES
1776 select WEAK_ORDERING
1778 config CPU_CAVIUM_OCTEON
1779 bool "Cavium Octeon processor"
1780 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1781 select CPU_HAS_PREFETCH
1782 select CPU_SUPPORTS_64BIT_KERNEL
1783 select WEAK_ORDERING
1784 select CPU_SUPPORTS_HIGHMEM
1785 select CPU_SUPPORTS_HUGEPAGES
1786 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1787 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1788 select MIPS_L1_CACHE_SHIFT_7
1791 The Cavium Octeon processor is a highly integrated chip containing
1792 many ethernet hardware widgets for networking tasks. The processor
1793 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1794 Full details can be found at http://www.caviumnetworks.com.
1797 bool "Broadcom BMIPS"
1798 depends on SYS_HAS_CPU_BMIPS
1800 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1801 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1802 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1803 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1804 select CPU_SUPPORTS_32BIT_KERNEL
1805 select DMA_NONCOHERENT
1807 select SWAP_IO_SPACE
1808 select WEAK_ORDERING
1809 select CPU_SUPPORTS_HIGHMEM
1810 select CPU_HAS_PREFETCH
1811 select CPU_SUPPORTS_CPUFREQ
1812 select MIPS_EXTERNAL_TIMER
1814 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1817 bool "Netlogic XLR SoC"
1818 depends on SYS_HAS_CPU_XLR
1819 select CPU_SUPPORTS_32BIT_KERNEL
1820 select CPU_SUPPORTS_64BIT_KERNEL
1821 select CPU_SUPPORTS_HIGHMEM
1822 select CPU_SUPPORTS_HUGEPAGES
1823 select WEAK_ORDERING
1824 select WEAK_REORDERING_BEYOND_LLSC
1826 Netlogic Microsystems XLR/XLS processors.
1829 bool "Netlogic XLP SoC"
1830 depends on SYS_HAS_CPU_XLP
1831 select CPU_SUPPORTS_32BIT_KERNEL
1832 select CPU_SUPPORTS_64BIT_KERNEL
1833 select CPU_SUPPORTS_HIGHMEM
1834 select WEAK_ORDERING
1835 select WEAK_REORDERING_BEYOND_LLSC
1836 select CPU_HAS_PREFETCH
1838 select CPU_SUPPORTS_HUGEPAGES
1839 select MIPS_ASID_BITS_VARIABLE
1841 Netlogic Microsystems XLP processors.
1844 config CPU_MIPS32_3_5_FEATURES
1845 bool "MIPS32 Release 3.5 Features"
1846 depends on SYS_HAS_CPU_MIPS32_R3_5
1847 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1850 Choose this option to build a kernel for release 2 or later of the
1851 MIPS32 architecture including features from the 3.5 release such as
1852 support for Enhanced Virtual Addressing (EVA).
1854 config CPU_MIPS32_3_5_EVA
1855 bool "Enhanced Virtual Addressing (EVA)"
1856 depends on CPU_MIPS32_3_5_FEATURES
1860 Choose this option if you want to enable the Enhanced Virtual
1861 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1862 One of its primary benefits is an increase in the maximum size
1863 of lowmem (up to 3GB). If unsure, say 'N' here.
1865 config CPU_MIPS32_R5_FEATURES
1866 bool "MIPS32 Release 5 Features"
1867 depends on SYS_HAS_CPU_MIPS32_R5
1868 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1870 Choose this option to build a kernel for release 2 or later of the
1871 MIPS32 architecture including features from release 5 such as
1872 support for Extended Physical Addressing (XPA).
1874 config CPU_MIPS32_R5_XPA
1875 bool "Extended Physical Addressing (XPA)"
1876 depends on CPU_MIPS32_R5_FEATURES
1878 depends on !PAGE_SIZE_4KB
1879 depends on SYS_SUPPORTS_HIGHMEM
1882 select PHYS_ADDR_T_64BIT
1885 Choose this option if you want to enable the Extended Physical
1886 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1887 benefit is to increase physical addressing equal to or greater
1888 than 40 bits. Note that this has the side effect of turning on
1889 64-bit addressing which in turn makes the PTEs 64-bit in size.
1890 If unsure, say 'N' here.
1893 config CPU_NOP_WORKAROUNDS
1896 config CPU_JUMP_WORKAROUNDS
1899 config CPU_LOONGSON2F_WORKAROUNDS
1900 bool "Loongson 2F Workarounds"
1902 select CPU_NOP_WORKAROUNDS
1903 select CPU_JUMP_WORKAROUNDS
1905 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1906 require workarounds. Without workarounds the system may hang
1907 unexpectedly. For more information please refer to the gas
1908 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1910 Loongson 2F03 and later have fixed these issues and no workarounds
1911 are needed. The workarounds have no significant side effect on them
1912 but may decrease the performance of the system so this option should
1913 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1916 If unsure, please say Y.
1917 endif # CPU_LOONGSON2F
1919 config SYS_SUPPORTS_ZBOOT
1921 select HAVE_KERNEL_GZIP
1922 select HAVE_KERNEL_BZIP2
1923 select HAVE_KERNEL_LZ4
1924 select HAVE_KERNEL_LZMA
1925 select HAVE_KERNEL_LZO
1926 select HAVE_KERNEL_XZ
1927 select HAVE_KERNEL_ZSTD
1929 config SYS_SUPPORTS_ZBOOT_UART16550
1931 select SYS_SUPPORTS_ZBOOT
1933 config SYS_SUPPORTS_ZBOOT_UART_PROM
1935 select SYS_SUPPORTS_ZBOOT
1937 config CPU_LOONGSON2EF
1939 select CPU_SUPPORTS_32BIT_KERNEL
1940 select CPU_SUPPORTS_64BIT_KERNEL
1941 select CPU_SUPPORTS_HIGHMEM
1942 select CPU_SUPPORTS_HUGEPAGES
1943 select ARCH_HAS_PHYS_TO_DMA
1945 config CPU_LOONGSON32
1949 select CPU_HAS_PREFETCH
1950 select CPU_SUPPORTS_32BIT_KERNEL
1951 select CPU_SUPPORTS_HIGHMEM
1952 select CPU_SUPPORTS_CPUFREQ
1954 config CPU_BMIPS32_3300
1955 select SMP_UP if SMP
1958 config CPU_BMIPS4350
1960 select SYS_SUPPORTS_SMP
1961 select SYS_SUPPORTS_HOTPLUG_CPU
1963 config CPU_BMIPS4380
1965 select MIPS_L1_CACHE_SHIFT_6
1966 select SYS_SUPPORTS_SMP
1967 select SYS_SUPPORTS_HOTPLUG_CPU
1970 config CPU_BMIPS5000
1972 select MIPS_CPU_SCACHE
1973 select MIPS_L1_CACHE_SHIFT_7
1974 select SYS_SUPPORTS_SMP
1975 select SYS_SUPPORTS_HOTPLUG_CPU
1978 config SYS_HAS_CPU_LOONGSON64
1980 select CPU_SUPPORTS_CPUFREQ
1983 config SYS_HAS_CPU_LOONGSON2E
1986 config SYS_HAS_CPU_LOONGSON2F
1988 select CPU_SUPPORTS_CPUFREQ
1989 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1991 config SYS_HAS_CPU_LOONGSON1B
1994 config SYS_HAS_CPU_LOONGSON1C
1997 config SYS_HAS_CPU_MIPS32_R1
2000 config SYS_HAS_CPU_MIPS32_R2
2003 config SYS_HAS_CPU_MIPS32_R3_5
2006 config SYS_HAS_CPU_MIPS32_R5
2008 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2010 config SYS_HAS_CPU_MIPS32_R6
2012 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2014 config SYS_HAS_CPU_MIPS64_R1
2017 config SYS_HAS_CPU_MIPS64_R2
2020 config SYS_HAS_CPU_MIPS64_R6
2022 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2024 config SYS_HAS_CPU_P5600
2026 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2028 config SYS_HAS_CPU_R3000
2031 config SYS_HAS_CPU_TX39XX
2034 config SYS_HAS_CPU_VR41XX
2037 config SYS_HAS_CPU_R4300
2040 config SYS_HAS_CPU_R4X00
2043 config SYS_HAS_CPU_TX49XX
2046 config SYS_HAS_CPU_R5000
2049 config SYS_HAS_CPU_R5500
2052 config SYS_HAS_CPU_NEVADA
2055 config SYS_HAS_CPU_R10000
2057 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2059 config SYS_HAS_CPU_RM7000
2062 config SYS_HAS_CPU_SB1
2065 config SYS_HAS_CPU_CAVIUM_OCTEON
2068 config SYS_HAS_CPU_BMIPS
2071 config SYS_HAS_CPU_BMIPS32_3300
2073 select SYS_HAS_CPU_BMIPS
2075 config SYS_HAS_CPU_BMIPS4350
2077 select SYS_HAS_CPU_BMIPS
2079 config SYS_HAS_CPU_BMIPS4380
2081 select SYS_HAS_CPU_BMIPS
2083 config SYS_HAS_CPU_BMIPS5000
2085 select SYS_HAS_CPU_BMIPS
2086 select ARCH_HAS_SYNC_DMA_FOR_CPU
2088 config SYS_HAS_CPU_XLR
2091 config SYS_HAS_CPU_XLP
2095 # CPU may reorder R->R, R->W, W->R, W->W
2096 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2098 config WEAK_ORDERING
2102 # CPU may reorder reads and writes beyond LL/SC
2103 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2105 config WEAK_REORDERING_BEYOND_LLSC
2110 # These two indicate any level of the MIPS32 and MIPS64 architecture
2114 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2115 CPU_MIPS32_R6 || CPU_P5600
2119 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2120 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2123 # These indicate the revision of the architecture
2127 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2131 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2133 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2138 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2140 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2145 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2147 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2148 select HAVE_ARCH_BITREVERSE
2149 select MIPS_ASID_BITS_VARIABLE
2150 select MIPS_CRC_SUPPORT
2153 config TARGET_ISA_REV
2155 default 1 if CPU_MIPSR1
2156 default 2 if CPU_MIPSR2
2157 default 5 if CPU_MIPSR5
2158 default 6 if CPU_MIPSR6
2161 Reflects the ISA revision being targeted by the kernel build. This
2162 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2170 config SYS_SUPPORTS_32BIT_KERNEL
2172 config SYS_SUPPORTS_64BIT_KERNEL
2174 config CPU_SUPPORTS_32BIT_KERNEL
2176 config CPU_SUPPORTS_64BIT_KERNEL
2178 config CPU_SUPPORTS_CPUFREQ
2180 config CPU_SUPPORTS_ADDRWINCFG
2182 config CPU_SUPPORTS_HUGEPAGES
2184 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2185 config MIPS_PGD_C0_CONTEXT
2188 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2191 # Set to y for ptrace access to watch registers.
2193 config HARDWARE_WATCHPOINTS
2195 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2200 prompt "Kernel code model"
2202 You should only select this option if you have a workload that
2203 actually benefits from 64-bit processing or if your machine has
2204 large memory. You will only be presented a single option in this
2205 menu if your system does not support both 32-bit and 64-bit kernels.
2208 bool "32-bit kernel"
2209 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2212 Select this option if you want to build a 32-bit kernel.
2215 bool "64-bit kernel"
2216 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2218 Select this option if you want to build a 64-bit kernel.
2222 config MIPS_VA_BITS_48
2223 bool "48 bits virtual memory"
2226 Support a maximum at least 48 bits of application virtual
2227 memory. Default is 40 bits or less, depending on the CPU.
2228 For page sizes 16k and above, this option results in a small
2229 memory overhead for page tables. For 4k page size, a fourth
2230 level of page tables is added which imposes both a memory
2231 overhead as well as slower TLB fault handling.
2236 prompt "Kernel page size"
2237 default PAGE_SIZE_4KB
2239 config PAGE_SIZE_4KB
2241 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2243 This option select the standard 4kB Linux page size. On some
2244 R3000-family processors this is the only available page size. Using
2245 4kB page size will minimize memory consumption and is therefore
2246 recommended for low memory systems.
2248 config PAGE_SIZE_8KB
2250 depends on CPU_CAVIUM_OCTEON
2251 depends on !MIPS_VA_BITS_48
2253 Using 8kB page size will result in higher performance kernel at
2254 the price of higher memory consumption. This option is available
2255 only on cnMIPS processors. Note that you will need a suitable Linux
2256 distribution to support this.
2258 config PAGE_SIZE_16KB
2260 depends on !CPU_R3000 && !CPU_TX39XX
2262 Using 16kB page size will result in higher performance kernel at
2263 the price of higher memory consumption. This option is available on
2264 all non-R3000 family processors. Note that you will need a suitable
2265 Linux distribution to support this.
2267 config PAGE_SIZE_32KB
2269 depends on CPU_CAVIUM_OCTEON
2270 depends on !MIPS_VA_BITS_48
2272 Using 32kB page size will result in higher performance kernel at
2273 the price of higher memory consumption. This option is available
2274 only on cnMIPS cores. Note that you will need a suitable Linux
2275 distribution to support this.
2277 config PAGE_SIZE_64KB
2279 depends on !CPU_R3000 && !CPU_TX39XX
2281 Using 64kB page size will result in higher performance kernel at
2282 the price of higher memory consumption. This option is available on
2283 all non-R3000 family processor. Not that at the time of this
2284 writing this option is still high experimental.
2288 config FORCE_MAX_ZONEORDER
2289 int "Maximum zone order"
2290 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2291 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2292 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2293 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2294 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2295 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2299 The kernel memory allocator divides physically contiguous memory
2300 blocks into "zones", where each zone is a power of two number of
2301 pages. This option selects the largest power of two that the kernel
2302 keeps in the memory allocator. If you need to allocate very large
2303 blocks of physically contiguous memory, then you may need to
2304 increase this value.
2306 This config option is actually maximum order plus one. For example,
2307 a value of 11 means that the largest free memory block is 2^10 pages.
2309 The page size is not necessarily 4KB. Keep this in mind
2310 when choosing a value for this option.
2315 config IP22_CPU_SCACHE
2320 # Support for a MIPS32 / MIPS64 style S-caches
2322 config MIPS_CPU_SCACHE
2326 config R5000_CPU_SCACHE
2330 config RM7000_CPU_SCACHE
2334 config SIBYTE_DMA_PAGEOPS
2335 bool "Use DMA to clear/copy pages"
2338 Instead of using the CPU to zero and copy pages, use a Data Mover
2339 channel. These DMA channels are otherwise unused by the standard
2340 SiByte Linux port. Seems to give a small performance benefit.
2342 config CPU_HAS_PREFETCH
2345 config CPU_GENERIC_DUMP_TLB
2347 default y if !(CPU_R3000 || CPU_TX39XX)
2349 config MIPS_FP_SUPPORT
2350 bool "Floating Point support" if EXPERT
2353 Select y to include support for floating point in the kernel
2354 including initialization of FPU hardware, FP context save & restore
2355 and emulation of an FPU where necessary. Without this support any
2356 userland program attempting to use floating point instructions will
2359 If you know that your userland will not attempt to use floating point
2360 instructions then you can say n here to shrink the kernel a little.
2364 config CPU_R2300_FPU
2366 depends on MIPS_FP_SUPPORT
2367 default y if CPU_R3000 || CPU_TX39XX
2374 depends on MIPS_FP_SUPPORT
2375 default y if !CPU_R2300_FPU
2377 config CPU_R4K_CACHE_TLB
2379 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2382 bool "MIPS MT SMP support (1 TC on each available VPE)"
2384 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2385 select CPU_MIPSR2_IRQ_VI
2386 select CPU_MIPSR2_IRQ_EI
2391 select SYS_SUPPORTS_SMP
2392 select SYS_SUPPORTS_SCHED_SMT
2393 select MIPS_PERF_SHARED_TC_COUNTERS
2395 This is a kernel model which is known as SMVP. This is supported
2396 on cores with the MT ASE and uses the available VPEs to implement
2397 virtual processors which supports SMP. This is equivalent to the
2398 Intel Hyperthreading feature. For further information go to
2399 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2405 bool "SMT (multithreading) scheduler support"
2406 depends on SYS_SUPPORTS_SCHED_SMT
2409 SMT scheduler support improves the CPU scheduler's decision making
2410 when dealing with MIPS MT enabled cores at a cost of slightly
2411 increased overhead in some places. If unsure say N here.
2413 config SYS_SUPPORTS_SCHED_SMT
2416 config SYS_SUPPORTS_MULTITHREADING
2419 config MIPS_MT_FPAFF
2420 bool "Dynamic FPU affinity for FP-intensive threads"
2422 depends on MIPS_MT_SMP
2424 config MIPSR2_TO_R6_EMULATOR
2425 bool "MIPS R2-to-R6 emulator"
2426 depends on CPU_MIPSR6
2427 depends on MIPS_FP_SUPPORT
2430 Choose this option if you want to run non-R6 MIPS userland code.
2431 Even if you say 'Y' here, the emulator will still be disabled by
2432 default. You can enable it using the 'mipsr2emu' kernel option.
2433 The only reason this is a build-time option is to save ~14K from the
2436 config SYS_SUPPORTS_VPE_LOADER
2438 depends on SYS_SUPPORTS_MULTITHREADING
2440 Indicates that the platform supports the VPE loader, and provides
2443 config MIPS_VPE_LOADER
2444 bool "VPE loader support."
2445 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2446 select CPU_MIPSR2_IRQ_VI
2447 select CPU_MIPSR2_IRQ_EI
2450 Includes a loader for loading an elf relocatable object
2451 onto another VPE and running it.
2453 config MIPS_VPE_LOADER_CMP
2456 depends on MIPS_VPE_LOADER && MIPS_CMP
2458 config MIPS_VPE_LOADER_MT
2461 depends on MIPS_VPE_LOADER && !MIPS_CMP
2463 config MIPS_VPE_LOADER_TOM
2464 bool "Load VPE program into memory hidden from linux"
2465 depends on MIPS_VPE_LOADER
2468 The loader can use memory that is present but has been hidden from
2469 Linux using the kernel command line option "mem=xxMB". It's up to
2470 you to ensure the amount you put in the option and the space your
2471 program requires is less or equal to the amount physically present.
2473 config MIPS_VPE_APSP_API
2474 bool "Enable support for AP/SP API (RTLX)"
2475 depends on MIPS_VPE_LOADER
2477 config MIPS_VPE_APSP_API_CMP
2480 depends on MIPS_VPE_APSP_API && MIPS_CMP
2482 config MIPS_VPE_APSP_API_MT
2485 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2488 bool "MIPS CMP framework support (DEPRECATED)"
2489 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2492 select SYS_SUPPORTS_SMP
2493 select WEAK_ORDERING
2496 Select this if you are using a bootloader which implements the "CMP
2497 framework" protocol (ie. YAMON) and want your kernel to make use of
2498 its ability to start secondary CPUs.
2500 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2504 bool "MIPS Coherent Processing System support"
2505 depends on SYS_SUPPORTS_MIPS_CPS
2507 select MIPS_CPS_PM if HOTPLUG_CPU
2509 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2510 select SYS_SUPPORTS_HOTPLUG_CPU
2511 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2512 select SYS_SUPPORTS_SMP
2513 select WEAK_ORDERING
2514 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2516 Select this if you wish to run an SMP kernel across multiple cores
2517 within a MIPS Coherent Processing System. When this option is
2518 enabled the kernel will probe for other cores and boot them with
2519 no external assistance. It is safe to enable this when hardware
2520 support is unavailable.
2533 config SB1_PASS_2_WORKAROUNDS
2535 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2538 config SB1_PASS_2_1_WORKAROUNDS
2540 depends on CPU_SB1 && CPU_SB1_PASS_2
2544 prompt "SmartMIPS or microMIPS ASE support"
2546 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2549 Select this if you want neither microMIPS nor SmartMIPS support
2551 config CPU_HAS_SMARTMIPS
2552 depends on SYS_SUPPORTS_SMARTMIPS
2555 SmartMIPS is a extension of the MIPS32 architecture aimed at
2556 increased security at both hardware and software level for
2557 smartcards. Enabling this option will allow proper use of the
2558 SmartMIPS instructions by Linux applications. However a kernel with
2559 this option will not work on a MIPS core without SmartMIPS core. If
2560 you don't know you probably don't have SmartMIPS and should say N
2563 config CPU_MICROMIPS
2564 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2567 When this option is enabled the kernel will be built using the
2573 bool "Support for the MIPS SIMD Architecture"
2574 depends on CPU_SUPPORTS_MSA
2575 depends on MIPS_FP_SUPPORT
2576 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2578 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2579 and a set of SIMD instructions to operate on them. When this option
2580 is enabled the kernel will support allocating & switching MSA
2581 vector register contexts. If you know that your kernel will only be
2582 running on CPUs which do not support MSA or that your userland will
2583 not be making use of it then you may wish to say N here to reduce
2584 the size & complexity of your kernel.
2595 depends on !CPU_DIEI_BROKEN
2598 config CPU_DIEI_BROKEN
2604 config CPU_NO_LOAD_STORE_LR
2607 CPU lacks support for unaligned load and store instructions:
2608 LWL, LWR, SWL, SWR (Load/store word left/right).
2609 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2613 # Vectored interrupt mode is an R2 feature
2615 config CPU_MIPSR2_IRQ_VI
2619 # Extended interrupt mode is an R2 feature
2621 config CPU_MIPSR2_IRQ_EI
2626 depends on !CPU_R3000
2632 config CPU_DADDI_WORKAROUNDS
2635 config CPU_R4000_WORKAROUNDS
2637 select CPU_R4400_WORKAROUNDS
2639 config CPU_R4400_WORKAROUNDS
2642 config CPU_R4X00_BUGS64
2644 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2646 config MIPS_ASID_SHIFT
2648 default 6 if CPU_R3000 || CPU_TX39XX
2651 config MIPS_ASID_BITS
2653 default 0 if MIPS_ASID_BITS_VARIABLE
2654 default 6 if CPU_R3000 || CPU_TX39XX
2657 config MIPS_ASID_BITS_VARIABLE
2660 config MIPS_CRC_SUPPORT
2663 # R4600 erratum. Due to the lack of errata information the exact
2664 # technical details aren't known. I've experimentally found that disabling
2665 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2667 config WAR_R4600_V1_INDEX_ICACHEOP
2670 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2672 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2673 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2674 # executed if there is no other dcache activity. If the dcache is
2675 # accessed for another instruction immediately preceding when these
2676 # cache instructions are executing, it is possible that the dcache
2677 # tag match outputs used by these cache instructions will be
2678 # incorrect. These cache instructions should be preceded by at least
2679 # four instructions that are not any kind of load or store
2682 # This is not allowed: lw
2686 # cache Hit_Writeback_Invalidate_D
2688 # This is allowed: lw
2693 # cache Hit_Writeback_Invalidate_D
2694 config WAR_R4600_V1_HIT_CACHEOP
2697 # Writeback and invalidate the primary cache dcache before DMA.
2699 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2700 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2701 # operate correctly if the internal data cache refill buffer is empty. These
2702 # CACHE instructions should be separated from any potential data cache miss
2703 # by a load instruction to an uncached address to empty the response buffer."
2704 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2706 config WAR_R4600_V2_HIT_CACHEOP
2709 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2710 # the line which this instruction itself exists, the following
2711 # operation is not guaranteed."
2713 # Workaround: do two phase flushing for Index_Invalidate_I
2714 config WAR_TX49XX_ICACHE_INDEX_INV
2717 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2718 # opposes it being called that) where invalid instructions in the same
2719 # I-cache line worth of instructions being fetched may case spurious
2721 config WAR_ICACHE_REFILLS
2724 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2725 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2726 config WAR_R10000_LLSC
2729 # 34K core erratum: "Problems Executing the TLBR Instruction"
2730 config WAR_MIPS34K_MISSED_ITLB
2734 # - Highmem only makes sense for the 32-bit kernel.
2735 # - The current highmem code will only work properly on physically indexed
2736 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2737 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2738 # moment we protect the user and offer the highmem option only on machines
2739 # where it's known to be safe. This will not offer highmem on a few systems
2740 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2741 # indexed CPUs but we're playing safe.
2742 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2743 # know they might have memory configurations that could make use of highmem
2747 bool "High Memory Support"
2748 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2751 config CPU_SUPPORTS_HIGHMEM
2754 config SYS_SUPPORTS_HIGHMEM
2757 config SYS_SUPPORTS_SMARTMIPS
2760 config SYS_SUPPORTS_MICROMIPS
2763 config SYS_SUPPORTS_MIPS16
2766 This option must be set if a kernel might be executed on a MIPS16-
2767 enabled CPU even if MIPS16 is not actually being used. In other
2768 words, it makes the kernel MIPS16-tolerant.
2770 config CPU_SUPPORTS_MSA
2773 config ARCH_FLATMEM_ENABLE
2775 depends on !NUMA && !CPU_LOONGSON2EF
2777 config ARCH_SPARSEMEM_ENABLE
2779 select SPARSEMEM_STATIC if !SGI_IP27
2783 depends on SYS_SUPPORTS_NUMA
2786 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2787 Access). This option improves performance on systems with more
2788 than two nodes; on two node systems it is generally better to
2789 leave it disabled; on single node systems leave this option
2792 config SYS_SUPPORTS_NUMA
2795 config HAVE_SETUP_PER_CPU_AREA
2799 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2804 bool "Relocatable kernel"
2805 depends on SYS_SUPPORTS_RELOCATABLE
2806 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2807 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2808 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2809 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2812 This builds a kernel image that retains relocation information
2813 so it can be loaded someplace besides the default 1MB.
2814 The relocations make the kernel binary about 15% larger,
2815 but are discarded at runtime
2817 config RELOCATION_TABLE_SIZE
2818 hex "Relocation table size"
2819 depends on RELOCATABLE
2820 range 0x0 0x01000000
2821 default "0x00200000" if CPU_LOONGSON64
2822 default "0x00100000"
2824 A table of relocation data will be appended to the kernel binary
2825 and parsed at boot to fix up the relocated kernel.
2827 This option allows the amount of space reserved for the table to be
2828 adjusted, although the default of 1Mb should be ok in most cases.
2830 The build will fail and a valid size suggested if this is too small.
2832 If unsure, leave at the default value.
2834 config RANDOMIZE_BASE
2835 bool "Randomize the address of the kernel image"
2836 depends on RELOCATABLE
2838 Randomizes the physical and virtual address at which the
2839 kernel image is loaded, as a security feature that
2840 deters exploit attempts relying on knowledge of the location
2841 of kernel internals.
2843 Entropy is generated using any coprocessor 0 registers available.
2845 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2849 config RANDOMIZE_BASE_MAX_OFFSET
2850 hex "Maximum kASLR offset" if EXPERT
2851 depends on RANDOMIZE_BASE
2852 range 0x0 0x40000000 if EVA || 64BIT
2853 range 0x0 0x08000000
2854 default "0x01000000"
2856 When kASLR is active, this provides the maximum offset that will
2857 be applied to the kernel image. It should be set according to the
2858 amount of physical RAM available in the target system minus
2859 PHYSICAL_START and must be a power of 2.
2861 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2862 EVA or 64-bit. The default is 16Mb.
2869 config HW_PERF_EVENTS
2870 bool "Enable hardware performance counter support for perf events"
2871 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2874 Enable hardware performance counter support for perf events. If
2875 disabled, perf events will use software events only.
2878 bool "Enable DMI scanning"
2879 depends on MACH_LOONGSON64
2880 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2883 Enabled scanning of DMI to identify machine quirks. Say Y
2884 here unless you have verified that your setup is not
2885 affected by entries in the DMI blacklist. Required by PNP
2889 bool "Multi-Processing support"
2890 depends on SYS_SUPPORTS_SMP
2892 This enables support for systems with more than one CPU. If you have
2893 a system with only one CPU, say N. If you have a system with more
2894 than one CPU, say Y.
2896 If you say N here, the kernel will run on uni- and multiprocessor
2897 machines, but will use only one CPU of a multiprocessor machine. If
2898 you say Y here, the kernel will run on many, but not all,
2899 uniprocessor machines. On a uniprocessor machine, the kernel
2900 will run faster if you say N here.
2902 People using multiprocessor machines who say Y here should also say
2903 Y to "Enhanced Real Time Clock Support", below.
2905 See also the SMP-HOWTO available at
2906 <https://www.tldp.org/docs.html#howto>.
2908 If you don't know what to do here, say N.
2911 bool "Support for hot-pluggable CPUs"
2912 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2914 Say Y here to allow turning CPUs off and on. CPUs can be
2915 controlled through /sys/devices/system/cpu.
2916 (Note: power management support will enable this option
2917 automatically on SMP systems. )
2918 Say N if you want to disable CPU hotplug.
2923 config SYS_SUPPORTS_MIPS_CMP
2926 config SYS_SUPPORTS_MIPS_CPS
2929 config SYS_SUPPORTS_SMP
2932 config NR_CPUS_DEFAULT_4
2935 config NR_CPUS_DEFAULT_8
2938 config NR_CPUS_DEFAULT_16
2941 config NR_CPUS_DEFAULT_32
2944 config NR_CPUS_DEFAULT_64
2948 int "Maximum number of CPUs (2-256)"
2951 default "4" if NR_CPUS_DEFAULT_4
2952 default "8" if NR_CPUS_DEFAULT_8
2953 default "16" if NR_CPUS_DEFAULT_16
2954 default "32" if NR_CPUS_DEFAULT_32
2955 default "64" if NR_CPUS_DEFAULT_64
2957 This allows you to specify the maximum number of CPUs which this
2958 kernel will support. The maximum supported value is 32 for 32-bit
2959 kernel and 64 for 64-bit kernels; the minimum value which makes
2960 sense is 1 for Qemu (useful only for kernel debugging purposes)
2961 and 2 for all others.
2963 This is purely to save memory - each supported CPU adds
2964 approximately eight kilobytes to the kernel image. For best
2965 performance should round up your number of processors to the next
2968 config MIPS_PERF_SHARED_TC_COUNTERS
2971 config MIPS_NR_CPU_NR_MAP_1024
2974 config MIPS_NR_CPU_NR_MAP
2977 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2978 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2981 # Timer Interrupt Frequency Configuration
2985 prompt "Timer frequency"
2988 Allows the configuration of the timer frequency.
2991 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2994 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2997 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
3000 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3003 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3006 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3009 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3012 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3016 config SYS_SUPPORTS_24HZ
3019 config SYS_SUPPORTS_48HZ
3022 config SYS_SUPPORTS_100HZ
3025 config SYS_SUPPORTS_128HZ
3028 config SYS_SUPPORTS_250HZ
3031 config SYS_SUPPORTS_256HZ
3034 config SYS_SUPPORTS_1000HZ
3037 config SYS_SUPPORTS_1024HZ
3040 config SYS_SUPPORTS_ARBIT_HZ
3042 default y if !SYS_SUPPORTS_24HZ && \
3043 !SYS_SUPPORTS_48HZ && \
3044 !SYS_SUPPORTS_100HZ && \
3045 !SYS_SUPPORTS_128HZ && \
3046 !SYS_SUPPORTS_250HZ && \
3047 !SYS_SUPPORTS_256HZ && \
3048 !SYS_SUPPORTS_1000HZ && \
3049 !SYS_SUPPORTS_1024HZ
3055 default 100 if HZ_100
3056 default 128 if HZ_128
3057 default 250 if HZ_250
3058 default 256 if HZ_256
3059 default 1000 if HZ_1000
3060 default 1024 if HZ_1024
3063 def_bool HIGH_RES_TIMERS
3066 bool "Kexec system call"
3069 kexec is a system call that implements the ability to shutdown your
3070 current kernel, and to start another kernel. It is like a reboot
3071 but it is independent of the system firmware. And like a reboot
3072 you can start any kernel with it, not just Linux.
3074 The name comes from the similarity to the exec system call.
3076 It is an ongoing process to be certain the hardware in a machine
3077 is properly shutdown, so do not be surprised if this code does not
3078 initially work for you. As of this writing the exact hardware
3079 interface is strongly in flux, so no good recommendation can be
3083 bool "Kernel crash dumps"
3085 Generate crash dump after being started by kexec.
3086 This should be normally only set in special crash dump kernels
3087 which are loaded in the main kernel with kexec-tools into
3088 a specially reserved region and then later executed after
3089 a crash by kdump/kexec. The crash dump kernel must be compiled
3090 to a memory address not used by the main kernel or firmware using
3093 config PHYSICAL_START
3094 hex "Physical address where the kernel is loaded"
3095 default "0xffffffff84000000"
3096 depends on CRASH_DUMP
3098 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3099 If you plan to use kernel for capturing the crash dump change
3100 this value to start of the reserved region (the "X" value as
3101 specified in the "crashkernel=YM@XM" command line boot parameter
3102 passed to the panic-ed kernel).
3104 config MIPS_O32_FP64_SUPPORT
3105 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3106 depends on 32BIT || MIPS32_O32
3108 When this is enabled, the kernel will support use of 64-bit floating
3109 point registers with binaries using the O32 ABI along with the
3110 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3111 32-bit MIPS systems this support is at the cost of increasing the
3112 size and complexity of the compiled FPU emulator. Thus if you are
3113 running a MIPS32 system and know that none of your userland binaries
3114 will require 64-bit floating point, you may wish to reduce the size
3115 of your kernel & potentially improve FP emulation performance by
3118 Although binutils currently supports use of this flag the details
3119 concerning its effect upon the O32 ABI in userland are still being
3120 worked on. In order to avoid userland becoming dependent upon current
3121 behaviour before the details have been finalised, this option should
3122 be considered experimental and only enabled by those working upon
3130 select OF_EARLY_FLATTREE
3140 prompt "Kernel appended dtb support" if USE_OF
3141 default MIPS_NO_APPENDED_DTB
3143 config MIPS_NO_APPENDED_DTB
3146 Do not enable appended dtb support.
3148 config MIPS_ELF_APPENDED_DTB
3151 With this option, the boot code will look for a device tree binary
3152 DTB) included in the vmlinux ELF section .appended_dtb. By default
3153 it is empty and the DTB can be appended using binutils command
3156 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3158 This is meant as a backward compatibility convenience for those
3159 systems with a bootloader that can't be upgraded to accommodate
3160 the documented boot protocol using a device tree.
3162 config MIPS_RAW_APPENDED_DTB
3163 bool "vmlinux.bin or vmlinuz.bin"
3165 With this option, the boot code will look for a device tree binary
3166 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3167 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3169 This is meant as a backward compatibility convenience for those
3170 systems with a bootloader that can't be upgraded to accommodate
3171 the documented boot protocol using a device tree.
3173 Beware that there is very little in terms of protection against
3174 this option being confused by leftover garbage in memory that might
3175 look like a DTB header after a reboot if no actual DTB is appended
3176 to vmlinux.bin. Do not leave this option active in a production kernel
3177 if you don't intend to always append a DTB.
3181 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3182 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3183 !MACH_LOONGSON64 && !MIPS_MALTA && \
3185 default MIPS_CMDLINE_FROM_BOOTLOADER
3187 config MIPS_CMDLINE_FROM_DTB
3189 bool "Dtb kernel arguments if available"
3191 config MIPS_CMDLINE_DTB_EXTEND
3193 bool "Extend dtb kernel arguments with bootloader arguments"
3195 config MIPS_CMDLINE_FROM_BOOTLOADER
3196 bool "Bootloader kernel arguments if available"
3198 config MIPS_CMDLINE_BUILTIN_EXTEND
3199 depends on CMDLINE_BOOL
3200 bool "Extend builtin kernel arguments with bootloader arguments"
3205 config LOCKDEP_SUPPORT
3209 config STACKTRACE_SUPPORT
3213 config PGTABLE_LEVELS
3215 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3216 default 3 if 64BIT && !PAGE_SIZE_64KB
3219 config MIPS_AUTO_PFN_OFFSET
3222 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3224 config PCI_DRIVERS_GENERIC
3225 select PCI_DOMAINS_GENERIC if PCI
3228 config PCI_DRIVERS_LEGACY
3229 def_bool !PCI_DRIVERS_GENERIC
3230 select NO_GENERIC_PCI_IOPORT_MAP
3231 select PCI_DOMAINS if PCI
3234 # ISA support is now enabled via select. Too many systems still have the one
3235 # or other ISA chip on the board that users don't know about so don't expect
3236 # users to choose the right thing ...
3242 bool "TURBOchannel support"
3243 depends on MACH_DECSTATION
3245 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3246 processors. TURBOchannel programming specifications are available
3248 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3250 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3251 Linux driver support status is documented at:
3252 <http://www.linux-mips.org/wiki/DECstation>
3258 config ARCH_MMAP_RND_BITS_MIN
3262 config ARCH_MMAP_RND_BITS_MAX
3266 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3269 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3276 select MIPS_EXTERNAL_TIMER
3282 config MIPS32_COMPAT
3288 config SYSVIPC_COMPAT
3292 bool "Kernel support for o32 binaries"
3294 select ARCH_WANT_OLD_COMPAT_IPC
3296 select MIPS32_COMPAT
3297 select SYSVIPC_COMPAT if SYSVIPC
3299 Select this option if you want to run o32 binaries. These are pure
3300 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3301 existing binaries are in this format.
3306 bool "Kernel support for n32 binaries"
3308 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3310 select MIPS32_COMPAT
3311 select SYSVIPC_COMPAT if SYSVIPC
3313 Select this option if you want to run n32 binaries. These are
3314 64-bit binaries using 32-bit quantities for addressing and certain
3315 data that would normally be 64-bit. They are used in special
3320 menu "Power management options"
3322 config ARCH_HIBERNATION_POSSIBLE
3324 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3326 config ARCH_SUSPEND_POSSIBLE
3328 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3330 source "kernel/power/Kconfig"
3334 config MIPS_EXTERNAL_TIMER
3337 menu "CPU Power Management"
3339 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3340 source "drivers/cpufreq/Kconfig"
3343 source "drivers/cpuidle/Kconfig"
3347 source "drivers/firmware/Kconfig"
3349 source "arch/mips/kvm/Kconfig"
3351 source "arch/mips/vdso/Kconfig"