1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_MEMTEST
20 select ARCH_USE_QUEUED_RWLOCKS
21 select ARCH_USE_QUEUED_SPINLOCKS
22 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24 select ARCH_WANT_IPC_PARSE_VERSION
25 select ARCH_WANT_LD_ORPHAN_WARN
26 select BUILDTIME_TABLE_SORT
27 select CLONE_BACKWARDS
28 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29 select CPU_PM if CPU_IDLE
30 select GENERIC_ATOMIC64 if !64BIT
31 select GENERIC_CMOS_UPDATE
32 select GENERIC_CPU_AUTOPROBE
33 select GENERIC_FIND_FIRST_BIT
34 select GENERIC_GETTIMEOFDAY
36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
38 select GENERIC_ISA_DMA if EISA
39 select GENERIC_LIB_ASHLDI3
40 select GENERIC_LIB_ASHRDI3
41 select GENERIC_LIB_CMPDI2
42 select GENERIC_LIB_LSHRDI3
43 select GENERIC_LIB_UCMPDI2
44 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45 select GENERIC_SMP_IDLE_THREAD
46 select GENERIC_TIME_VSYSCALL
47 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48 select HANDLE_DOMAIN_IRQ
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59 select HAVE_CONTEXT_TRACKING
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67 select HAVE_EXIT_THREAD
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
74 select HAVE_IOREMAP_PROT
75 select HAVE_IRQ_EXIT_ON_IRQ_STACK
76 select HAVE_IRQ_TIME_ACCOUNTING
78 select HAVE_KRETPROBES
79 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
80 select HAVE_MOD_ARCH_SPECIFIC
82 select HAVE_PERF_EVENTS
84 select HAVE_PERF_USER_STACK_DUMP
85 select HAVE_REGS_AND_STACK_ACCESS_API
87 select HAVE_SPARSE_SYSCALL_NR
88 select HAVE_STACKPROTECTOR
89 select HAVE_SYSCALL_TRACEPOINTS
90 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
91 select IRQ_FORCED_THREADING
93 select MODULES_USE_ELF_REL if MODULES
94 select MODULES_USE_ELF_RELA if MODULES && 64BIT
95 select PERF_USE_VMALLOC
96 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
98 select SYSCTL_EXCEPTION_TRACE
100 select ARCH_HAS_ELFCORE_COMPAT
102 config MIPS_FIXUP_BIGPHYS_ADDR
110 select SYS_SUPPORTS_32BIT_KERNEL
111 select SYS_SUPPORTS_LITTLE_ENDIAN
112 select SYS_SUPPORTS_ZBOOT
113 select DMA_NONCOHERENT
114 select ARCH_HAS_SYNC_DMA_FOR_CPU
119 select GENERIC_IRQ_CHIP
120 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
122 select CPU_SUPPORTS_CPUFREQ
123 select MIPS_EXTERNAL_TIMER
125 menu "Machine selection"
129 default MIPS_GENERIC_KERNEL
131 config MIPS_GENERIC_KERNEL
132 bool "Generic board-agnostic MIPS kernel"
133 select ARCH_HAS_SETUP_DMA_OPS
138 select CLKSRC_MIPS_GIC
140 select CPU_MIPSR2_IRQ_EI
141 select CPU_MIPSR2_IRQ_VI
143 select DMA_NONCOHERENT
146 select MIPS_AUTO_PFN_OFFSET
147 select MIPS_CPU_SCACHE
149 select MIPS_L1_CACHE_SHIFT_7
150 select NO_EXCEPT_FILL
151 select PCI_DRIVERS_GENERIC
154 select SYS_HAS_CPU_MIPS32_R1
155 select SYS_HAS_CPU_MIPS32_R2
156 select SYS_HAS_CPU_MIPS32_R6
157 select SYS_HAS_CPU_MIPS64_R1
158 select SYS_HAS_CPU_MIPS64_R2
159 select SYS_HAS_CPU_MIPS64_R6
160 select SYS_SUPPORTS_32BIT_KERNEL
161 select SYS_SUPPORTS_64BIT_KERNEL
162 select SYS_SUPPORTS_BIG_ENDIAN
163 select SYS_SUPPORTS_HIGHMEM
164 select SYS_SUPPORTS_LITTLE_ENDIAN
165 select SYS_SUPPORTS_MICROMIPS
166 select SYS_SUPPORTS_MIPS16
167 select SYS_SUPPORTS_MIPS_CPS
168 select SYS_SUPPORTS_MULTITHREADING
169 select SYS_SUPPORTS_RELOCATABLE
170 select SYS_SUPPORTS_SMARTMIPS
171 select SYS_SUPPORTS_ZBOOT
173 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 Select this to build a kernel which aims to support multiple boards,
182 generally using a flattened device tree passed from the bootloader
183 using the boot protocol defined in the UHI (Unified Hosting
184 Interface) specification.
187 bool "Alchemy processor based machines"
188 select PHYS_ADDR_T_64BIT
192 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
193 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
194 select SYS_HAS_CPU_MIPS32_R1
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_SUPPORTS_APM_EMULATION
198 select SYS_SUPPORTS_ZBOOT
202 bool "Texas Instruments AR7"
205 select DMA_NONCOHERENT
209 select NO_EXCEPT_FILL
211 select SYS_HAS_CPU_MIPS32_R1
212 select SYS_HAS_EARLY_PRINTK
213 select SYS_SUPPORTS_32BIT_KERNEL
214 select SYS_SUPPORTS_LITTLE_ENDIAN
215 select SYS_SUPPORTS_MIPS16
216 select SYS_SUPPORTS_ZBOOT_UART16550
220 Support for the Texas Instruments AR7 System-on-a-Chip
221 family: TNETD7100, 7200 and 7300.
224 bool "Atheros AR231x/AR531x SoC support"
227 select DMA_NONCOHERENT
230 select SYS_HAS_CPU_MIPS32_R1
231 select SYS_SUPPORTS_BIG_ENDIAN
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_HAS_EARLY_PRINTK
235 Support for Atheros AR231x and Atheros AR531x based boards
238 bool "Atheros AR71XX/AR724X/AR913X based boards"
239 select ARCH_HAS_RESET_CONTROLLER
243 select DMA_NONCOHERENT
248 select SYS_HAS_CPU_MIPS32_R2
249 select SYS_HAS_EARLY_PRINTK
250 select SYS_SUPPORTS_32BIT_KERNEL
251 select SYS_SUPPORTS_BIG_ENDIAN
252 select SYS_SUPPORTS_MIPS16
253 select SYS_SUPPORTS_ZBOOT_UART_PROM
255 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
257 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
260 bool "Broadcom Generic BMIPS kernel"
261 select ARCH_HAS_RESET_CONTROLLER
262 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263 select ARCH_HAS_PHYS_TO_DMA
265 select NO_EXCEPT_FILL
271 select BCM6345_L1_IRQ
272 select BCM7038_L1_IRQ
273 select BCM7120_L2_IRQ
274 select BRCMSTB_L2_IRQ
276 select DMA_NONCOHERENT
277 select SYS_SUPPORTS_32BIT_KERNEL
278 select SYS_SUPPORTS_LITTLE_ENDIAN
279 select SYS_SUPPORTS_BIG_ENDIAN
280 select SYS_SUPPORTS_HIGHMEM
281 select SYS_HAS_CPU_BMIPS32_3300
282 select SYS_HAS_CPU_BMIPS4350
283 select SYS_HAS_CPU_BMIPS4380
284 select SYS_HAS_CPU_BMIPS5000
286 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select HARDIRQS_SW_RESEND
292 Build a generic DT-based kernel image that boots on select
293 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
294 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
295 must be set appropriately for your board.
298 bool "Broadcom BCM47XX based boards"
302 select DMA_NONCOHERENT
305 select SYS_HAS_CPU_MIPS32_R1
306 select NO_EXCEPT_FILL
307 select SYS_SUPPORTS_32BIT_KERNEL
308 select SYS_SUPPORTS_LITTLE_ENDIAN
309 select SYS_SUPPORTS_MIPS16
310 select SYS_SUPPORTS_ZBOOT
311 select SYS_HAS_EARLY_PRINTK
312 select USE_GENERIC_EARLY_PRINTK_8250
314 select LEDS_GPIO_REGISTER
317 select BCM47XX_SSB if !BCM47XX_BCMA
319 Support for BCM47XX based boards
322 bool "Broadcom BCM63XX based boards"
327 select DMA_NONCOHERENT
329 select SYS_SUPPORTS_32BIT_KERNEL
330 select SYS_SUPPORTS_BIG_ENDIAN
331 select SYS_HAS_EARLY_PRINTK
334 select MIPS_L1_CACHE_SHIFT_4
335 select HAVE_LEGACY_CLK
337 Support for BCM63XX based boards
344 select DMA_NONCOHERENT
350 select PCI_GT64XXX_PCI0
351 select SYS_HAS_CPU_NEVADA
352 select SYS_HAS_EARLY_PRINTK
353 select SYS_SUPPORTS_32BIT_KERNEL
354 select SYS_SUPPORTS_64BIT_KERNEL
355 select SYS_SUPPORTS_LITTLE_ENDIAN
356 select USE_GENERIC_EARLY_PRINTK_8250
358 config MACH_DECSTATION
362 select CEVT_R4K if CPU_R4X00
364 select CSRC_R4K if CPU_R4X00
365 select CPU_DADDI_WORKAROUNDS if 64BIT
366 select CPU_R4000_WORKAROUNDS if 64BIT
367 select CPU_R4400_WORKAROUNDS if 64BIT
368 select DMA_NONCOHERENT
371 select SYS_HAS_CPU_R3000
372 select SYS_HAS_CPU_R4X00
373 select SYS_SUPPORTS_32BIT_KERNEL
374 select SYS_SUPPORTS_64BIT_KERNEL
375 select SYS_SUPPORTS_LITTLE_ENDIAN
376 select SYS_SUPPORTS_128HZ
377 select SYS_SUPPORTS_256HZ
378 select SYS_SUPPORTS_1024HZ
379 select MIPS_L1_CACHE_SHIFT_4
381 This enables support for DEC's MIPS based workstations. For details
382 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
383 DECstation porting pages on <http://decstation.unix-ag.org/>.
385 If you have one of the following DECstation Models you definitely
386 want to choose R4xx0 for the CPU Type:
393 otherwise choose R3000.
396 bool "Jazz family of machines"
399 select ARCH_MIGHT_HAVE_PC_PARPORT
400 select ARCH_MIGHT_HAVE_PC_SERIO
404 select ARCH_MAY_HAVE_PC_FDC
407 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
408 select GENERIC_ISA_DMA
409 select HAVE_PCSPKR_PLATFORM
414 select SYS_HAS_CPU_R4X00
415 select SYS_SUPPORTS_32BIT_KERNEL
416 select SYS_SUPPORTS_64BIT_KERNEL
417 select SYS_SUPPORTS_100HZ
418 select SYS_SUPPORTS_LITTLE_ENDIAN
420 This a family of machines based on the MIPS R4030 chipset which was
421 used by several vendors to build RISC/os and Windows NT workstations.
422 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
423 Olivetti M700-10 workstations.
425 config MACH_INGENIC_SOC
426 bool "Ingenic SoC based machines"
429 select SYS_SUPPORTS_ZBOOT_UART16550
430 select CPU_SUPPORTS_CPUFREQ
431 select MIPS_EXTERNAL_TIMER
434 bool "Lantiq based platforms"
435 select DMA_NONCOHERENT
439 select SYS_HAS_CPU_MIPS32_R1
440 select SYS_HAS_CPU_MIPS32_R2
441 select SYS_SUPPORTS_BIG_ENDIAN
442 select SYS_SUPPORTS_32BIT_KERNEL
443 select SYS_SUPPORTS_MIPS16
444 select SYS_SUPPORTS_MULTITHREADING
445 select SYS_SUPPORTS_VPE_LOADER
446 select SYS_HAS_EARLY_PRINTK
450 select HAVE_LEGACY_CLK
453 select PINCTRL_LANTIQ
454 select ARCH_HAS_RESET_CONTROLLER
455 select RESET_CONTROLLER
457 config MACH_LOONGSON32
458 bool "Loongson 32-bit family of machines"
459 select SYS_SUPPORTS_ZBOOT
461 This enables support for the Loongson-1 family of machines.
463 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
464 the Institute of Computing Technology (ICT), Chinese Academy of
467 config MACH_LOONGSON2EF
468 bool "Loongson-2E/F family of machines"
469 select SYS_SUPPORTS_ZBOOT
471 This enables the support of early Loongson-2E/F family of machines.
473 config MACH_LOONGSON64
474 bool "Loongson 64-bit family of machines"
475 select ARCH_SPARSEMEM_ENABLE
476 select ARCH_MIGHT_HAVE_PC_PARPORT
477 select ARCH_MIGHT_HAVE_PC_SERIO
478 select GENERIC_ISA_DMA_SUPPORT_BROKEN
488 select NO_EXCEPT_FILL
489 select NR_CPUS_DEFAULT_64
490 select USE_GENERIC_EARLY_PRINTK_8250
491 select PCI_DRIVERS_GENERIC
492 select SYS_HAS_CPU_LOONGSON64
493 select SYS_HAS_EARLY_PRINTK
494 select SYS_SUPPORTS_SMP
495 select SYS_SUPPORTS_HOTPLUG_CPU
496 select SYS_SUPPORTS_NUMA
497 select SYS_SUPPORTS_64BIT_KERNEL
498 select SYS_SUPPORTS_HIGHMEM
499 select SYS_SUPPORTS_LITTLE_ENDIAN
500 select SYS_SUPPORTS_ZBOOT
501 select SYS_SUPPORTS_RELOCATABLE
506 select PCI_HOST_GENERIC
508 This enables the support of Loongson-2/3 family of machines.
510 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
511 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
512 and Loongson-2F which will be removed), developed by the Institute
513 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
515 config MACH_PISTACHIO
516 bool "IMG Pistachio SoC based boards"
520 select CLKSRC_MIPS_GIC
523 select DMA_NONCOHERENT
527 select MIPS_CPU_SCACHE
531 select SYS_HAS_CPU_MIPS32_R2
532 select SYS_SUPPORTS_32BIT_KERNEL
533 select SYS_SUPPORTS_LITTLE_ENDIAN
534 select SYS_SUPPORTS_MIPS_CPS
535 select SYS_SUPPORTS_MULTITHREADING
536 select SYS_SUPPORTS_RELOCATABLE
537 select SYS_SUPPORTS_ZBOOT
538 select SYS_HAS_EARLY_PRINTK
539 select USE_GENERIC_EARLY_PRINTK_8250
542 This enables support for the IMG Pistachio SoC platform.
545 bool "MIPS Malta board"
546 select ARCH_MAY_HAVE_PC_FDC
547 select ARCH_MIGHT_HAVE_PC_PARPORT
548 select ARCH_MIGHT_HAVE_PC_SERIO
553 select CLKSRC_MIPS_GIC
556 select DMA_NONCOHERENT
557 select GENERIC_ISA_DMA
558 select HAVE_PCSPKR_PLATFORM
564 select MIPS_CPU_SCACHE
566 select MIPS_L1_CACHE_SHIFT_6
568 select PCI_GT64XXX_PCI0
571 select SYS_HAS_CPU_MIPS32_R1
572 select SYS_HAS_CPU_MIPS32_R2
573 select SYS_HAS_CPU_MIPS32_R3_5
574 select SYS_HAS_CPU_MIPS32_R5
575 select SYS_HAS_CPU_MIPS32_R6
576 select SYS_HAS_CPU_MIPS64_R1
577 select SYS_HAS_CPU_MIPS64_R2
578 select SYS_HAS_CPU_MIPS64_R6
579 select SYS_HAS_CPU_NEVADA
580 select SYS_HAS_CPU_RM7000
581 select SYS_SUPPORTS_32BIT_KERNEL
582 select SYS_SUPPORTS_64BIT_KERNEL
583 select SYS_SUPPORTS_BIG_ENDIAN
584 select SYS_SUPPORTS_HIGHMEM
585 select SYS_SUPPORTS_LITTLE_ENDIAN
586 select SYS_SUPPORTS_MICROMIPS
587 select SYS_SUPPORTS_MIPS16
588 select SYS_SUPPORTS_MIPS_CMP
589 select SYS_SUPPORTS_MIPS_CPS
590 select SYS_SUPPORTS_MULTITHREADING
591 select SYS_SUPPORTS_RELOCATABLE
592 select SYS_SUPPORTS_SMARTMIPS
593 select SYS_SUPPORTS_VPE_LOADER
594 select SYS_SUPPORTS_ZBOOT
596 select WAR_ICACHE_REFILLS
597 select ZONE_DMA32 if 64BIT
599 This enables support for the MIPS Technologies Malta evaluation
603 bool "Microchip PIC32 Family"
605 This enables support for the Microchip PIC32 family of platforms.
607 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
611 bool "NEC VR4100 series based machines"
614 select SYS_HAS_CPU_VR41XX
615 select SYS_SUPPORTS_MIPS16
618 config MACH_NINTENDO64
619 bool "Nintendo 64 console"
622 select SYS_HAS_CPU_R4300
623 select SYS_SUPPORTS_BIG_ENDIAN
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_SUPPORTS_32BIT_KERNEL
626 select SYS_SUPPORTS_64BIT_KERNEL
627 select DMA_NONCOHERENT
631 bool "Ralink based machines"
636 select DMA_NONCOHERENT
639 select SYS_HAS_CPU_MIPS32_R1
640 select SYS_HAS_CPU_MIPS32_R2
641 select SYS_SUPPORTS_32BIT_KERNEL
642 select SYS_SUPPORTS_LITTLE_ENDIAN
643 select SYS_SUPPORTS_MIPS16
644 select SYS_SUPPORTS_ZBOOT
645 select SYS_HAS_EARLY_PRINTK
646 select ARCH_HAS_RESET_CONTROLLER
647 select RESET_CONTROLLER
649 config MACH_REALTEK_RTL
650 bool "Realtek RTL838x/RTL839x based machines"
652 select DMA_NONCOHERENT
656 select SYS_HAS_CPU_MIPS32_R1
657 select SYS_HAS_CPU_MIPS32_R2
658 select SYS_SUPPORTS_BIG_ENDIAN
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_MIPS16
661 select SYS_SUPPORTS_MULTITHREADING
662 select SYS_SUPPORTS_VPE_LOADER
663 select SYS_HAS_EARLY_PRINTK
664 select SYS_HAS_EARLY_PRINTK_8250
665 select USE_GENERIC_EARLY_PRINTK_8250
671 bool "SGI IP22 (Indy/Indigo2)"
676 select ARCH_MIGHT_HAVE_PC_SERIO
680 select DEFAULT_SGI_PARTITION
681 select DMA_NONCOHERENT
685 select IP22_CPU_SCACHE
687 select GENERIC_ISA_DMA_SUPPORT_BROKEN
689 select SGI_HAS_INDYDOG
695 select SYS_HAS_CPU_R4X00
696 select SYS_HAS_CPU_R5000
697 select SYS_HAS_EARLY_PRINTK
698 select SYS_SUPPORTS_32BIT_KERNEL
699 select SYS_SUPPORTS_64BIT_KERNEL
700 select SYS_SUPPORTS_BIG_ENDIAN
701 select WAR_R4600_V1_INDEX_ICACHEOP
702 select WAR_R4600_V1_HIT_CACHEOP
703 select WAR_R4600_V2_HIT_CACHEOP
704 select MIPS_L1_CACHE_SHIFT_7
706 This are the SGI Indy, Challenge S and Indigo2, as well as certain
707 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
708 that runs on these, say Y here.
711 bool "SGI IP27 (Origin200/2000)"
712 select ARCH_HAS_PHYS_TO_DMA
713 select ARCH_SPARSEMEM_ENABLE
716 select ARC_CMDLINE_ONLY
718 select DEFAULT_SGI_PARTITION
720 select SYS_HAS_EARLY_PRINTK
723 select IRQ_DOMAIN_HIERARCHY
724 select NR_CPUS_DEFAULT_64
725 select PCI_DRIVERS_GENERIC
726 select PCI_XTALK_BRIDGE
727 select SYS_HAS_CPU_R10000
728 select SYS_SUPPORTS_64BIT_KERNEL
729 select SYS_SUPPORTS_BIG_ENDIAN
730 select SYS_SUPPORTS_NUMA
731 select SYS_SUPPORTS_SMP
732 select WAR_R10000_LLSC
733 select MIPS_L1_CACHE_SHIFT_7
736 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
737 workstations. To compile a Linux kernel that runs on these, say Y
741 bool "SGI IP28 (Indigo2 R10k)"
746 select ARCH_MIGHT_HAVE_PC_SERIO
750 select DEFAULT_SGI_PARTITION
751 select DMA_NONCOHERENT
752 select GENERIC_ISA_DMA_SUPPORT_BROKEN
758 select SGI_HAS_INDYDOG
764 select SYS_HAS_CPU_R10000
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select WAR_R10000_LLSC
769 select MIPS_L1_CACHE_SHIFT_7
771 This is the SGI Indigo2 with R10000 processor. To compile a Linux
772 kernel that runs on these, say Y here.
775 bool "SGI IP30 (Octane/Octane2)"
776 select ARCH_HAS_PHYS_TO_DMA
783 select SYNC_R4K if SMP
787 select IRQ_DOMAIN_HIERARCHY
788 select NR_CPUS_DEFAULT_2
789 select PCI_DRIVERS_GENERIC
790 select PCI_XTALK_BRIDGE
791 select SYS_HAS_EARLY_PRINTK
792 select SYS_HAS_CPU_R10000
793 select SYS_SUPPORTS_64BIT_KERNEL
794 select SYS_SUPPORTS_BIG_ENDIAN
795 select SYS_SUPPORTS_SMP
796 select WAR_R10000_LLSC
797 select MIPS_L1_CACHE_SHIFT_7
800 These are the SGI Octane and Octane2 graphics workstations. To
801 compile a Linux kernel that runs on these, say Y here.
807 select ARCH_HAS_PHYS_TO_DMA
813 select DMA_NONCOHERENT
816 select R5000_CPU_SCACHE
817 select RM7000_CPU_SCACHE
818 select SYS_HAS_CPU_R5000
819 select SYS_HAS_CPU_R10000 if BROKEN
820 select SYS_HAS_CPU_RM7000
821 select SYS_HAS_CPU_NEVADA
822 select SYS_SUPPORTS_64BIT_KERNEL
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select WAR_ICACHE_REFILLS
826 If you want this kernel to run on SGI O2 workstation, say Y here.
829 bool "Sibyte BCM91120C-CRhine"
831 select SIBYTE_BCM1120
833 select SYS_HAS_CPU_SB1
834 select SYS_SUPPORTS_BIG_ENDIAN
835 select SYS_SUPPORTS_LITTLE_ENDIAN
838 bool "Sibyte BCM91120x-Carmel"
840 select SIBYTE_BCM1120
842 select SYS_HAS_CPU_SB1
843 select SYS_SUPPORTS_BIG_ENDIAN
844 select SYS_SUPPORTS_LITTLE_ENDIAN
847 bool "Sibyte BCM91125C-CRhone"
849 select SIBYTE_BCM1125
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_HIGHMEM
854 select SYS_SUPPORTS_LITTLE_ENDIAN
857 bool "Sibyte BCM91125E-Rhone"
859 select SIBYTE_BCM1125H
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_LITTLE_ENDIAN
866 bool "Sibyte BCM91250A-SWARM"
868 select HAVE_PATA_PLATFORM
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_HIGHMEM
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select ZONE_DMA32 if 64BIT
876 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
878 config SIBYTE_LITTLESUR
879 bool "Sibyte BCM91250C2-LittleSur"
881 select HAVE_PATA_PLATFORM
884 select SYS_HAS_CPU_SB1
885 select SYS_SUPPORTS_BIG_ENDIAN
886 select SYS_SUPPORTS_HIGHMEM
887 select SYS_SUPPORTS_LITTLE_ENDIAN
888 select ZONE_DMA32 if 64BIT
890 config SIBYTE_SENTOSA
891 bool "Sibyte BCM91250E-Sentosa"
895 select SYS_HAS_CPU_SB1
896 select SYS_SUPPORTS_BIG_ENDIAN
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
901 bool "Sibyte BCM91480B-BigSur"
903 select NR_CPUS_DEFAULT_4
904 select SIBYTE_BCM1x80
906 select SYS_HAS_CPU_SB1
907 select SYS_SUPPORTS_BIG_ENDIAN
908 select SYS_SUPPORTS_HIGHMEM
909 select SYS_SUPPORTS_LITTLE_ENDIAN
910 select ZONE_DMA32 if 64BIT
911 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
914 bool "SNI RM200/300/400"
917 select FW_ARC if CPU_LITTLE_ENDIAN
918 select FW_ARC32 if CPU_LITTLE_ENDIAN
919 select FW_SNIPROM if CPU_BIG_ENDIAN
920 select ARCH_MAY_HAVE_PC_FDC
921 select ARCH_MIGHT_HAVE_PC_PARPORT
922 select ARCH_MIGHT_HAVE_PC_SERIO
926 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
927 select DMA_NONCOHERENT
928 select GENERIC_ISA_DMA
930 select HAVE_PCSPKR_PLATFORM
936 select MIPS_L1_CACHE_SHIFT_6
937 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
938 select SYS_HAS_CPU_R4X00
939 select SYS_HAS_CPU_R5000
940 select SYS_HAS_CPU_R10000
941 select R5000_CPU_SCACHE
942 select SYS_HAS_EARLY_PRINTK
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_64BIT_KERNEL
945 select SYS_SUPPORTS_BIG_ENDIAN
946 select SYS_SUPPORTS_HIGHMEM
947 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select WAR_R4600_V2_HIT_CACHEOP
950 The SNI RM200/300/400 are MIPS-based machines manufactured by
951 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
952 Technology and now in turn merged with Fujitsu. Say Y here to
953 support this machine type.
956 bool "Toshiba TX39 series based machines"
959 bool "Toshiba TX49 series based machines"
960 select WAR_TX49XX_ICACHE_INDEX_INV
962 config MIKROTIK_RB532
963 bool "Mikrotik RB532 boards"
966 select DMA_NONCOHERENT
969 select SYS_HAS_CPU_MIPS32_R1
970 select SYS_SUPPORTS_32BIT_KERNEL
971 select SYS_SUPPORTS_LITTLE_ENDIAN
975 select MIPS_L1_CACHE_SHIFT_4
977 Support the Mikrotik(tm) RouterBoard 532 series,
978 based on the IDT RC32434 SoC.
980 config CAVIUM_OCTEON_SOC
981 bool "Cavium Networks Octeon SoC based boards"
983 select ARCH_HAS_PHYS_TO_DMA
985 select PHYS_ADDR_T_64BIT
986 select SYS_SUPPORTS_64BIT_KERNEL
987 select SYS_SUPPORTS_BIG_ENDIAN
989 select EDAC_ATOMIC_SCRUB
990 select SYS_SUPPORTS_LITTLE_ENDIAN
991 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
992 select SYS_HAS_EARLY_PRINTK
993 select SYS_HAS_CPU_CAVIUM_OCTEON
995 select HAVE_PLAT_DELAY
996 select HAVE_PLAT_FW_INIT_CMDLINE
997 select HAVE_PLAT_MEMCPY
1001 select ARCH_SPARSEMEM_ENABLE
1002 select SYS_SUPPORTS_SMP
1003 select NR_CPUS_DEFAULT_64
1004 select MIPS_NR_CPU_NR_MAP_1024
1007 select MTD_COMPLEX_MAPPINGS
1009 select SYS_SUPPORTS_RELOCATABLE
1011 This option supports all of the Octeon reference boards from Cavium
1012 Networks. It builds a kernel that dynamically determines the Octeon
1013 CPU type and supports all known board reference implementations.
1014 Some of the supported boards are:
1021 Say Y here for most Octeon reference boards.
1023 config NLM_XLR_BOARD
1024 bool "Netlogic XLR/XLS based systems"
1027 select SYS_HAS_CPU_XLR
1028 select SYS_SUPPORTS_SMP
1030 select SWAP_IO_SPACE
1031 select SYS_SUPPORTS_32BIT_KERNEL
1032 select SYS_SUPPORTS_64BIT_KERNEL
1033 select PHYS_ADDR_T_64BIT
1034 select SYS_SUPPORTS_BIG_ENDIAN
1035 select SYS_SUPPORTS_HIGHMEM
1036 select NR_CPUS_DEFAULT_32
1040 select ZONE_DMA32 if 64BIT
1042 select SYS_HAS_EARLY_PRINTK
1043 select SYS_SUPPORTS_ZBOOT
1044 select SYS_SUPPORTS_ZBOOT_UART16550
1046 Support for systems based on Netlogic XLR and XLS processors.
1047 Say Y here if you have a XLR or XLS based board.
1049 config NLM_XLP_BOARD
1050 bool "Netlogic XLP based systems"
1053 select SYS_HAS_CPU_XLP
1054 select SYS_SUPPORTS_SMP
1056 select SYS_SUPPORTS_32BIT_KERNEL
1057 select SYS_SUPPORTS_64BIT_KERNEL
1058 select PHYS_ADDR_T_64BIT
1060 select SYS_SUPPORTS_BIG_ENDIAN
1061 select SYS_SUPPORTS_LITTLE_ENDIAN
1062 select SYS_SUPPORTS_HIGHMEM
1063 select NR_CPUS_DEFAULT_32
1067 select ZONE_DMA32 if 64BIT
1069 select SYS_HAS_EARLY_PRINTK
1071 select SYS_SUPPORTS_ZBOOT
1072 select SYS_SUPPORTS_ZBOOT_UART16550
1074 This board is based on Netlogic XLP Processor.
1075 Say Y here if you have a XLP based board.
1079 source "arch/mips/alchemy/Kconfig"
1080 source "arch/mips/ath25/Kconfig"
1081 source "arch/mips/ath79/Kconfig"
1082 source "arch/mips/bcm47xx/Kconfig"
1083 source "arch/mips/bcm63xx/Kconfig"
1084 source "arch/mips/bmips/Kconfig"
1085 source "arch/mips/generic/Kconfig"
1086 source "arch/mips/ingenic/Kconfig"
1087 source "arch/mips/jazz/Kconfig"
1088 source "arch/mips/lantiq/Kconfig"
1089 source "arch/mips/pic32/Kconfig"
1090 source "arch/mips/pistachio/Kconfig"
1091 source "arch/mips/ralink/Kconfig"
1092 source "arch/mips/sgi-ip27/Kconfig"
1093 source "arch/mips/sibyte/Kconfig"
1094 source "arch/mips/txx9/Kconfig"
1095 source "arch/mips/vr41xx/Kconfig"
1096 source "arch/mips/cavium-octeon/Kconfig"
1097 source "arch/mips/loongson2ef/Kconfig"
1098 source "arch/mips/loongson32/Kconfig"
1099 source "arch/mips/loongson64/Kconfig"
1100 source "arch/mips/netlogic/Kconfig"
1104 config GENERIC_HWEIGHT
1108 config GENERIC_CALIBRATE_DELAY
1112 config SCHED_OMIT_FRAME_POINTER
1117 # Select some configuration options automatically based on user selections.
1122 config ARCH_MAY_HAVE_PC_FDC
1153 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1159 config MIPS_CLOCK_VSYSCALL
1160 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1169 config ARCH_SUPPORTS_UPROBES
1172 config DMA_PERDEV_COHERENT
1174 select ARCH_HAS_SETUP_DMA_OPS
1175 select DMA_NONCOHERENT
1177 config DMA_NONCOHERENT
1180 # MIPS allows mixing "slightly different" Cacheability and Coherency
1181 # Attribute bits. It is believed that the uncached access through
1182 # KSEG1 and the implementation specific "uncached accelerated" used
1183 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1184 # significant advantages.
1186 select ARCH_HAS_DMA_WRITE_COMBINE
1187 select ARCH_HAS_DMA_PREP_COHERENT
1188 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1189 select ARCH_HAS_DMA_SET_UNCACHED
1190 select DMA_NONCOHERENT_MMAP
1191 select NEED_DMA_MAP_STATE
1193 config SYS_HAS_EARLY_PRINTK
1196 config SYS_SUPPORTS_HOTPLUG_CPU
1199 config MIPS_BONITO64
1208 config NO_IOPORT_MAP
1212 def_bool CPU_NO_LOAD_STORE_LR
1214 config GENERIC_ISA_DMA
1216 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1219 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1221 select GENERIC_ISA_DMA
1223 config HAVE_PLAT_DELAY
1226 config HAVE_PLAT_FW_INIT_CMDLINE
1229 config HAVE_PLAT_MEMCPY
1235 config SYS_SUPPORTS_RELOCATABLE
1238 Selected if the platform supports relocating the kernel.
1239 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1240 to allow access to command line and entropy sources.
1242 config MIPS_CBPF_JIT
1244 depends on BPF_JIT && HAVE_CBPF_JIT
1246 config MIPS_EBPF_JIT
1248 depends on BPF_JIT && HAVE_EBPF_JIT
1252 # Endianness selection. Sufficiently obscure so many users don't know what to
1253 # answer,so we try hard to limit the available choices. Also the use of a
1254 # choice statement should be more obvious to the user.
1257 prompt "Endianness selection"
1259 Some MIPS machines can be configured for either little or big endian
1260 byte order. These modes require different kernels and a different
1261 Linux distribution. In general there is one preferred byteorder for a
1262 particular system but some systems are just as commonly used in the
1263 one or the other endianness.
1265 config CPU_BIG_ENDIAN
1267 depends on SYS_SUPPORTS_BIG_ENDIAN
1269 config CPU_LITTLE_ENDIAN
1270 bool "Little endian"
1271 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1278 config SYS_SUPPORTS_APM_EMULATION
1281 config SYS_SUPPORTS_BIG_ENDIAN
1284 config SYS_SUPPORTS_LITTLE_ENDIAN
1287 config MIPS_HUGE_TLB_SUPPORT
1288 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1302 config PCI_GT64XXX_PCI0
1305 config PCI_XTALK_BRIDGE
1308 config NO_EXCEPT_FILL
1314 config SWAP_IO_SPACE
1317 config SGI_HAS_INDYDOG
1329 config SGI_HAS_ZILOG
1332 config SGI_HAS_I8042
1335 config DEFAULT_SGI_PARTITION
1347 config MIPS_L1_CACHE_SHIFT_4
1350 config MIPS_L1_CACHE_SHIFT_5
1353 config MIPS_L1_CACHE_SHIFT_6
1356 config MIPS_L1_CACHE_SHIFT_7
1359 config MIPS_L1_CACHE_SHIFT
1361 default "7" if MIPS_L1_CACHE_SHIFT_7
1362 default "6" if MIPS_L1_CACHE_SHIFT_6
1363 default "5" if MIPS_L1_CACHE_SHIFT_5
1364 default "4" if MIPS_L1_CACHE_SHIFT_4
1367 config ARC_CMDLINE_ONLY
1371 bool "ARC console support"
1372 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1386 menu "CPU selection"
1392 config CPU_LOONGSON64
1393 bool "Loongson 64-bit CPU"
1394 depends on SYS_HAS_CPU_LOONGSON64
1395 select ARCH_HAS_PHYS_TO_DMA
1397 select CPU_HAS_PREFETCH
1398 select CPU_SUPPORTS_64BIT_KERNEL
1399 select CPU_SUPPORTS_HIGHMEM
1400 select CPU_SUPPORTS_HUGEPAGES
1401 select CPU_SUPPORTS_MSA
1402 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1403 select CPU_MIPSR2_IRQ_VI
1404 select WEAK_ORDERING
1405 select WEAK_REORDERING_BEYOND_LLSC
1406 select MIPS_ASID_BITS_VARIABLE
1407 select MIPS_PGD_C0_CONTEXT
1408 select MIPS_L1_CACHE_SHIFT_6
1413 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1414 cores implements the MIPS64R2 instruction set with many extensions,
1415 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1416 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1417 Loongson-2E/2F is not covered here and will be removed in future.
1419 config LOONGSON3_ENHANCEMENT
1420 bool "New Loongson-3 CPU Enhancements"
1422 depends on CPU_LOONGSON64
1424 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1425 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1426 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1427 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1428 Fast TLB refill support, etc.
1430 This option enable those enhancements which are not probed at run
1431 time. If you want a generic kernel to run on all Loongson 3 machines,
1432 please say 'N' here. If you want a high-performance kernel to run on
1433 new Loongson-3 machines only, please say 'Y' here.
1435 config CPU_LOONGSON3_WORKAROUNDS
1436 bool "Old Loongson-3 LLSC Workarounds"
1438 depends on CPU_LOONGSON64
1440 Loongson-3 processors have the llsc issues which require workarounds.
1441 Without workarounds the system may hang unexpectedly.
1443 Newer Loongson-3 will fix these issues and no workarounds are needed.
1444 The workarounds have no significant side effect on them but may
1445 decrease the performance of the system so this option should be
1446 disabled unless the kernel is intended to be run on old systems.
1448 If unsure, please say Y.
1450 config CPU_LOONGSON3_CPUCFG_EMULATION
1451 bool "Emulate the CPUCFG instruction on older Loongson cores"
1453 depends on CPU_LOONGSON64
1455 Loongson-3A R4 and newer have the CPUCFG instruction available for
1456 userland to query CPU capabilities, much like CPUID on x86. This
1457 option provides emulation of the instruction on older Loongson
1458 cores, back to Loongson-3A1000.
1460 If unsure, please say Y.
1462 config CPU_LOONGSON2E
1464 depends on SYS_HAS_CPU_LOONGSON2E
1465 select CPU_LOONGSON2EF
1467 The Loongson 2E processor implements the MIPS III instruction set
1468 with many extensions.
1470 It has an internal FPGA northbridge, which is compatible to
1473 config CPU_LOONGSON2F
1475 depends on SYS_HAS_CPU_LOONGSON2F
1476 select CPU_LOONGSON2EF
1479 The Loongson 2F processor implements the MIPS III instruction set
1480 with many extensions.
1482 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1483 have a similar programming interface with FPGA northbridge used in
1486 config CPU_LOONGSON1B
1488 depends on SYS_HAS_CPU_LOONGSON1B
1489 select CPU_LOONGSON32
1490 select LEDS_GPIO_REGISTER
1492 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1493 Release 1 instruction set and part of the MIPS32 Release 2
1496 config CPU_LOONGSON1C
1498 depends on SYS_HAS_CPU_LOONGSON1C
1499 select CPU_LOONGSON32
1500 select LEDS_GPIO_REGISTER
1502 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1503 Release 1 instruction set and part of the MIPS32 Release 2
1506 config CPU_MIPS32_R1
1507 bool "MIPS32 Release 1"
1508 depends on SYS_HAS_CPU_MIPS32_R1
1509 select CPU_HAS_PREFETCH
1510 select CPU_SUPPORTS_32BIT_KERNEL
1511 select CPU_SUPPORTS_HIGHMEM
1513 Choose this option to build a kernel for release 1 or later of the
1514 MIPS32 architecture. Most modern embedded systems with a 32-bit
1515 MIPS processor are based on a MIPS32 processor. If you know the
1516 specific type of processor in your system, choose those that one
1517 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1518 Release 2 of the MIPS32 architecture is available since several
1519 years so chances are you even have a MIPS32 Release 2 processor
1520 in which case you should choose CPU_MIPS32_R2 instead for better
1523 config CPU_MIPS32_R2
1524 bool "MIPS32 Release 2"
1525 depends on SYS_HAS_CPU_MIPS32_R2
1526 select CPU_HAS_PREFETCH
1527 select CPU_SUPPORTS_32BIT_KERNEL
1528 select CPU_SUPPORTS_HIGHMEM
1529 select CPU_SUPPORTS_MSA
1532 Choose this option to build a kernel for release 2 or later of the
1533 MIPS32 architecture. Most modern embedded systems with a 32-bit
1534 MIPS processor are based on a MIPS32 processor. If you know the
1535 specific type of processor in your system, choose those that one
1536 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1538 config CPU_MIPS32_R5
1539 bool "MIPS32 Release 5"
1540 depends on SYS_HAS_CPU_MIPS32_R5
1541 select CPU_HAS_PREFETCH
1542 select CPU_SUPPORTS_32BIT_KERNEL
1543 select CPU_SUPPORTS_HIGHMEM
1544 select CPU_SUPPORTS_MSA
1546 select MIPS_O32_FP64_SUPPORT
1548 Choose this option to build a kernel for release 5 or later of the
1549 MIPS32 architecture. New MIPS processors, starting with the Warrior
1550 family, are based on a MIPS32r5 processor. If you own an older
1551 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1553 config CPU_MIPS32_R6
1554 bool "MIPS32 Release 6"
1555 depends on SYS_HAS_CPU_MIPS32_R6
1556 select CPU_HAS_PREFETCH
1557 select CPU_NO_LOAD_STORE_LR
1558 select CPU_SUPPORTS_32BIT_KERNEL
1559 select CPU_SUPPORTS_HIGHMEM
1560 select CPU_SUPPORTS_MSA
1562 select MIPS_O32_FP64_SUPPORT
1564 Choose this option to build a kernel for release 6 or later of the
1565 MIPS32 architecture. New MIPS processors, starting with the Warrior
1566 family, are based on a MIPS32r6 processor. If you own an older
1567 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1569 config CPU_MIPS64_R1
1570 bool "MIPS64 Release 1"
1571 depends on SYS_HAS_CPU_MIPS64_R1
1572 select CPU_HAS_PREFETCH
1573 select CPU_SUPPORTS_32BIT_KERNEL
1574 select CPU_SUPPORTS_64BIT_KERNEL
1575 select CPU_SUPPORTS_HIGHMEM
1576 select CPU_SUPPORTS_HUGEPAGES
1578 Choose this option to build a kernel for release 1 or later of the
1579 MIPS64 architecture. Many modern embedded systems with a 64-bit
1580 MIPS processor are based on a MIPS64 processor. If you know the
1581 specific type of processor in your system, choose those that one
1582 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1583 Release 2 of the MIPS64 architecture is available since several
1584 years so chances are you even have a MIPS64 Release 2 processor
1585 in which case you should choose CPU_MIPS64_R2 instead for better
1588 config CPU_MIPS64_R2
1589 bool "MIPS64 Release 2"
1590 depends on SYS_HAS_CPU_MIPS64_R2
1591 select CPU_HAS_PREFETCH
1592 select CPU_SUPPORTS_32BIT_KERNEL
1593 select CPU_SUPPORTS_64BIT_KERNEL
1594 select CPU_SUPPORTS_HIGHMEM
1595 select CPU_SUPPORTS_HUGEPAGES
1596 select CPU_SUPPORTS_MSA
1599 Choose this option to build a kernel for release 2 or later of the
1600 MIPS64 architecture. Many modern embedded systems with a 64-bit
1601 MIPS processor are based on a MIPS64 processor. If you know the
1602 specific type of processor in your system, choose those that one
1603 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1605 config CPU_MIPS64_R5
1606 bool "MIPS64 Release 5"
1607 depends on SYS_HAS_CPU_MIPS64_R5
1608 select CPU_HAS_PREFETCH
1609 select CPU_SUPPORTS_32BIT_KERNEL
1610 select CPU_SUPPORTS_64BIT_KERNEL
1611 select CPU_SUPPORTS_HIGHMEM
1612 select CPU_SUPPORTS_HUGEPAGES
1613 select CPU_SUPPORTS_MSA
1614 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1617 Choose this option to build a kernel for release 5 or later of the
1618 MIPS64 architecture. This is a intermediate MIPS architecture
1619 release partly implementing release 6 features. Though there is no
1620 any hardware known to be based on this release.
1622 config CPU_MIPS64_R6
1623 bool "MIPS64 Release 6"
1624 depends on SYS_HAS_CPU_MIPS64_R6
1625 select CPU_HAS_PREFETCH
1626 select CPU_NO_LOAD_STORE_LR
1627 select CPU_SUPPORTS_32BIT_KERNEL
1628 select CPU_SUPPORTS_64BIT_KERNEL
1629 select CPU_SUPPORTS_HIGHMEM
1630 select CPU_SUPPORTS_HUGEPAGES
1631 select CPU_SUPPORTS_MSA
1632 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1635 Choose this option to build a kernel for release 6 or later of the
1636 MIPS64 architecture. New MIPS processors, starting with the Warrior
1637 family, are based on a MIPS64r6 processor. If you own an older
1638 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1641 bool "MIPS Warrior P5600"
1642 depends on SYS_HAS_CPU_P5600
1643 select CPU_HAS_PREFETCH
1644 select CPU_SUPPORTS_32BIT_KERNEL
1645 select CPU_SUPPORTS_HIGHMEM
1646 select CPU_SUPPORTS_MSA
1647 select CPU_SUPPORTS_CPUFREQ
1648 select CPU_MIPSR2_IRQ_VI
1649 select CPU_MIPSR2_IRQ_EI
1651 select MIPS_O32_FP64_SUPPORT
1653 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1654 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1655 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1656 level features like up to six P5600 calculation cores, CM2 with L2
1657 cache, IOCU/IOMMU (though might be unused depending on the system-
1658 specific IP core configuration), GIC, CPC, virtualisation module,
1663 depends on SYS_HAS_CPU_R3000
1666 select CPU_SUPPORTS_32BIT_KERNEL
1667 select CPU_SUPPORTS_HIGHMEM
1669 Please make sure to pick the right CPU type. Linux/MIPS is not
1670 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1671 *not* work on R4000 machines and vice versa. However, since most
1672 of the supported machines have an R4000 (or similar) CPU, R4x00
1673 might be a safe bet. If the resulting kernel does not work,
1674 try to recompile with R3000.
1678 depends on SYS_HAS_CPU_TX39XX
1679 select CPU_SUPPORTS_32BIT_KERNEL
1684 depends on SYS_HAS_CPU_VR41XX
1685 select CPU_SUPPORTS_32BIT_KERNEL
1686 select CPU_SUPPORTS_64BIT_KERNEL
1688 The options selects support for the NEC VR4100 series of processors.
1689 Only choose this option if you have one of these processors as a
1690 kernel built with this option will not run on any other type of
1691 processor or vice versa.
1695 depends on SYS_HAS_CPU_R4300
1696 select CPU_SUPPORTS_32BIT_KERNEL
1697 select CPU_SUPPORTS_64BIT_KERNEL
1698 select CPU_HAS_LOAD_STORE_LR
1700 MIPS Technologies R4300-series processors.
1704 depends on SYS_HAS_CPU_R4X00
1705 select CPU_SUPPORTS_32BIT_KERNEL
1706 select CPU_SUPPORTS_64BIT_KERNEL
1707 select CPU_SUPPORTS_HUGEPAGES
1709 MIPS Technologies R4000-series processors other than 4300, including
1710 the R4000, R4400, R4600, and 4700.
1714 depends on SYS_HAS_CPU_TX49XX
1715 select CPU_HAS_PREFETCH
1716 select CPU_SUPPORTS_32BIT_KERNEL
1717 select CPU_SUPPORTS_64BIT_KERNEL
1718 select CPU_SUPPORTS_HUGEPAGES
1722 depends on SYS_HAS_CPU_R5000
1723 select CPU_SUPPORTS_32BIT_KERNEL
1724 select CPU_SUPPORTS_64BIT_KERNEL
1725 select CPU_SUPPORTS_HUGEPAGES
1727 MIPS Technologies R5000-series processors other than the Nevada.
1731 depends on SYS_HAS_CPU_R5500
1732 select CPU_SUPPORTS_32BIT_KERNEL
1733 select CPU_SUPPORTS_64BIT_KERNEL
1734 select CPU_SUPPORTS_HUGEPAGES
1736 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1741 depends on SYS_HAS_CPU_NEVADA
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HUGEPAGES
1746 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1750 depends on SYS_HAS_CPU_R10000
1751 select CPU_HAS_PREFETCH
1752 select CPU_SUPPORTS_32BIT_KERNEL
1753 select CPU_SUPPORTS_64BIT_KERNEL
1754 select CPU_SUPPORTS_HIGHMEM
1755 select CPU_SUPPORTS_HUGEPAGES
1757 MIPS Technologies R10000-series processors.
1761 depends on SYS_HAS_CPU_RM7000
1762 select CPU_HAS_PREFETCH
1763 select CPU_SUPPORTS_32BIT_KERNEL
1764 select CPU_SUPPORTS_64BIT_KERNEL
1765 select CPU_SUPPORTS_HIGHMEM
1766 select CPU_SUPPORTS_HUGEPAGES
1770 depends on SYS_HAS_CPU_SB1
1771 select CPU_SUPPORTS_32BIT_KERNEL
1772 select CPU_SUPPORTS_64BIT_KERNEL
1773 select CPU_SUPPORTS_HIGHMEM
1774 select CPU_SUPPORTS_HUGEPAGES
1775 select WEAK_ORDERING
1777 config CPU_CAVIUM_OCTEON
1778 bool "Cavium Octeon processor"
1779 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1780 select CPU_HAS_PREFETCH
1781 select CPU_SUPPORTS_64BIT_KERNEL
1782 select WEAK_ORDERING
1783 select CPU_SUPPORTS_HIGHMEM
1784 select CPU_SUPPORTS_HUGEPAGES
1785 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1786 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1787 select MIPS_L1_CACHE_SHIFT_7
1790 The Cavium Octeon processor is a highly integrated chip containing
1791 many ethernet hardware widgets for networking tasks. The processor
1792 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1793 Full details can be found at http://www.caviumnetworks.com.
1796 bool "Broadcom BMIPS"
1797 depends on SYS_HAS_CPU_BMIPS
1799 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1800 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1801 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1802 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1803 select CPU_SUPPORTS_32BIT_KERNEL
1804 select DMA_NONCOHERENT
1806 select SWAP_IO_SPACE
1807 select WEAK_ORDERING
1808 select CPU_SUPPORTS_HIGHMEM
1809 select CPU_HAS_PREFETCH
1810 select CPU_SUPPORTS_CPUFREQ
1811 select MIPS_EXTERNAL_TIMER
1813 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1816 bool "Netlogic XLR SoC"
1817 depends on SYS_HAS_CPU_XLR
1818 select CPU_SUPPORTS_32BIT_KERNEL
1819 select CPU_SUPPORTS_64BIT_KERNEL
1820 select CPU_SUPPORTS_HIGHMEM
1821 select CPU_SUPPORTS_HUGEPAGES
1822 select WEAK_ORDERING
1823 select WEAK_REORDERING_BEYOND_LLSC
1825 Netlogic Microsystems XLR/XLS processors.
1828 bool "Netlogic XLP SoC"
1829 depends on SYS_HAS_CPU_XLP
1830 select CPU_SUPPORTS_32BIT_KERNEL
1831 select CPU_SUPPORTS_64BIT_KERNEL
1832 select CPU_SUPPORTS_HIGHMEM
1833 select WEAK_ORDERING
1834 select WEAK_REORDERING_BEYOND_LLSC
1835 select CPU_HAS_PREFETCH
1837 select CPU_SUPPORTS_HUGEPAGES
1838 select MIPS_ASID_BITS_VARIABLE
1840 Netlogic Microsystems XLP processors.
1843 config CPU_MIPS32_3_5_FEATURES
1844 bool "MIPS32 Release 3.5 Features"
1845 depends on SYS_HAS_CPU_MIPS32_R3_5
1846 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1849 Choose this option to build a kernel for release 2 or later of the
1850 MIPS32 architecture including features from the 3.5 release such as
1851 support for Enhanced Virtual Addressing (EVA).
1853 config CPU_MIPS32_3_5_EVA
1854 bool "Enhanced Virtual Addressing (EVA)"
1855 depends on CPU_MIPS32_3_5_FEATURES
1859 Choose this option if you want to enable the Enhanced Virtual
1860 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1861 One of its primary benefits is an increase in the maximum size
1862 of lowmem (up to 3GB). If unsure, say 'N' here.
1864 config CPU_MIPS32_R5_FEATURES
1865 bool "MIPS32 Release 5 Features"
1866 depends on SYS_HAS_CPU_MIPS32_R5
1867 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1869 Choose this option to build a kernel for release 2 or later of the
1870 MIPS32 architecture including features from release 5 such as
1871 support for Extended Physical Addressing (XPA).
1873 config CPU_MIPS32_R5_XPA
1874 bool "Extended Physical Addressing (XPA)"
1875 depends on CPU_MIPS32_R5_FEATURES
1877 depends on !PAGE_SIZE_4KB
1878 depends on SYS_SUPPORTS_HIGHMEM
1881 select PHYS_ADDR_T_64BIT
1884 Choose this option if you want to enable the Extended Physical
1885 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1886 benefit is to increase physical addressing equal to or greater
1887 than 40 bits. Note that this has the side effect of turning on
1888 64-bit addressing which in turn makes the PTEs 64-bit in size.
1889 If unsure, say 'N' here.
1892 config CPU_NOP_WORKAROUNDS
1895 config CPU_JUMP_WORKAROUNDS
1898 config CPU_LOONGSON2F_WORKAROUNDS
1899 bool "Loongson 2F Workarounds"
1901 select CPU_NOP_WORKAROUNDS
1902 select CPU_JUMP_WORKAROUNDS
1904 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1905 require workarounds. Without workarounds the system may hang
1906 unexpectedly. For more information please refer to the gas
1907 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1909 Loongson 2F03 and later have fixed these issues and no workarounds
1910 are needed. The workarounds have no significant side effect on them
1911 but may decrease the performance of the system so this option should
1912 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1915 If unsure, please say Y.
1916 endif # CPU_LOONGSON2F
1918 config SYS_SUPPORTS_ZBOOT
1920 select HAVE_KERNEL_GZIP
1921 select HAVE_KERNEL_BZIP2
1922 select HAVE_KERNEL_LZ4
1923 select HAVE_KERNEL_LZMA
1924 select HAVE_KERNEL_LZO
1925 select HAVE_KERNEL_XZ
1926 select HAVE_KERNEL_ZSTD
1928 config SYS_SUPPORTS_ZBOOT_UART16550
1930 select SYS_SUPPORTS_ZBOOT
1932 config SYS_SUPPORTS_ZBOOT_UART_PROM
1934 select SYS_SUPPORTS_ZBOOT
1936 config CPU_LOONGSON2EF
1938 select CPU_SUPPORTS_32BIT_KERNEL
1939 select CPU_SUPPORTS_64BIT_KERNEL
1940 select CPU_SUPPORTS_HIGHMEM
1941 select CPU_SUPPORTS_HUGEPAGES
1942 select ARCH_HAS_PHYS_TO_DMA
1944 config CPU_LOONGSON32
1948 select CPU_HAS_PREFETCH
1949 select CPU_SUPPORTS_32BIT_KERNEL
1950 select CPU_SUPPORTS_HIGHMEM
1951 select CPU_SUPPORTS_CPUFREQ
1953 config CPU_BMIPS32_3300
1954 select SMP_UP if SMP
1957 config CPU_BMIPS4350
1959 select SYS_SUPPORTS_SMP
1960 select SYS_SUPPORTS_HOTPLUG_CPU
1962 config CPU_BMIPS4380
1964 select MIPS_L1_CACHE_SHIFT_6
1965 select SYS_SUPPORTS_SMP
1966 select SYS_SUPPORTS_HOTPLUG_CPU
1969 config CPU_BMIPS5000
1971 select MIPS_CPU_SCACHE
1972 select MIPS_L1_CACHE_SHIFT_7
1973 select SYS_SUPPORTS_SMP
1974 select SYS_SUPPORTS_HOTPLUG_CPU
1977 config SYS_HAS_CPU_LOONGSON64
1979 select CPU_SUPPORTS_CPUFREQ
1982 config SYS_HAS_CPU_LOONGSON2E
1985 config SYS_HAS_CPU_LOONGSON2F
1987 select CPU_SUPPORTS_CPUFREQ
1988 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1990 config SYS_HAS_CPU_LOONGSON1B
1993 config SYS_HAS_CPU_LOONGSON1C
1996 config SYS_HAS_CPU_MIPS32_R1
1999 config SYS_HAS_CPU_MIPS32_R2
2002 config SYS_HAS_CPU_MIPS32_R3_5
2005 config SYS_HAS_CPU_MIPS32_R5
2007 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2009 config SYS_HAS_CPU_MIPS32_R6
2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2013 config SYS_HAS_CPU_MIPS64_R1
2016 config SYS_HAS_CPU_MIPS64_R2
2019 config SYS_HAS_CPU_MIPS64_R6
2021 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2023 config SYS_HAS_CPU_P5600
2025 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2027 config SYS_HAS_CPU_R3000
2030 config SYS_HAS_CPU_TX39XX
2033 config SYS_HAS_CPU_VR41XX
2036 config SYS_HAS_CPU_R4300
2039 config SYS_HAS_CPU_R4X00
2042 config SYS_HAS_CPU_TX49XX
2045 config SYS_HAS_CPU_R5000
2048 config SYS_HAS_CPU_R5500
2051 config SYS_HAS_CPU_NEVADA
2054 config SYS_HAS_CPU_R10000
2056 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2058 config SYS_HAS_CPU_RM7000
2061 config SYS_HAS_CPU_SB1
2064 config SYS_HAS_CPU_CAVIUM_OCTEON
2067 config SYS_HAS_CPU_BMIPS
2070 config SYS_HAS_CPU_BMIPS32_3300
2072 select SYS_HAS_CPU_BMIPS
2074 config SYS_HAS_CPU_BMIPS4350
2076 select SYS_HAS_CPU_BMIPS
2078 config SYS_HAS_CPU_BMIPS4380
2080 select SYS_HAS_CPU_BMIPS
2082 config SYS_HAS_CPU_BMIPS5000
2084 select SYS_HAS_CPU_BMIPS
2085 select ARCH_HAS_SYNC_DMA_FOR_CPU
2087 config SYS_HAS_CPU_XLR
2090 config SYS_HAS_CPU_XLP
2094 # CPU may reorder R->R, R->W, W->R, W->W
2095 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2097 config WEAK_ORDERING
2101 # CPU may reorder reads and writes beyond LL/SC
2102 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2104 config WEAK_REORDERING_BEYOND_LLSC
2109 # These two indicate any level of the MIPS32 and MIPS64 architecture
2113 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2114 CPU_MIPS32_R6 || CPU_P5600
2118 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2119 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2122 # These indicate the revision of the architecture
2126 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2130 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2132 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2137 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2139 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2144 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2146 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2147 select HAVE_ARCH_BITREVERSE
2148 select MIPS_ASID_BITS_VARIABLE
2149 select MIPS_CRC_SUPPORT
2152 config TARGET_ISA_REV
2154 default 1 if CPU_MIPSR1
2155 default 2 if CPU_MIPSR2
2156 default 5 if CPU_MIPSR5
2157 default 6 if CPU_MIPSR6
2160 Reflects the ISA revision being targeted by the kernel build. This
2161 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2169 config SYS_SUPPORTS_32BIT_KERNEL
2171 config SYS_SUPPORTS_64BIT_KERNEL
2173 config CPU_SUPPORTS_32BIT_KERNEL
2175 config CPU_SUPPORTS_64BIT_KERNEL
2177 config CPU_SUPPORTS_CPUFREQ
2179 config CPU_SUPPORTS_ADDRWINCFG
2181 config CPU_SUPPORTS_HUGEPAGES
2183 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2184 config MIPS_PGD_C0_CONTEXT
2187 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2190 # Set to y for ptrace access to watch registers.
2192 config HARDWARE_WATCHPOINTS
2194 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2199 prompt "Kernel code model"
2201 You should only select this option if you have a workload that
2202 actually benefits from 64-bit processing or if your machine has
2203 large memory. You will only be presented a single option in this
2204 menu if your system does not support both 32-bit and 64-bit kernels.
2207 bool "32-bit kernel"
2208 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2211 Select this option if you want to build a 32-bit kernel.
2214 bool "64-bit kernel"
2215 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2217 Select this option if you want to build a 64-bit kernel.
2221 config MIPS_VA_BITS_48
2222 bool "48 bits virtual memory"
2225 Support a maximum at least 48 bits of application virtual
2226 memory. Default is 40 bits or less, depending on the CPU.
2227 For page sizes 16k and above, this option results in a small
2228 memory overhead for page tables. For 4k page size, a fourth
2229 level of page tables is added which imposes both a memory
2230 overhead as well as slower TLB fault handling.
2235 prompt "Kernel page size"
2236 default PAGE_SIZE_4KB
2238 config PAGE_SIZE_4KB
2240 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2242 This option select the standard 4kB Linux page size. On some
2243 R3000-family processors this is the only available page size. Using
2244 4kB page size will minimize memory consumption and is therefore
2245 recommended for low memory systems.
2247 config PAGE_SIZE_8KB
2249 depends on CPU_CAVIUM_OCTEON
2250 depends on !MIPS_VA_BITS_48
2252 Using 8kB page size will result in higher performance kernel at
2253 the price of higher memory consumption. This option is available
2254 only on cnMIPS processors. Note that you will need a suitable Linux
2255 distribution to support this.
2257 config PAGE_SIZE_16KB
2259 depends on !CPU_R3000 && !CPU_TX39XX
2261 Using 16kB page size will result in higher performance kernel at
2262 the price of higher memory consumption. This option is available on
2263 all non-R3000 family processors. Note that you will need a suitable
2264 Linux distribution to support this.
2266 config PAGE_SIZE_32KB
2268 depends on CPU_CAVIUM_OCTEON
2269 depends on !MIPS_VA_BITS_48
2271 Using 32kB page size will result in higher performance kernel at
2272 the price of higher memory consumption. This option is available
2273 only on cnMIPS cores. Note that you will need a suitable Linux
2274 distribution to support this.
2276 config PAGE_SIZE_64KB
2278 depends on !CPU_R3000 && !CPU_TX39XX
2280 Using 64kB page size will result in higher performance kernel at
2281 the price of higher memory consumption. This option is available on
2282 all non-R3000 family processor. Not that at the time of this
2283 writing this option is still high experimental.
2287 config FORCE_MAX_ZONEORDER
2288 int "Maximum zone order"
2289 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2290 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2291 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2292 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2293 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2294 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2298 The kernel memory allocator divides physically contiguous memory
2299 blocks into "zones", where each zone is a power of two number of
2300 pages. This option selects the largest power of two that the kernel
2301 keeps in the memory allocator. If you need to allocate very large
2302 blocks of physically contiguous memory, then you may need to
2303 increase this value.
2305 This config option is actually maximum order plus one. For example,
2306 a value of 11 means that the largest free memory block is 2^10 pages.
2308 The page size is not necessarily 4KB. Keep this in mind
2309 when choosing a value for this option.
2314 config IP22_CPU_SCACHE
2319 # Support for a MIPS32 / MIPS64 style S-caches
2321 config MIPS_CPU_SCACHE
2325 config R5000_CPU_SCACHE
2329 config RM7000_CPU_SCACHE
2333 config SIBYTE_DMA_PAGEOPS
2334 bool "Use DMA to clear/copy pages"
2337 Instead of using the CPU to zero and copy pages, use a Data Mover
2338 channel. These DMA channels are otherwise unused by the standard
2339 SiByte Linux port. Seems to give a small performance benefit.
2341 config CPU_HAS_PREFETCH
2344 config CPU_GENERIC_DUMP_TLB
2346 default y if !(CPU_R3000 || CPU_TX39XX)
2348 config MIPS_FP_SUPPORT
2349 bool "Floating Point support" if EXPERT
2352 Select y to include support for floating point in the kernel
2353 including initialization of FPU hardware, FP context save & restore
2354 and emulation of an FPU where necessary. Without this support any
2355 userland program attempting to use floating point instructions will
2358 If you know that your userland will not attempt to use floating point
2359 instructions then you can say n here to shrink the kernel a little.
2363 config CPU_R2300_FPU
2365 depends on MIPS_FP_SUPPORT
2366 default y if CPU_R3000 || CPU_TX39XX
2373 depends on MIPS_FP_SUPPORT
2374 default y if !CPU_R2300_FPU
2376 config CPU_R4K_CACHE_TLB
2378 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2381 bool "MIPS MT SMP support (1 TC on each available VPE)"
2383 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2384 select CPU_MIPSR2_IRQ_VI
2385 select CPU_MIPSR2_IRQ_EI
2390 select SYS_SUPPORTS_SMP
2391 select SYS_SUPPORTS_SCHED_SMT
2392 select MIPS_PERF_SHARED_TC_COUNTERS
2394 This is a kernel model which is known as SMVP. This is supported
2395 on cores with the MT ASE and uses the available VPEs to implement
2396 virtual processors which supports SMP. This is equivalent to the
2397 Intel Hyperthreading feature. For further information go to
2398 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2404 bool "SMT (multithreading) scheduler support"
2405 depends on SYS_SUPPORTS_SCHED_SMT
2408 SMT scheduler support improves the CPU scheduler's decision making
2409 when dealing with MIPS MT enabled cores at a cost of slightly
2410 increased overhead in some places. If unsure say N here.
2412 config SYS_SUPPORTS_SCHED_SMT
2415 config SYS_SUPPORTS_MULTITHREADING
2418 config MIPS_MT_FPAFF
2419 bool "Dynamic FPU affinity for FP-intensive threads"
2421 depends on MIPS_MT_SMP
2423 config MIPSR2_TO_R6_EMULATOR
2424 bool "MIPS R2-to-R6 emulator"
2425 depends on CPU_MIPSR6
2426 depends on MIPS_FP_SUPPORT
2429 Choose this option if you want to run non-R6 MIPS userland code.
2430 Even if you say 'Y' here, the emulator will still be disabled by
2431 default. You can enable it using the 'mipsr2emu' kernel option.
2432 The only reason this is a build-time option is to save ~14K from the
2435 config SYS_SUPPORTS_VPE_LOADER
2437 depends on SYS_SUPPORTS_MULTITHREADING
2439 Indicates that the platform supports the VPE loader, and provides
2442 config MIPS_VPE_LOADER
2443 bool "VPE loader support."
2444 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2445 select CPU_MIPSR2_IRQ_VI
2446 select CPU_MIPSR2_IRQ_EI
2449 Includes a loader for loading an elf relocatable object
2450 onto another VPE and running it.
2452 config MIPS_VPE_LOADER_CMP
2455 depends on MIPS_VPE_LOADER && MIPS_CMP
2457 config MIPS_VPE_LOADER_MT
2460 depends on MIPS_VPE_LOADER && !MIPS_CMP
2462 config MIPS_VPE_LOADER_TOM
2463 bool "Load VPE program into memory hidden from linux"
2464 depends on MIPS_VPE_LOADER
2467 The loader can use memory that is present but has been hidden from
2468 Linux using the kernel command line option "mem=xxMB". It's up to
2469 you to ensure the amount you put in the option and the space your
2470 program requires is less or equal to the amount physically present.
2472 config MIPS_VPE_APSP_API
2473 bool "Enable support for AP/SP API (RTLX)"
2474 depends on MIPS_VPE_LOADER
2476 config MIPS_VPE_APSP_API_CMP
2479 depends on MIPS_VPE_APSP_API && MIPS_CMP
2481 config MIPS_VPE_APSP_API_MT
2484 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2487 bool "MIPS CMP framework support (DEPRECATED)"
2488 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2491 select SYS_SUPPORTS_SMP
2492 select WEAK_ORDERING
2495 Select this if you are using a bootloader which implements the "CMP
2496 framework" protocol (ie. YAMON) and want your kernel to make use of
2497 its ability to start secondary CPUs.
2499 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2503 bool "MIPS Coherent Processing System support"
2504 depends on SYS_SUPPORTS_MIPS_CPS
2506 select MIPS_CPS_PM if HOTPLUG_CPU
2508 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2509 select SYS_SUPPORTS_HOTPLUG_CPU
2510 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2511 select SYS_SUPPORTS_SMP
2512 select WEAK_ORDERING
2513 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2515 Select this if you wish to run an SMP kernel across multiple cores
2516 within a MIPS Coherent Processing System. When this option is
2517 enabled the kernel will probe for other cores and boot them with
2518 no external assistance. It is safe to enable this when hardware
2519 support is unavailable.
2532 config SB1_PASS_2_WORKAROUNDS
2534 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2537 config SB1_PASS_2_1_WORKAROUNDS
2539 depends on CPU_SB1 && CPU_SB1_PASS_2
2543 prompt "SmartMIPS or microMIPS ASE support"
2545 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2548 Select this if you want neither microMIPS nor SmartMIPS support
2550 config CPU_HAS_SMARTMIPS
2551 depends on SYS_SUPPORTS_SMARTMIPS
2554 SmartMIPS is a extension of the MIPS32 architecture aimed at
2555 increased security at both hardware and software level for
2556 smartcards. Enabling this option will allow proper use of the
2557 SmartMIPS instructions by Linux applications. However a kernel with
2558 this option will not work on a MIPS core without SmartMIPS core. If
2559 you don't know you probably don't have SmartMIPS and should say N
2562 config CPU_MICROMIPS
2563 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2566 When this option is enabled the kernel will be built using the
2572 bool "Support for the MIPS SIMD Architecture"
2573 depends on CPU_SUPPORTS_MSA
2574 depends on MIPS_FP_SUPPORT
2575 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2577 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2578 and a set of SIMD instructions to operate on them. When this option
2579 is enabled the kernel will support allocating & switching MSA
2580 vector register contexts. If you know that your kernel will only be
2581 running on CPUs which do not support MSA or that your userland will
2582 not be making use of it then you may wish to say N here to reduce
2583 the size & complexity of your kernel.
2594 depends on !CPU_DIEI_BROKEN
2597 config CPU_DIEI_BROKEN
2603 config CPU_NO_LOAD_STORE_LR
2606 CPU lacks support for unaligned load and store instructions:
2607 LWL, LWR, SWL, SWR (Load/store word left/right).
2608 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2612 # Vectored interrupt mode is an R2 feature
2614 config CPU_MIPSR2_IRQ_VI
2618 # Extended interrupt mode is an R2 feature
2620 config CPU_MIPSR2_IRQ_EI
2625 depends on !CPU_R3000
2631 config CPU_DADDI_WORKAROUNDS
2634 config CPU_R4000_WORKAROUNDS
2636 select CPU_R4400_WORKAROUNDS
2638 config CPU_R4400_WORKAROUNDS
2641 config CPU_R4X00_BUGS64
2643 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2645 config MIPS_ASID_SHIFT
2647 default 6 if CPU_R3000 || CPU_TX39XX
2650 config MIPS_ASID_BITS
2652 default 0 if MIPS_ASID_BITS_VARIABLE
2653 default 6 if CPU_R3000 || CPU_TX39XX
2656 config MIPS_ASID_BITS_VARIABLE
2659 config MIPS_CRC_SUPPORT
2662 # R4600 erratum. Due to the lack of errata information the exact
2663 # technical details aren't known. I've experimentally found that disabling
2664 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2666 config WAR_R4600_V1_INDEX_ICACHEOP
2669 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2671 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2672 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2673 # executed if there is no other dcache activity. If the dcache is
2674 # accessed for another instruction immediately preceding when these
2675 # cache instructions are executing, it is possible that the dcache
2676 # tag match outputs used by these cache instructions will be
2677 # incorrect. These cache instructions should be preceded by at least
2678 # four instructions that are not any kind of load or store
2681 # This is not allowed: lw
2685 # cache Hit_Writeback_Invalidate_D
2687 # This is allowed: lw
2692 # cache Hit_Writeback_Invalidate_D
2693 config WAR_R4600_V1_HIT_CACHEOP
2696 # Writeback and invalidate the primary cache dcache before DMA.
2698 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2699 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2700 # operate correctly if the internal data cache refill buffer is empty. These
2701 # CACHE instructions should be separated from any potential data cache miss
2702 # by a load instruction to an uncached address to empty the response buffer."
2703 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2705 config WAR_R4600_V2_HIT_CACHEOP
2708 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2709 # the line which this instruction itself exists, the following
2710 # operation is not guaranteed."
2712 # Workaround: do two phase flushing for Index_Invalidate_I
2713 config WAR_TX49XX_ICACHE_INDEX_INV
2716 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2717 # opposes it being called that) where invalid instructions in the same
2718 # I-cache line worth of instructions being fetched may case spurious
2720 config WAR_ICACHE_REFILLS
2723 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2724 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2725 config WAR_R10000_LLSC
2728 # 34K core erratum: "Problems Executing the TLBR Instruction"
2729 config WAR_MIPS34K_MISSED_ITLB
2733 # - Highmem only makes sense for the 32-bit kernel.
2734 # - The current highmem code will only work properly on physically indexed
2735 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2736 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2737 # moment we protect the user and offer the highmem option only on machines
2738 # where it's known to be safe. This will not offer highmem on a few systems
2739 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2740 # indexed CPUs but we're playing safe.
2741 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2742 # know they might have memory configurations that could make use of highmem
2746 bool "High Memory Support"
2747 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2750 config CPU_SUPPORTS_HIGHMEM
2753 config SYS_SUPPORTS_HIGHMEM
2756 config SYS_SUPPORTS_SMARTMIPS
2759 config SYS_SUPPORTS_MICROMIPS
2762 config SYS_SUPPORTS_MIPS16
2765 This option must be set if a kernel might be executed on a MIPS16-
2766 enabled CPU even if MIPS16 is not actually being used. In other
2767 words, it makes the kernel MIPS16-tolerant.
2769 config CPU_SUPPORTS_MSA
2772 config ARCH_FLATMEM_ENABLE
2774 depends on !NUMA && !CPU_LOONGSON2EF
2776 config ARCH_SPARSEMEM_ENABLE
2778 select SPARSEMEM_STATIC if !SGI_IP27
2782 depends on SYS_SUPPORTS_NUMA
2785 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2786 Access). This option improves performance on systems with more
2787 than two nodes; on two node systems it is generally better to
2788 leave it disabled; on single node systems leave this option
2791 config SYS_SUPPORTS_NUMA
2794 config HAVE_SETUP_PER_CPU_AREA
2798 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2803 bool "Relocatable kernel"
2804 depends on SYS_SUPPORTS_RELOCATABLE
2805 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2806 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2807 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2808 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2811 This builds a kernel image that retains relocation information
2812 so it can be loaded someplace besides the default 1MB.
2813 The relocations make the kernel binary about 15% larger,
2814 but are discarded at runtime
2816 config RELOCATION_TABLE_SIZE
2817 hex "Relocation table size"
2818 depends on RELOCATABLE
2819 range 0x0 0x01000000
2820 default "0x00200000" if CPU_LOONGSON64
2821 default "0x00100000"
2823 A table of relocation data will be appended to the kernel binary
2824 and parsed at boot to fix up the relocated kernel.
2826 This option allows the amount of space reserved for the table to be
2827 adjusted, although the default of 1Mb should be ok in most cases.
2829 The build will fail and a valid size suggested if this is too small.
2831 If unsure, leave at the default value.
2833 config RANDOMIZE_BASE
2834 bool "Randomize the address of the kernel image"
2835 depends on RELOCATABLE
2837 Randomizes the physical and virtual address at which the
2838 kernel image is loaded, as a security feature that
2839 deters exploit attempts relying on knowledge of the location
2840 of kernel internals.
2842 Entropy is generated using any coprocessor 0 registers available.
2844 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2848 config RANDOMIZE_BASE_MAX_OFFSET
2849 hex "Maximum kASLR offset" if EXPERT
2850 depends on RANDOMIZE_BASE
2851 range 0x0 0x40000000 if EVA || 64BIT
2852 range 0x0 0x08000000
2853 default "0x01000000"
2855 When kASLR is active, this provides the maximum offset that will
2856 be applied to the kernel image. It should be set according to the
2857 amount of physical RAM available in the target system minus
2858 PHYSICAL_START and must be a power of 2.
2860 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2861 EVA or 64-bit. The default is 16Mb.
2868 config HW_PERF_EVENTS
2869 bool "Enable hardware performance counter support for perf events"
2870 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2873 Enable hardware performance counter support for perf events. If
2874 disabled, perf events will use software events only.
2877 bool "Enable DMI scanning"
2878 depends on MACH_LOONGSON64
2879 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2882 Enabled scanning of DMI to identify machine quirks. Say Y
2883 here unless you have verified that your setup is not
2884 affected by entries in the DMI blacklist. Required by PNP
2888 bool "Multi-Processing support"
2889 depends on SYS_SUPPORTS_SMP
2891 This enables support for systems with more than one CPU. If you have
2892 a system with only one CPU, say N. If you have a system with more
2893 than one CPU, say Y.
2895 If you say N here, the kernel will run on uni- and multiprocessor
2896 machines, but will use only one CPU of a multiprocessor machine. If
2897 you say Y here, the kernel will run on many, but not all,
2898 uniprocessor machines. On a uniprocessor machine, the kernel
2899 will run faster if you say N here.
2901 People using multiprocessor machines who say Y here should also say
2902 Y to "Enhanced Real Time Clock Support", below.
2904 See also the SMP-HOWTO available at
2905 <https://www.tldp.org/docs.html#howto>.
2907 If you don't know what to do here, say N.
2910 bool "Support for hot-pluggable CPUs"
2911 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2913 Say Y here to allow turning CPUs off and on. CPUs can be
2914 controlled through /sys/devices/system/cpu.
2915 (Note: power management support will enable this option
2916 automatically on SMP systems. )
2917 Say N if you want to disable CPU hotplug.
2922 config SYS_SUPPORTS_MIPS_CMP
2925 config SYS_SUPPORTS_MIPS_CPS
2928 config SYS_SUPPORTS_SMP
2931 config NR_CPUS_DEFAULT_4
2934 config NR_CPUS_DEFAULT_8
2937 config NR_CPUS_DEFAULT_16
2940 config NR_CPUS_DEFAULT_32
2943 config NR_CPUS_DEFAULT_64
2947 int "Maximum number of CPUs (2-256)"
2950 default "4" if NR_CPUS_DEFAULT_4
2951 default "8" if NR_CPUS_DEFAULT_8
2952 default "16" if NR_CPUS_DEFAULT_16
2953 default "32" if NR_CPUS_DEFAULT_32
2954 default "64" if NR_CPUS_DEFAULT_64
2956 This allows you to specify the maximum number of CPUs which this
2957 kernel will support. The maximum supported value is 32 for 32-bit
2958 kernel and 64 for 64-bit kernels; the minimum value which makes
2959 sense is 1 for Qemu (useful only for kernel debugging purposes)
2960 and 2 for all others.
2962 This is purely to save memory - each supported CPU adds
2963 approximately eight kilobytes to the kernel image. For best
2964 performance should round up your number of processors to the next
2967 config MIPS_PERF_SHARED_TC_COUNTERS
2970 config MIPS_NR_CPU_NR_MAP_1024
2973 config MIPS_NR_CPU_NR_MAP
2976 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2977 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2980 # Timer Interrupt Frequency Configuration
2984 prompt "Timer frequency"
2987 Allows the configuration of the timer frequency.
2990 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2993 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2996 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2999 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3002 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3005 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3008 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3011 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3015 config SYS_SUPPORTS_24HZ
3018 config SYS_SUPPORTS_48HZ
3021 config SYS_SUPPORTS_100HZ
3024 config SYS_SUPPORTS_128HZ
3027 config SYS_SUPPORTS_250HZ
3030 config SYS_SUPPORTS_256HZ
3033 config SYS_SUPPORTS_1000HZ
3036 config SYS_SUPPORTS_1024HZ
3039 config SYS_SUPPORTS_ARBIT_HZ
3041 default y if !SYS_SUPPORTS_24HZ && \
3042 !SYS_SUPPORTS_48HZ && \
3043 !SYS_SUPPORTS_100HZ && \
3044 !SYS_SUPPORTS_128HZ && \
3045 !SYS_SUPPORTS_250HZ && \
3046 !SYS_SUPPORTS_256HZ && \
3047 !SYS_SUPPORTS_1000HZ && \
3048 !SYS_SUPPORTS_1024HZ
3054 default 100 if HZ_100
3055 default 128 if HZ_128
3056 default 250 if HZ_250
3057 default 256 if HZ_256
3058 default 1000 if HZ_1000
3059 default 1024 if HZ_1024
3062 def_bool HIGH_RES_TIMERS
3065 bool "Kexec system call"
3068 kexec is a system call that implements the ability to shutdown your
3069 current kernel, and to start another kernel. It is like a reboot
3070 but it is independent of the system firmware. And like a reboot
3071 you can start any kernel with it, not just Linux.
3073 The name comes from the similarity to the exec system call.
3075 It is an ongoing process to be certain the hardware in a machine
3076 is properly shutdown, so do not be surprised if this code does not
3077 initially work for you. As of this writing the exact hardware
3078 interface is strongly in flux, so no good recommendation can be
3082 bool "Kernel crash dumps"
3084 Generate crash dump after being started by kexec.
3085 This should be normally only set in special crash dump kernels
3086 which are loaded in the main kernel with kexec-tools into
3087 a specially reserved region and then later executed after
3088 a crash by kdump/kexec. The crash dump kernel must be compiled
3089 to a memory address not used by the main kernel or firmware using
3092 config PHYSICAL_START
3093 hex "Physical address where the kernel is loaded"
3094 default "0xffffffff84000000"
3095 depends on CRASH_DUMP
3097 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3098 If you plan to use kernel for capturing the crash dump change
3099 this value to start of the reserved region (the "X" value as
3100 specified in the "crashkernel=YM@XM" command line boot parameter
3101 passed to the panic-ed kernel).
3103 config MIPS_O32_FP64_SUPPORT
3104 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3105 depends on 32BIT || MIPS32_O32
3107 When this is enabled, the kernel will support use of 64-bit floating
3108 point registers with binaries using the O32 ABI along with the
3109 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3110 32-bit MIPS systems this support is at the cost of increasing the
3111 size and complexity of the compiled FPU emulator. Thus if you are
3112 running a MIPS32 system and know that none of your userland binaries
3113 will require 64-bit floating point, you may wish to reduce the size
3114 of your kernel & potentially improve FP emulation performance by
3117 Although binutils currently supports use of this flag the details
3118 concerning its effect upon the O32 ABI in userland are still being
3119 worked on. In order to avoid userland becoming dependent upon current
3120 behaviour before the details have been finalised, this option should
3121 be considered experimental and only enabled by those working upon
3129 select OF_EARLY_FLATTREE
3139 prompt "Kernel appended dtb support" if USE_OF
3140 default MIPS_NO_APPENDED_DTB
3142 config MIPS_NO_APPENDED_DTB
3145 Do not enable appended dtb support.
3147 config MIPS_ELF_APPENDED_DTB
3150 With this option, the boot code will look for a device tree binary
3151 DTB) included in the vmlinux ELF section .appended_dtb. By default
3152 it is empty and the DTB can be appended using binutils command
3155 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3157 This is meant as a backward compatibility convenience for those
3158 systems with a bootloader that can't be upgraded to accommodate
3159 the documented boot protocol using a device tree.
3161 config MIPS_RAW_APPENDED_DTB
3162 bool "vmlinux.bin or vmlinuz.bin"
3164 With this option, the boot code will look for a device tree binary
3165 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3166 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3168 This is meant as a backward compatibility convenience for those
3169 systems with a bootloader that can't be upgraded to accommodate
3170 the documented boot protocol using a device tree.
3172 Beware that there is very little in terms of protection against
3173 this option being confused by leftover garbage in memory that might
3174 look like a DTB header after a reboot if no actual DTB is appended
3175 to vmlinux.bin. Do not leave this option active in a production kernel
3176 if you don't intend to always append a DTB.
3180 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3181 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3182 !MACH_LOONGSON64 && !MIPS_MALTA && \
3184 default MIPS_CMDLINE_FROM_BOOTLOADER
3186 config MIPS_CMDLINE_FROM_DTB
3188 bool "Dtb kernel arguments if available"
3190 config MIPS_CMDLINE_DTB_EXTEND
3192 bool "Extend dtb kernel arguments with bootloader arguments"
3194 config MIPS_CMDLINE_FROM_BOOTLOADER
3195 bool "Bootloader kernel arguments if available"
3197 config MIPS_CMDLINE_BUILTIN_EXTEND
3198 depends on CMDLINE_BOOL
3199 bool "Extend builtin kernel arguments with bootloader arguments"
3204 config LOCKDEP_SUPPORT
3208 config STACKTRACE_SUPPORT
3212 config PGTABLE_LEVELS
3214 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3215 default 3 if 64BIT && !PAGE_SIZE_64KB
3218 config MIPS_AUTO_PFN_OFFSET
3221 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3223 config PCI_DRIVERS_GENERIC
3224 select PCI_DOMAINS_GENERIC if PCI
3227 config PCI_DRIVERS_LEGACY
3228 def_bool !PCI_DRIVERS_GENERIC
3229 select NO_GENERIC_PCI_IOPORT_MAP
3230 select PCI_DOMAINS if PCI
3233 # ISA support is now enabled via select. Too many systems still have the one
3234 # or other ISA chip on the board that users don't know about so don't expect
3235 # users to choose the right thing ...
3241 bool "TURBOchannel support"
3242 depends on MACH_DECSTATION
3244 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3245 processors. TURBOchannel programming specifications are available
3247 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3249 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3250 Linux driver support status is documented at:
3251 <http://www.linux-mips.org/wiki/DECstation>
3257 config ARCH_MMAP_RND_BITS_MIN
3261 config ARCH_MMAP_RND_BITS_MAX
3265 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3268 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3275 select MIPS_EXTERNAL_TIMER
3281 config MIPS32_COMPAT
3287 config SYSVIPC_COMPAT
3291 bool "Kernel support for o32 binaries"
3293 select ARCH_WANT_OLD_COMPAT_IPC
3295 select MIPS32_COMPAT
3296 select SYSVIPC_COMPAT if SYSVIPC
3298 Select this option if you want to run o32 binaries. These are pure
3299 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3300 existing binaries are in this format.
3305 bool "Kernel support for n32 binaries"
3307 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3309 select MIPS32_COMPAT
3310 select SYSVIPC_COMPAT if SYSVIPC
3312 Select this option if you want to run n32 binaries. These are
3313 64-bit binaries using 32-bit quantities for addressing and certain
3314 data that would normally be 64-bit. They are used in special
3319 menu "Power management options"
3321 config ARCH_HIBERNATION_POSSIBLE
3323 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3325 config ARCH_SUSPEND_POSSIBLE
3327 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3329 source "kernel/power/Kconfig"
3333 config MIPS_EXTERNAL_TIMER
3336 menu "CPU Power Management"
3338 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3339 source "drivers/cpufreq/Kconfig"
3342 source "drivers/cpuidle/Kconfig"
3346 source "drivers/firmware/Kconfig"
3348 source "arch/mips/kvm/Kconfig"
3350 source "arch/mips/vdso/Kconfig"