1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11 select ARCH_HAS_UBSAN_SANITIZE_ALL
12 select ARCH_SUPPORTS_UPROBES
13 select ARCH_USE_BUILTIN_BSWAP
14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
15 select ARCH_USE_QUEUED_RWLOCKS
16 select ARCH_USE_QUEUED_SPINLOCKS
17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
18 select ARCH_WANT_IPC_PARSE_VERSION
19 select BUILDTIME_TABLE_SORT
20 select CLONE_BACKWARDS
21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
22 select CPU_PM if CPU_IDLE
23 select GENERIC_ATOMIC64 if !64BIT
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_CMOS_UPDATE
26 select GENERIC_CPU_AUTOPROBE
27 select GENERIC_GETTIMEOFDAY
29 select GENERIC_IRQ_PROBE
30 select GENERIC_IRQ_SHOW
31 select GENERIC_ISA_DMA if EISA
32 select GENERIC_LIB_ASHLDI3
33 select GENERIC_LIB_ASHRDI3
34 select GENERIC_LIB_CMPDI2
35 select GENERIC_LIB_LSHRDI3
36 select GENERIC_LIB_UCMPDI2
37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
38 select GENERIC_SMP_IDLE_THREAD
39 select GENERIC_TIME_VSYSCALL
40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
41 select HANDLE_DOMAIN_IRQ
42 select HAVE_ARCH_COMPILER_H
43 select HAVE_ARCH_JUMP_LABEL
45 select HAVE_ARCH_MMAP_RND_BITS if MMU
46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
47 select HAVE_ARCH_SECCOMP_FILTER
48 select HAVE_ARCH_TRACEHOOK
49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
50 select HAVE_ASM_MODVERSIONS
51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
52 select HAVE_CONTEXT_TRACKING
54 select HAVE_C_RECORDMCOUNT
55 select HAVE_DEBUG_KMEMLEAK
56 select HAVE_DEBUG_STACKOVERFLOW
57 select HAVE_DMA_CONTIGUOUS
58 select HAVE_DYNAMIC_FTRACE
59 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
60 select HAVE_EXIT_THREAD
62 select HAVE_FTRACE_MCOUNT_RECORD
63 select HAVE_FUNCTION_GRAPH_TRACER
64 select HAVE_FUNCTION_TRACER
65 select HAVE_GCC_PLUGINS
66 select HAVE_GENERIC_VDSO
68 select HAVE_IOREMAP_PROT
69 select HAVE_IRQ_EXIT_ON_IRQ_STACK
70 select HAVE_IRQ_TIME_ACCOUNTING
72 select HAVE_KRETPROBES
73 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
74 select HAVE_MOD_ARCH_SPECIFIC
77 select HAVE_PERF_EVENTS
78 select HAVE_REGS_AND_STACK_ACCESS_API
80 select HAVE_SPARSE_SYSCALL_NR
81 select HAVE_STACKPROTECTOR
82 select HAVE_SYSCALL_TRACEPOINTS
83 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
84 select IRQ_FORCED_THREADING
86 select MODULES_USE_ELF_REL if MODULES
87 select MODULES_USE_ELF_RELA if MODULES && 64BIT
88 select PERF_USE_VMALLOC
90 select SYSCTL_EXCEPTION_TRACE
93 config MIPS_FIXUP_BIGPHYS_ADDR
96 menu "Machine selection"
103 bool "Generic board-agnostic MIPS kernel"
107 select CLKSRC_MIPS_GIC
109 select CPU_MIPSR2_IRQ_EI
110 select CPU_MIPSR2_IRQ_VI
112 select DMA_PERDEV_COHERENT
115 select MIPS_AUTO_PFN_OFFSET
116 select MIPS_CPU_SCACHE
118 select MIPS_L1_CACHE_SHIFT_7
119 select NO_EXCEPT_FILL
120 select PCI_DRIVERS_GENERIC
123 select SYS_HAS_CPU_MIPS32_R1
124 select SYS_HAS_CPU_MIPS32_R2
125 select SYS_HAS_CPU_MIPS32_R6
126 select SYS_HAS_CPU_MIPS64_R1
127 select SYS_HAS_CPU_MIPS64_R2
128 select SYS_HAS_CPU_MIPS64_R6
129 select SYS_SUPPORTS_32BIT_KERNEL
130 select SYS_SUPPORTS_64BIT_KERNEL
131 select SYS_SUPPORTS_BIG_ENDIAN
132 select SYS_SUPPORTS_HIGHMEM
133 select SYS_SUPPORTS_LITTLE_ENDIAN
134 select SYS_SUPPORTS_MICROMIPS
135 select SYS_SUPPORTS_MIPS16
136 select SYS_SUPPORTS_MIPS_CPS
137 select SYS_SUPPORTS_MULTITHREADING
138 select SYS_SUPPORTS_RELOCATABLE
139 select SYS_SUPPORTS_SMARTMIPS
141 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
142 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
143 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
144 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
145 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
146 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
149 Select this to build a kernel which aims to support multiple boards,
150 generally using a flattened device tree passed from the bootloader
151 using the boot protocol defined in the UHI (Unified Hosting
152 Interface) specification.
155 bool "Alchemy processor based machines"
156 select PHYS_ADDR_T_64BIT
160 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
161 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
162 select SYS_HAS_CPU_MIPS32_R1
163 select SYS_SUPPORTS_32BIT_KERNEL
164 select SYS_SUPPORTS_APM_EMULATION
166 select SYS_SUPPORTS_ZBOOT
170 bool "Texas Instruments AR7"
172 select DMA_NONCOHERENT
176 select NO_EXCEPT_FILL
178 select SYS_HAS_CPU_MIPS32_R1
179 select SYS_HAS_EARLY_PRINTK
180 select SYS_SUPPORTS_32BIT_KERNEL
181 select SYS_SUPPORTS_LITTLE_ENDIAN
182 select SYS_SUPPORTS_MIPS16
183 select SYS_SUPPORTS_ZBOOT_UART16550
186 select HAVE_LEGACY_CLK
188 Support for the Texas Instruments AR7 System-on-a-Chip
189 family: TNETD7100, 7200 and 7300.
192 bool "Atheros AR231x/AR531x SoC support"
195 select DMA_NONCOHERENT
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_BIG_ENDIAN
200 select SYS_SUPPORTS_32BIT_KERNEL
201 select SYS_HAS_EARLY_PRINTK
203 Support for Atheros AR231x and Atheros AR531x based boards
206 bool "Atheros AR71XX/AR724X/AR913X based boards"
207 select ARCH_HAS_RESET_CONTROLLER
211 select DMA_NONCOHERENT
216 select SYS_HAS_CPU_MIPS32_R2
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_BIG_ENDIAN
220 select SYS_SUPPORTS_MIPS16
221 select SYS_SUPPORTS_ZBOOT_UART_PROM
223 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
225 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
228 bool "Broadcom Generic BMIPS kernel"
229 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
230 select ARCH_HAS_PHYS_TO_DMA
232 select NO_EXCEPT_FILL
238 select BCM6345_L1_IRQ
239 select BCM7038_L1_IRQ
240 select BCM7120_L2_IRQ
241 select BRCMSTB_L2_IRQ
243 select DMA_NONCOHERENT
244 select SYS_SUPPORTS_32BIT_KERNEL
245 select SYS_SUPPORTS_LITTLE_ENDIAN
246 select SYS_SUPPORTS_BIG_ENDIAN
247 select SYS_SUPPORTS_HIGHMEM
248 select SYS_HAS_CPU_BMIPS32_3300
249 select SYS_HAS_CPU_BMIPS4350
250 select SYS_HAS_CPU_BMIPS4380
251 select SYS_HAS_CPU_BMIPS5000
253 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
254 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
255 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
256 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
257 select HARDIRQS_SW_RESEND
259 Build a generic DT-based kernel image that boots on select
260 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
261 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
262 must be set appropriately for your board.
265 bool "Broadcom BCM47XX based boards"
269 select DMA_NONCOHERENT
272 select SYS_HAS_CPU_MIPS32_R1
273 select NO_EXCEPT_FILL
274 select SYS_SUPPORTS_32BIT_KERNEL
275 select SYS_SUPPORTS_LITTLE_ENDIAN
276 select SYS_SUPPORTS_MIPS16
277 select SYS_SUPPORTS_ZBOOT
278 select SYS_HAS_EARLY_PRINTK
279 select USE_GENERIC_EARLY_PRINTK_8250
281 select LEDS_GPIO_REGISTER
284 select BCM47XX_SSB if !BCM47XX_BCMA
286 Support for BCM47XX based boards
289 bool "Broadcom BCM63XX based boards"
294 select DMA_NONCOHERENT
296 select SYS_SUPPORTS_32BIT_KERNEL
297 select SYS_SUPPORTS_BIG_ENDIAN
298 select SYS_HAS_EARLY_PRINTK
301 select MIPS_L1_CACHE_SHIFT_4
303 select HAVE_LEGACY_CLK
305 Support for BCM63XX based boards
312 select DMA_NONCOHERENT
318 select PCI_GT64XXX_PCI0
319 select SYS_HAS_CPU_NEVADA
320 select SYS_HAS_EARLY_PRINTK
321 select SYS_SUPPORTS_32BIT_KERNEL
322 select SYS_SUPPORTS_64BIT_KERNEL
323 select SYS_SUPPORTS_LITTLE_ENDIAN
324 select USE_GENERIC_EARLY_PRINTK_8250
326 config MACH_DECSTATION
330 select CEVT_R4K if CPU_R4X00
332 select CSRC_R4K if CPU_R4X00
333 select CPU_DADDI_WORKAROUNDS if 64BIT
334 select CPU_R4000_WORKAROUNDS if 64BIT
335 select CPU_R4400_WORKAROUNDS if 64BIT
336 select DMA_NONCOHERENT
339 select SYS_HAS_CPU_R3000
340 select SYS_HAS_CPU_R4X00
341 select SYS_SUPPORTS_32BIT_KERNEL
342 select SYS_SUPPORTS_64BIT_KERNEL
343 select SYS_SUPPORTS_LITTLE_ENDIAN
344 select SYS_SUPPORTS_128HZ
345 select SYS_SUPPORTS_256HZ
346 select SYS_SUPPORTS_1024HZ
347 select MIPS_L1_CACHE_SHIFT_4
349 This enables support for DEC's MIPS based workstations. For details
350 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
351 DECstation porting pages on <http://decstation.unix-ag.org/>.
353 If you have one of the following DECstation Models you definitely
354 want to choose R4xx0 for the CPU Type:
361 otherwise choose R3000.
364 bool "Jazz family of machines"
367 select ARCH_MIGHT_HAVE_PC_PARPORT
368 select ARCH_MIGHT_HAVE_PC_SERIO
372 select ARCH_MAY_HAVE_PC_FDC
375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
376 select GENERIC_ISA_DMA
377 select HAVE_PCSPKR_PLATFORM
382 select SYS_HAS_CPU_R4X00
383 select SYS_SUPPORTS_32BIT_KERNEL
384 select SYS_SUPPORTS_64BIT_KERNEL
385 select SYS_SUPPORTS_100HZ
387 This a family of machines based on the MIPS R4030 chipset which was
388 used by several vendors to build RISC/os and Windows NT workstations.
389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
390 Olivetti M700-10 workstations.
393 bool "Ingenic SoC based machines"
394 select SYS_SUPPORTS_32BIT_KERNEL
395 select SYS_SUPPORTS_LITTLE_ENDIAN
396 select SYS_SUPPORTS_ZBOOT_UART16550
397 select CPU_SUPPORTS_HUGEPAGES
398 select DMA_NONCOHERENT
403 select GENERIC_IRQ_CHIP
404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
408 bool "Lantiq based platforms"
409 select DMA_NONCOHERENT
413 select SYS_HAS_CPU_MIPS32_R1
414 select SYS_HAS_CPU_MIPS32_R2
415 select SYS_SUPPORTS_BIG_ENDIAN
416 select SYS_SUPPORTS_32BIT_KERNEL
417 select SYS_SUPPORTS_MIPS16
418 select SYS_SUPPORTS_MULTITHREADING
419 select SYS_SUPPORTS_VPE_LOADER
420 select SYS_HAS_EARLY_PRINTK
425 select HAVE_LEGACY_CLK
428 select PINCTRL_LANTIQ
429 select ARCH_HAS_RESET_CONTROLLER
430 select RESET_CONTROLLER
432 config MACH_LOONGSON32
433 bool "Loongson 32-bit family of machines"
434 select SYS_SUPPORTS_ZBOOT
436 This enables support for the Loongson-1 family of machines.
438 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
439 the Institute of Computing Technology (ICT), Chinese Academy of
442 config MACH_LOONGSON2EF
443 bool "Loongson-2E/F family of machines"
444 select SYS_SUPPORTS_ZBOOT
446 This enables the support of early Loongson-2E/F family of machines.
448 config MACH_LOONGSON64
449 bool "Loongson 64-bit family of machines"
450 select ARCH_SPARSEMEM_ENABLE
451 select ARCH_MIGHT_HAVE_PC_PARPORT
452 select ARCH_MIGHT_HAVE_PC_SERIO
453 select GENERIC_ISA_DMA_SUPPORT_BROKEN
463 select NO_EXCEPT_FILL
464 select NR_CPUS_DEFAULT_64
465 select USE_GENERIC_EARLY_PRINTK_8250
466 select PCI_DRIVERS_GENERIC
467 select SYS_HAS_CPU_LOONGSON64
468 select SYS_HAS_EARLY_PRINTK
469 select SYS_SUPPORTS_SMP
470 select SYS_SUPPORTS_HOTPLUG_CPU
471 select SYS_SUPPORTS_NUMA
472 select SYS_SUPPORTS_64BIT_KERNEL
473 select SYS_SUPPORTS_HIGHMEM
474 select SYS_SUPPORTS_LITTLE_ENDIAN
475 select SYS_SUPPORTS_ZBOOT
481 select PCI_HOST_GENERIC
483 This enables the support of Loongson-2/3 family of machines.
485 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
486 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
487 and Loongson-2F which will be removed), developed by the Institute
488 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
490 config MACH_PISTACHIO
491 bool "IMG Pistachio SoC based boards"
495 select CLKSRC_MIPS_GIC
498 select DMA_NONCOHERENT
502 select MIPS_CPU_SCACHE
506 select SYS_HAS_CPU_MIPS32_R2
507 select SYS_SUPPORTS_32BIT_KERNEL
508 select SYS_SUPPORTS_LITTLE_ENDIAN
509 select SYS_SUPPORTS_MIPS_CPS
510 select SYS_SUPPORTS_MULTITHREADING
511 select SYS_SUPPORTS_RELOCATABLE
512 select SYS_SUPPORTS_ZBOOT
513 select SYS_HAS_EARLY_PRINTK
514 select USE_GENERIC_EARLY_PRINTK_8250
517 This enables support for the IMG Pistachio SoC platform.
520 bool "MIPS Malta board"
521 select ARCH_MAY_HAVE_PC_FDC
522 select ARCH_MIGHT_HAVE_PC_PARPORT
523 select ARCH_MIGHT_HAVE_PC_SERIO
528 select CLKSRC_MIPS_GIC
531 select DMA_MAYBE_COHERENT
532 select GENERIC_ISA_DMA
533 select HAVE_PCSPKR_PLATFORM
539 select MIPS_CPU_SCACHE
541 select MIPS_L1_CACHE_SHIFT_6
543 select PCI_GT64XXX_PCI0
546 select SYS_HAS_CPU_MIPS32_R1
547 select SYS_HAS_CPU_MIPS32_R2
548 select SYS_HAS_CPU_MIPS32_R3_5
549 select SYS_HAS_CPU_MIPS32_R5
550 select SYS_HAS_CPU_MIPS32_R6
551 select SYS_HAS_CPU_MIPS64_R1
552 select SYS_HAS_CPU_MIPS64_R2
553 select SYS_HAS_CPU_MIPS64_R6
554 select SYS_HAS_CPU_NEVADA
555 select SYS_HAS_CPU_RM7000
556 select SYS_SUPPORTS_32BIT_KERNEL
557 select SYS_SUPPORTS_64BIT_KERNEL
558 select SYS_SUPPORTS_BIG_ENDIAN
559 select SYS_SUPPORTS_HIGHMEM
560 select SYS_SUPPORTS_LITTLE_ENDIAN
561 select SYS_SUPPORTS_MICROMIPS
562 select SYS_SUPPORTS_MIPS16
563 select SYS_SUPPORTS_MIPS_CMP
564 select SYS_SUPPORTS_MIPS_CPS
565 select SYS_SUPPORTS_MULTITHREADING
566 select SYS_SUPPORTS_RELOCATABLE
567 select SYS_SUPPORTS_SMARTMIPS
568 select SYS_SUPPORTS_VPE_LOADER
569 select SYS_SUPPORTS_ZBOOT
571 select WAR_ICACHE_REFILLS
572 select ZONE_DMA32 if 64BIT
574 This enables support for the MIPS Technologies Malta evaluation
578 bool "Microchip PIC32 Family"
580 This enables support for the Microchip PIC32 family of platforms.
582 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
586 bool "NEC VR4100 series based machines"
589 select SYS_HAS_CPU_VR41XX
590 select SYS_SUPPORTS_MIPS16
594 bool "Ralink based machines"
598 select DMA_NONCOHERENT
601 select SYS_HAS_CPU_MIPS32_R1
602 select SYS_HAS_CPU_MIPS32_R2
603 select SYS_SUPPORTS_32BIT_KERNEL
604 select SYS_SUPPORTS_LITTLE_ENDIAN
605 select SYS_SUPPORTS_MIPS16
606 select SYS_HAS_EARLY_PRINTK
608 select ARCH_HAS_RESET_CONTROLLER
609 select RESET_CONTROLLER
612 bool "SGI IP22 (Indy/Indigo2)"
617 select ARCH_MIGHT_HAVE_PC_SERIO
621 select DEFAULT_SGI_PARTITION
622 select DMA_NONCOHERENT
626 select IP22_CPU_SCACHE
628 select GENERIC_ISA_DMA_SUPPORT_BROKEN
630 select SGI_HAS_INDYDOG
636 select SYS_HAS_CPU_R4X00
637 select SYS_HAS_CPU_R5000
638 select SYS_HAS_EARLY_PRINTK
639 select SYS_SUPPORTS_32BIT_KERNEL
640 select SYS_SUPPORTS_64BIT_KERNEL
641 select SYS_SUPPORTS_BIG_ENDIAN
642 select WAR_R4600_V1_INDEX_ICACHEOP
643 select WAR_R4600_V1_HIT_CACHEOP
644 select WAR_R4600_V2_HIT_CACHEOP
645 select MIPS_L1_CACHE_SHIFT_7
647 This are the SGI Indy, Challenge S and Indigo2, as well as certain
648 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
649 that runs on these, say Y here.
652 bool "SGI IP27 (Origin200/2000)"
653 select ARCH_HAS_PHYS_TO_DMA
654 select ARCH_SPARSEMEM_ENABLE
657 select ARC_CMDLINE_ONLY
659 select DEFAULT_SGI_PARTITION
660 select SYS_HAS_EARLY_PRINTK
663 select IRQ_DOMAIN_HIERARCHY
664 select NR_CPUS_DEFAULT_64
665 select PCI_DRIVERS_GENERIC
666 select PCI_XTALK_BRIDGE
667 select SYS_HAS_CPU_R10000
668 select SYS_SUPPORTS_64BIT_KERNEL
669 select SYS_SUPPORTS_BIG_ENDIAN
670 select SYS_SUPPORTS_NUMA
671 select SYS_SUPPORTS_SMP
672 select WAR_R10000_LLSC
673 select MIPS_L1_CACHE_SHIFT_7
676 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
677 workstations. To compile a Linux kernel that runs on these, say Y
681 bool "SGI IP28 (Indigo2 R10k)"
686 select ARCH_MIGHT_HAVE_PC_SERIO
690 select DEFAULT_SGI_PARTITION
691 select DMA_NONCOHERENT
692 select GENERIC_ISA_DMA_SUPPORT_BROKEN
698 select SGI_HAS_INDYDOG
704 select SYS_HAS_CPU_R10000
705 select SYS_HAS_EARLY_PRINTK
706 select SYS_SUPPORTS_64BIT_KERNEL
707 select SYS_SUPPORTS_BIG_ENDIAN
708 select WAR_R10000_LLSC
709 select MIPS_L1_CACHE_SHIFT_7
711 This is the SGI Indigo2 with R10000 processor. To compile a Linux
712 kernel that runs on these, say Y here.
715 bool "SGI IP30 (Octane/Octane2)"
716 select ARCH_HAS_PHYS_TO_DMA
722 select SYNC_R4K if SMP
726 select IRQ_DOMAIN_HIERARCHY
727 select NR_CPUS_DEFAULT_2
728 select PCI_DRIVERS_GENERIC
729 select PCI_XTALK_BRIDGE
730 select SYS_HAS_EARLY_PRINTK
731 select SYS_HAS_CPU_R10000
732 select SYS_SUPPORTS_64BIT_KERNEL
733 select SYS_SUPPORTS_BIG_ENDIAN
734 select SYS_SUPPORTS_SMP
735 select WAR_R10000_LLSC
736 select MIPS_L1_CACHE_SHIFT_7
739 These are the SGI Octane and Octane2 graphics workstations. To
740 compile a Linux kernel that runs on these, say Y here.
746 select ARCH_HAS_PHYS_TO_DMA
752 select DMA_NONCOHERENT
755 select R5000_CPU_SCACHE
756 select RM7000_CPU_SCACHE
757 select SYS_HAS_CPU_R5000
758 select SYS_HAS_CPU_R10000 if BROKEN
759 select SYS_HAS_CPU_RM7000
760 select SYS_HAS_CPU_NEVADA
761 select SYS_SUPPORTS_64BIT_KERNEL
762 select SYS_SUPPORTS_BIG_ENDIAN
763 select WAR_ICACHE_REFILLS
765 If you want this kernel to run on SGI O2 workstation, say Y here.
768 bool "Sibyte BCM91120C-CRhine"
770 select SIBYTE_BCM1120
772 select SYS_HAS_CPU_SB1
773 select SYS_SUPPORTS_BIG_ENDIAN
774 select SYS_SUPPORTS_LITTLE_ENDIAN
777 bool "Sibyte BCM91120x-Carmel"
779 select SIBYTE_BCM1120
781 select SYS_HAS_CPU_SB1
782 select SYS_SUPPORTS_BIG_ENDIAN
783 select SYS_SUPPORTS_LITTLE_ENDIAN
786 bool "Sibyte BCM91125C-CRhone"
788 select SIBYTE_BCM1125
790 select SYS_HAS_CPU_SB1
791 select SYS_SUPPORTS_BIG_ENDIAN
792 select SYS_SUPPORTS_HIGHMEM
793 select SYS_SUPPORTS_LITTLE_ENDIAN
796 bool "Sibyte BCM91125E-Rhone"
798 select SIBYTE_BCM1125H
800 select SYS_HAS_CPU_SB1
801 select SYS_SUPPORTS_BIG_ENDIAN
802 select SYS_SUPPORTS_LITTLE_ENDIAN
805 bool "Sibyte BCM91250A-SWARM"
807 select HAVE_PATA_PLATFORM
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_HIGHMEM
813 select SYS_SUPPORTS_LITTLE_ENDIAN
814 select ZONE_DMA32 if 64BIT
815 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
817 config SIBYTE_LITTLESUR
818 bool "Sibyte BCM91250C2-LittleSur"
820 select HAVE_PATA_PLATFORM
823 select SYS_HAS_CPU_SB1
824 select SYS_SUPPORTS_BIG_ENDIAN
825 select SYS_SUPPORTS_HIGHMEM
826 select SYS_SUPPORTS_LITTLE_ENDIAN
827 select ZONE_DMA32 if 64BIT
829 config SIBYTE_SENTOSA
830 bool "Sibyte BCM91250E-Sentosa"
834 select SYS_HAS_CPU_SB1
835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_LITTLE_ENDIAN
837 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
840 bool "Sibyte BCM91480B-BigSur"
842 select NR_CPUS_DEFAULT_4
843 select SIBYTE_BCM1x80
845 select SYS_HAS_CPU_SB1
846 select SYS_SUPPORTS_BIG_ENDIAN
847 select SYS_SUPPORTS_HIGHMEM
848 select SYS_SUPPORTS_LITTLE_ENDIAN
849 select ZONE_DMA32 if 64BIT
850 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
853 bool "SNI RM200/300/400"
856 select FW_ARC if CPU_LITTLE_ENDIAN
857 select FW_ARC32 if CPU_LITTLE_ENDIAN
858 select FW_SNIPROM if CPU_BIG_ENDIAN
859 select ARCH_MAY_HAVE_PC_FDC
860 select ARCH_MIGHT_HAVE_PC_PARPORT
861 select ARCH_MIGHT_HAVE_PC_SERIO
865 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
866 select DMA_NONCOHERENT
867 select GENERIC_ISA_DMA
869 select HAVE_PCSPKR_PLATFORM
875 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
876 select SYS_HAS_CPU_R4X00
877 select SYS_HAS_CPU_R5000
878 select SYS_HAS_CPU_R10000
879 select R5000_CPU_SCACHE
880 select SYS_HAS_EARLY_PRINTK
881 select SYS_SUPPORTS_32BIT_KERNEL
882 select SYS_SUPPORTS_64BIT_KERNEL
883 select SYS_SUPPORTS_BIG_ENDIAN
884 select SYS_SUPPORTS_HIGHMEM
885 select SYS_SUPPORTS_LITTLE_ENDIAN
886 select WAR_R4600_V2_HIT_CACHEOP
888 The SNI RM200/300/400 are MIPS-based machines manufactured by
889 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
890 Technology and now in turn merged with Fujitsu. Say Y here to
891 support this machine type.
894 bool "Toshiba TX39 series based machines"
897 bool "Toshiba TX49 series based machines"
898 select WAR_TX49XX_ICACHE_INDEX_INV
900 config MIKROTIK_RB532
901 bool "Mikrotik RB532 boards"
904 select DMA_NONCOHERENT
907 select SYS_HAS_CPU_MIPS32_R1
908 select SYS_SUPPORTS_32BIT_KERNEL
909 select SYS_SUPPORTS_LITTLE_ENDIAN
913 select MIPS_L1_CACHE_SHIFT_4
915 Support the Mikrotik(tm) RouterBoard 532 series,
916 based on the IDT RC32434 SoC.
918 config CAVIUM_OCTEON_SOC
919 bool "Cavium Networks Octeon SoC based boards"
921 select ARCH_HAS_PHYS_TO_DMA
923 select PHYS_ADDR_T_64BIT
924 select SYS_SUPPORTS_64BIT_KERNEL
925 select SYS_SUPPORTS_BIG_ENDIAN
927 select EDAC_ATOMIC_SCRUB
928 select SYS_SUPPORTS_LITTLE_ENDIAN
929 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
930 select SYS_HAS_EARLY_PRINTK
931 select SYS_HAS_CPU_CAVIUM_OCTEON
933 select HAVE_PLAT_DELAY
934 select HAVE_PLAT_FW_INIT_CMDLINE
935 select HAVE_PLAT_MEMCPY
940 select ARCH_SPARSEMEM_ENABLE
941 select SYS_SUPPORTS_SMP
942 select NR_CPUS_DEFAULT_64
943 select MIPS_NR_CPU_NR_MAP_1024
945 select MTD_COMPLEX_MAPPINGS
947 select SYS_SUPPORTS_RELOCATABLE
949 This option supports all of the Octeon reference boards from Cavium
950 Networks. It builds a kernel that dynamically determines the Octeon
951 CPU type and supports all known board reference implementations.
952 Some of the supported boards are:
959 Say Y here for most Octeon reference boards.
962 bool "Netlogic XLR/XLS based systems"
965 select SYS_HAS_CPU_XLR
966 select SYS_SUPPORTS_SMP
969 select SYS_SUPPORTS_32BIT_KERNEL
970 select SYS_SUPPORTS_64BIT_KERNEL
971 select PHYS_ADDR_T_64BIT
972 select SYS_SUPPORTS_BIG_ENDIAN
973 select SYS_SUPPORTS_HIGHMEM
974 select NR_CPUS_DEFAULT_32
978 select ZONE_DMA32 if 64BIT
980 select SYS_HAS_EARLY_PRINTK
981 select SYS_SUPPORTS_ZBOOT
982 select SYS_SUPPORTS_ZBOOT_UART16550
984 Support for systems based on Netlogic XLR and XLS processors.
985 Say Y here if you have a XLR or XLS based board.
988 bool "Netlogic XLP based systems"
991 select SYS_HAS_CPU_XLP
992 select SYS_SUPPORTS_SMP
994 select SYS_SUPPORTS_32BIT_KERNEL
995 select SYS_SUPPORTS_64BIT_KERNEL
996 select PHYS_ADDR_T_64BIT
998 select SYS_SUPPORTS_BIG_ENDIAN
999 select SYS_SUPPORTS_LITTLE_ENDIAN
1000 select SYS_SUPPORTS_HIGHMEM
1001 select NR_CPUS_DEFAULT_32
1005 select ZONE_DMA32 if 64BIT
1007 select SYS_HAS_EARLY_PRINTK
1009 select SYS_SUPPORTS_ZBOOT
1010 select SYS_SUPPORTS_ZBOOT_UART16550
1012 This board is based on Netlogic XLP Processor.
1013 Say Y here if you have a XLP based board.
1017 source "arch/mips/alchemy/Kconfig"
1018 source "arch/mips/ath25/Kconfig"
1019 source "arch/mips/ath79/Kconfig"
1020 source "arch/mips/bcm47xx/Kconfig"
1021 source "arch/mips/bcm63xx/Kconfig"
1022 source "arch/mips/bmips/Kconfig"
1023 source "arch/mips/generic/Kconfig"
1024 source "arch/mips/jazz/Kconfig"
1025 source "arch/mips/jz4740/Kconfig"
1026 source "arch/mips/lantiq/Kconfig"
1027 source "arch/mips/pic32/Kconfig"
1028 source "arch/mips/pistachio/Kconfig"
1029 source "arch/mips/ralink/Kconfig"
1030 source "arch/mips/sgi-ip27/Kconfig"
1031 source "arch/mips/sibyte/Kconfig"
1032 source "arch/mips/txx9/Kconfig"
1033 source "arch/mips/vr41xx/Kconfig"
1034 source "arch/mips/cavium-octeon/Kconfig"
1035 source "arch/mips/loongson2ef/Kconfig"
1036 source "arch/mips/loongson32/Kconfig"
1037 source "arch/mips/loongson64/Kconfig"
1038 source "arch/mips/netlogic/Kconfig"
1042 config GENERIC_HWEIGHT
1046 config GENERIC_CALIBRATE_DELAY
1050 config SCHED_OMIT_FRAME_POINTER
1055 # Select some configuration options automatically based on user selections.
1060 config ARCH_MAY_HAVE_PC_FDC
1091 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1097 config MIPS_CLOCK_VSYSCALL
1098 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1107 config ARCH_SUPPORTS_UPROBES
1110 config DMA_MAYBE_COHERENT
1111 select ARCH_HAS_DMA_COHERENCE_H
1112 select DMA_NONCOHERENT
1115 config DMA_PERDEV_COHERENT
1117 select ARCH_HAS_SETUP_DMA_OPS
1118 select DMA_NONCOHERENT
1120 config DMA_NONCOHERENT
1123 # MIPS allows mixing "slightly different" Cacheability and Coherency
1124 # Attribute bits. It is believed that the uncached access through
1125 # KSEG1 and the implementation specific "uncached accelerated" used
1126 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1127 # significant advantages.
1129 select ARCH_HAS_DMA_WRITE_COMBINE
1130 select ARCH_HAS_DMA_PREP_COHERENT
1131 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1132 select ARCH_HAS_DMA_SET_UNCACHED
1133 select DMA_NONCOHERENT_MMAP
1134 select DMA_NONCOHERENT_CACHE_SYNC
1135 select NEED_DMA_MAP_STATE
1137 config SYS_HAS_EARLY_PRINTK
1140 config SYS_SUPPORTS_HOTPLUG_CPU
1143 config MIPS_BONITO64
1152 config NO_IOPORT_MAP
1156 def_bool CPU_NO_LOAD_STORE_LR
1158 config GENERIC_ISA_DMA
1160 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1163 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1165 select GENERIC_ISA_DMA
1167 config HAVE_PLAT_DELAY
1170 config HAVE_PLAT_FW_INIT_CMDLINE
1173 config HAVE_PLAT_MEMCPY
1179 config HOLES_IN_ZONE
1182 config SYS_SUPPORTS_RELOCATABLE
1185 Selected if the platform supports relocating the kernel.
1186 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1187 to allow access to command line and entropy sources.
1189 config MIPS_CBPF_JIT
1191 depends on BPF_JIT && HAVE_CBPF_JIT
1193 config MIPS_EBPF_JIT
1195 depends on BPF_JIT && HAVE_EBPF_JIT
1199 # Endianness selection. Sufficiently obscure so many users don't know what to
1200 # answer,so we try hard to limit the available choices. Also the use of a
1201 # choice statement should be more obvious to the user.
1204 prompt "Endianness selection"
1206 Some MIPS machines can be configured for either little or big endian
1207 byte order. These modes require different kernels and a different
1208 Linux distribution. In general there is one preferred byteorder for a
1209 particular system but some systems are just as commonly used in the
1210 one or the other endianness.
1212 config CPU_BIG_ENDIAN
1214 depends on SYS_SUPPORTS_BIG_ENDIAN
1216 config CPU_LITTLE_ENDIAN
1217 bool "Little endian"
1218 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1225 config SYS_SUPPORTS_APM_EMULATION
1228 config SYS_SUPPORTS_BIG_ENDIAN
1231 config SYS_SUPPORTS_LITTLE_ENDIAN
1234 config SYS_SUPPORTS_HUGETLBFS
1236 depends on CPU_SUPPORTS_HUGEPAGES
1239 config MIPS_HUGE_TLB_SUPPORT
1240 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1257 config PCI_GT64XXX_PCI0
1260 config PCI_XTALK_BRIDGE
1263 config NO_EXCEPT_FILL
1269 config SWAP_IO_SPACE
1272 config SGI_HAS_INDYDOG
1284 config SGI_HAS_ZILOG
1287 config SGI_HAS_I8042
1290 config DEFAULT_SGI_PARTITION
1302 config MIPS_L1_CACHE_SHIFT_4
1305 config MIPS_L1_CACHE_SHIFT_5
1308 config MIPS_L1_CACHE_SHIFT_6
1311 config MIPS_L1_CACHE_SHIFT_7
1314 config MIPS_L1_CACHE_SHIFT
1316 default "7" if MIPS_L1_CACHE_SHIFT_7
1317 default "6" if MIPS_L1_CACHE_SHIFT_6
1318 default "5" if MIPS_L1_CACHE_SHIFT_5
1319 default "4" if MIPS_L1_CACHE_SHIFT_4
1322 config ARC_CMDLINE_ONLY
1326 bool "ARC console support"
1327 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1341 menu "CPU selection"
1347 config CPU_LOONGSON64
1348 bool "Loongson 64-bit CPU"
1349 depends on SYS_HAS_CPU_LOONGSON64
1350 select ARCH_HAS_PHYS_TO_DMA
1352 select CPU_HAS_PREFETCH
1353 select CPU_SUPPORTS_64BIT_KERNEL
1354 select CPU_SUPPORTS_HIGHMEM
1355 select CPU_SUPPORTS_HUGEPAGES
1356 select CPU_SUPPORTS_MSA
1357 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1358 select CPU_MIPSR2_IRQ_VI
1359 select WEAK_ORDERING
1360 select WEAK_REORDERING_BEYOND_LLSC
1361 select MIPS_ASID_BITS_VARIABLE
1362 select MIPS_PGD_C0_CONTEXT
1363 select MIPS_L1_CACHE_SHIFT_6
1368 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1369 cores implements the MIPS64R2 instruction set with many extensions,
1370 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1371 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1372 Loongson-2E/2F is not covered here and will be removed in future.
1374 config LOONGSON3_ENHANCEMENT
1375 bool "New Loongson-3 CPU Enhancements"
1377 depends on CPU_LOONGSON64
1379 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1380 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1381 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1382 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1383 Fast TLB refill support, etc.
1385 This option enable those enhancements which are not probed at run
1386 time. If you want a generic kernel to run on all Loongson 3 machines,
1387 please say 'N' here. If you want a high-performance kernel to run on
1388 new Loongson-3 machines only, please say 'Y' here.
1390 config CPU_LOONGSON3_WORKAROUNDS
1391 bool "Old Loongson-3 LLSC Workarounds"
1393 depends on CPU_LOONGSON64
1395 Loongson-3 processors have the llsc issues which require workarounds.
1396 Without workarounds the system may hang unexpectedly.
1398 Newer Loongson-3 will fix these issues and no workarounds are needed.
1399 The workarounds have no significant side effect on them but may
1400 decrease the performance of the system so this option should be
1401 disabled unless the kernel is intended to be run on old systems.
1403 If unsure, please say Y.
1405 config CPU_LOONGSON3_CPUCFG_EMULATION
1406 bool "Emulate the CPUCFG instruction on older Loongson cores"
1408 depends on CPU_LOONGSON64
1410 Loongson-3A R4 and newer have the CPUCFG instruction available for
1411 userland to query CPU capabilities, much like CPUID on x86. This
1412 option provides emulation of the instruction on older Loongson
1413 cores, back to Loongson-3A1000.
1415 If unsure, please say Y.
1417 config CPU_LOONGSON2E
1419 depends on SYS_HAS_CPU_LOONGSON2E
1420 select CPU_LOONGSON2EF
1422 The Loongson 2E processor implements the MIPS III instruction set
1423 with many extensions.
1425 It has an internal FPGA northbridge, which is compatible to
1428 config CPU_LOONGSON2F
1430 depends on SYS_HAS_CPU_LOONGSON2F
1431 select CPU_LOONGSON2EF
1434 The Loongson 2F processor implements the MIPS III instruction set
1435 with many extensions.
1437 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1438 have a similar programming interface with FPGA northbridge used in
1441 config CPU_LOONGSON1B
1443 depends on SYS_HAS_CPU_LOONGSON1B
1444 select CPU_LOONGSON32
1445 select LEDS_GPIO_REGISTER
1447 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1448 Release 1 instruction set and part of the MIPS32 Release 2
1451 config CPU_LOONGSON1C
1453 depends on SYS_HAS_CPU_LOONGSON1C
1454 select CPU_LOONGSON32
1455 select LEDS_GPIO_REGISTER
1457 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1458 Release 1 instruction set and part of the MIPS32 Release 2
1461 config CPU_MIPS32_R1
1462 bool "MIPS32 Release 1"
1463 depends on SYS_HAS_CPU_MIPS32_R1
1464 select CPU_HAS_PREFETCH
1465 select CPU_SUPPORTS_32BIT_KERNEL
1466 select CPU_SUPPORTS_HIGHMEM
1468 Choose this option to build a kernel for release 1 or later of the
1469 MIPS32 architecture. Most modern embedded systems with a 32-bit
1470 MIPS processor are based on a MIPS32 processor. If you know the
1471 specific type of processor in your system, choose those that one
1472 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1473 Release 2 of the MIPS32 architecture is available since several
1474 years so chances are you even have a MIPS32 Release 2 processor
1475 in which case you should choose CPU_MIPS32_R2 instead for better
1478 config CPU_MIPS32_R2
1479 bool "MIPS32 Release 2"
1480 depends on SYS_HAS_CPU_MIPS32_R2
1481 select CPU_HAS_PREFETCH
1482 select CPU_SUPPORTS_32BIT_KERNEL
1483 select CPU_SUPPORTS_HIGHMEM
1484 select CPU_SUPPORTS_MSA
1487 Choose this option to build a kernel for release 2 or later of the
1488 MIPS32 architecture. Most modern embedded systems with a 32-bit
1489 MIPS processor are based on a MIPS32 processor. If you know the
1490 specific type of processor in your system, choose those that one
1491 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1493 config CPU_MIPS32_R5
1494 bool "MIPS32 Release 5"
1495 depends on SYS_HAS_CPU_MIPS32_R5
1496 select CPU_HAS_PREFETCH
1497 select CPU_SUPPORTS_32BIT_KERNEL
1498 select CPU_SUPPORTS_HIGHMEM
1499 select CPU_SUPPORTS_MSA
1501 select MIPS_O32_FP64_SUPPORT
1503 Choose this option to build a kernel for release 5 or later of the
1504 MIPS32 architecture. New MIPS processors, starting with the Warrior
1505 family, are based on a MIPS32r5 processor. If you own an older
1506 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1508 config CPU_MIPS32_R6
1509 bool "MIPS32 Release 6"
1510 depends on SYS_HAS_CPU_MIPS32_R6
1511 select CPU_HAS_PREFETCH
1512 select CPU_NO_LOAD_STORE_LR
1513 select CPU_SUPPORTS_32BIT_KERNEL
1514 select CPU_SUPPORTS_HIGHMEM
1515 select CPU_SUPPORTS_MSA
1517 select MIPS_O32_FP64_SUPPORT
1519 Choose this option to build a kernel for release 6 or later of the
1520 MIPS32 architecture. New MIPS processors, starting with the Warrior
1521 family, are based on a MIPS32r6 processor. If you own an older
1522 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1524 config CPU_MIPS64_R1
1525 bool "MIPS64 Release 1"
1526 depends on SYS_HAS_CPU_MIPS64_R1
1527 select CPU_HAS_PREFETCH
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_64BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_HUGEPAGES
1533 Choose this option to build a kernel for release 1 or later of the
1534 MIPS64 architecture. Many modern embedded systems with a 64-bit
1535 MIPS processor are based on a MIPS64 processor. If you know the
1536 specific type of processor in your system, choose those that one
1537 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1538 Release 2 of the MIPS64 architecture is available since several
1539 years so chances are you even have a MIPS64 Release 2 processor
1540 in which case you should choose CPU_MIPS64_R2 instead for better
1543 config CPU_MIPS64_R2
1544 bool "MIPS64 Release 2"
1545 depends on SYS_HAS_CPU_MIPS64_R2
1546 select CPU_HAS_PREFETCH
1547 select CPU_SUPPORTS_32BIT_KERNEL
1548 select CPU_SUPPORTS_64BIT_KERNEL
1549 select CPU_SUPPORTS_HIGHMEM
1550 select CPU_SUPPORTS_HUGEPAGES
1551 select CPU_SUPPORTS_MSA
1554 Choose this option to build a kernel for release 2 or later of the
1555 MIPS64 architecture. Many modern embedded systems with a 64-bit
1556 MIPS processor are based on a MIPS64 processor. If you know the
1557 specific type of processor in your system, choose those that one
1558 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1560 config CPU_MIPS64_R5
1561 bool "MIPS64 Release 5"
1562 depends on SYS_HAS_CPU_MIPS64_R5
1563 select CPU_HAS_PREFETCH
1564 select CPU_SUPPORTS_32BIT_KERNEL
1565 select CPU_SUPPORTS_64BIT_KERNEL
1566 select CPU_SUPPORTS_HIGHMEM
1567 select CPU_SUPPORTS_HUGEPAGES
1568 select CPU_SUPPORTS_MSA
1569 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1572 Choose this option to build a kernel for release 5 or later of the
1573 MIPS64 architecture. This is a intermediate MIPS architecture
1574 release partly implementing release 6 features. Though there is no
1575 any hardware known to be based on this release.
1577 config CPU_MIPS64_R6
1578 bool "MIPS64 Release 6"
1579 depends on SYS_HAS_CPU_MIPS64_R6
1580 select CPU_HAS_PREFETCH
1581 select CPU_NO_LOAD_STORE_LR
1582 select CPU_SUPPORTS_32BIT_KERNEL
1583 select CPU_SUPPORTS_64BIT_KERNEL
1584 select CPU_SUPPORTS_HIGHMEM
1585 select CPU_SUPPORTS_HUGEPAGES
1586 select CPU_SUPPORTS_MSA
1587 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1590 Choose this option to build a kernel for release 6 or later of the
1591 MIPS64 architecture. New MIPS processors, starting with the Warrior
1592 family, are based on a MIPS64r6 processor. If you own an older
1593 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1596 bool "MIPS Warrior P5600"
1597 depends on SYS_HAS_CPU_P5600
1598 select CPU_HAS_PREFETCH
1599 select CPU_SUPPORTS_32BIT_KERNEL
1600 select CPU_SUPPORTS_HIGHMEM
1601 select CPU_SUPPORTS_MSA
1602 select CPU_SUPPORTS_CPUFREQ
1603 select CPU_MIPSR2_IRQ_VI
1604 select CPU_MIPSR2_IRQ_EI
1606 select MIPS_O32_FP64_SUPPORT
1608 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1609 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1610 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1611 level features like up to six P5600 calculation cores, CM2 with L2
1612 cache, IOCU/IOMMU (though might be unused depending on the system-
1613 specific IP core configuration), GIC, CPC, virtualisation module,
1618 depends on SYS_HAS_CPU_R3000
1621 select CPU_SUPPORTS_32BIT_KERNEL
1622 select CPU_SUPPORTS_HIGHMEM
1624 Please make sure to pick the right CPU type. Linux/MIPS is not
1625 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1626 *not* work on R4000 machines and vice versa. However, since most
1627 of the supported machines have an R4000 (or similar) CPU, R4x00
1628 might be a safe bet. If the resulting kernel does not work,
1629 try to recompile with R3000.
1633 depends on SYS_HAS_CPU_TX39XX
1634 select CPU_SUPPORTS_32BIT_KERNEL
1639 depends on SYS_HAS_CPU_VR41XX
1640 select CPU_SUPPORTS_32BIT_KERNEL
1641 select CPU_SUPPORTS_64BIT_KERNEL
1643 The options selects support for the NEC VR4100 series of processors.
1644 Only choose this option if you have one of these processors as a
1645 kernel built with this option will not run on any other type of
1646 processor or vice versa.
1650 depends on SYS_HAS_CPU_R4X00
1651 select CPU_SUPPORTS_32BIT_KERNEL
1652 select CPU_SUPPORTS_64BIT_KERNEL
1653 select CPU_SUPPORTS_HUGEPAGES
1655 MIPS Technologies R4000-series processors other than 4300, including
1656 the R4000, R4400, R4600, and 4700.
1660 depends on SYS_HAS_CPU_TX49XX
1661 select CPU_HAS_PREFETCH
1662 select CPU_SUPPORTS_32BIT_KERNEL
1663 select CPU_SUPPORTS_64BIT_KERNEL
1664 select CPU_SUPPORTS_HUGEPAGES
1668 depends on SYS_HAS_CPU_R5000
1669 select CPU_SUPPORTS_32BIT_KERNEL
1670 select CPU_SUPPORTS_64BIT_KERNEL
1671 select CPU_SUPPORTS_HUGEPAGES
1673 MIPS Technologies R5000-series processors other than the Nevada.
1677 depends on SYS_HAS_CPU_R5500
1678 select CPU_SUPPORTS_32BIT_KERNEL
1679 select CPU_SUPPORTS_64BIT_KERNEL
1680 select CPU_SUPPORTS_HUGEPAGES
1682 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1687 depends on SYS_HAS_CPU_NEVADA
1688 select CPU_SUPPORTS_32BIT_KERNEL
1689 select CPU_SUPPORTS_64BIT_KERNEL
1690 select CPU_SUPPORTS_HUGEPAGES
1692 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1696 depends on SYS_HAS_CPU_R10000
1697 select CPU_HAS_PREFETCH
1698 select CPU_SUPPORTS_32BIT_KERNEL
1699 select CPU_SUPPORTS_64BIT_KERNEL
1700 select CPU_SUPPORTS_HIGHMEM
1701 select CPU_SUPPORTS_HUGEPAGES
1703 MIPS Technologies R10000-series processors.
1707 depends on SYS_HAS_CPU_RM7000
1708 select CPU_HAS_PREFETCH
1709 select CPU_SUPPORTS_32BIT_KERNEL
1710 select CPU_SUPPORTS_64BIT_KERNEL
1711 select CPU_SUPPORTS_HIGHMEM
1712 select CPU_SUPPORTS_HUGEPAGES
1716 depends on SYS_HAS_CPU_SB1
1717 select CPU_SUPPORTS_32BIT_KERNEL
1718 select CPU_SUPPORTS_64BIT_KERNEL
1719 select CPU_SUPPORTS_HIGHMEM
1720 select CPU_SUPPORTS_HUGEPAGES
1721 select WEAK_ORDERING
1723 config CPU_CAVIUM_OCTEON
1724 bool "Cavium Octeon processor"
1725 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1726 select CPU_HAS_PREFETCH
1727 select CPU_SUPPORTS_64BIT_KERNEL
1728 select WEAK_ORDERING
1729 select CPU_SUPPORTS_HIGHMEM
1730 select CPU_SUPPORTS_HUGEPAGES
1731 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1732 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1733 select MIPS_L1_CACHE_SHIFT_7
1736 The Cavium Octeon processor is a highly integrated chip containing
1737 many ethernet hardware widgets for networking tasks. The processor
1738 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1739 Full details can be found at http://www.caviumnetworks.com.
1742 bool "Broadcom BMIPS"
1743 depends on SYS_HAS_CPU_BMIPS
1745 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1746 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1747 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1748 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1749 select CPU_SUPPORTS_32BIT_KERNEL
1750 select DMA_NONCOHERENT
1752 select SWAP_IO_SPACE
1753 select WEAK_ORDERING
1754 select CPU_SUPPORTS_HIGHMEM
1755 select CPU_HAS_PREFETCH
1756 select CPU_SUPPORTS_CPUFREQ
1757 select MIPS_EXTERNAL_TIMER
1759 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1762 bool "Netlogic XLR SoC"
1763 depends on SYS_HAS_CPU_XLR
1764 select CPU_SUPPORTS_32BIT_KERNEL
1765 select CPU_SUPPORTS_64BIT_KERNEL
1766 select CPU_SUPPORTS_HIGHMEM
1767 select CPU_SUPPORTS_HUGEPAGES
1768 select WEAK_ORDERING
1769 select WEAK_REORDERING_BEYOND_LLSC
1771 Netlogic Microsystems XLR/XLS processors.
1774 bool "Netlogic XLP SoC"
1775 depends on SYS_HAS_CPU_XLP
1776 select CPU_SUPPORTS_32BIT_KERNEL
1777 select CPU_SUPPORTS_64BIT_KERNEL
1778 select CPU_SUPPORTS_HIGHMEM
1779 select WEAK_ORDERING
1780 select WEAK_REORDERING_BEYOND_LLSC
1781 select CPU_HAS_PREFETCH
1783 select CPU_SUPPORTS_HUGEPAGES
1784 select MIPS_ASID_BITS_VARIABLE
1786 Netlogic Microsystems XLP processors.
1789 config CPU_MIPS32_3_5_FEATURES
1790 bool "MIPS32 Release 3.5 Features"
1791 depends on SYS_HAS_CPU_MIPS32_R3_5
1792 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1795 Choose this option to build a kernel for release 2 or later of the
1796 MIPS32 architecture including features from the 3.5 release such as
1797 support for Enhanced Virtual Addressing (EVA).
1799 config CPU_MIPS32_3_5_EVA
1800 bool "Enhanced Virtual Addressing (EVA)"
1801 depends on CPU_MIPS32_3_5_FEATURES
1805 Choose this option if you want to enable the Enhanced Virtual
1806 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1807 One of its primary benefits is an increase in the maximum size
1808 of lowmem (up to 3GB). If unsure, say 'N' here.
1810 config CPU_MIPS32_R5_FEATURES
1811 bool "MIPS32 Release 5 Features"
1812 depends on SYS_HAS_CPU_MIPS32_R5
1813 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1815 Choose this option to build a kernel for release 2 or later of the
1816 MIPS32 architecture including features from release 5 such as
1817 support for Extended Physical Addressing (XPA).
1819 config CPU_MIPS32_R5_XPA
1820 bool "Extended Physical Addressing (XPA)"
1821 depends on CPU_MIPS32_R5_FEATURES
1823 depends on !PAGE_SIZE_4KB
1824 depends on SYS_SUPPORTS_HIGHMEM
1827 select PHYS_ADDR_T_64BIT
1830 Choose this option if you want to enable the Extended Physical
1831 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1832 benefit is to increase physical addressing equal to or greater
1833 than 40 bits. Note that this has the side effect of turning on
1834 64-bit addressing which in turn makes the PTEs 64-bit in size.
1835 If unsure, say 'N' here.
1838 config CPU_NOP_WORKAROUNDS
1841 config CPU_JUMP_WORKAROUNDS
1844 config CPU_LOONGSON2F_WORKAROUNDS
1845 bool "Loongson 2F Workarounds"
1847 select CPU_NOP_WORKAROUNDS
1848 select CPU_JUMP_WORKAROUNDS
1850 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1851 require workarounds. Without workarounds the system may hang
1852 unexpectedly. For more information please refer to the gas
1853 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1855 Loongson 2F03 and later have fixed these issues and no workarounds
1856 are needed. The workarounds have no significant side effect on them
1857 but may decrease the performance of the system so this option should
1858 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1861 If unsure, please say Y.
1862 endif # CPU_LOONGSON2F
1864 config SYS_SUPPORTS_ZBOOT
1866 select HAVE_KERNEL_GZIP
1867 select HAVE_KERNEL_BZIP2
1868 select HAVE_KERNEL_LZ4
1869 select HAVE_KERNEL_LZMA
1870 select HAVE_KERNEL_LZO
1871 select HAVE_KERNEL_XZ
1872 select HAVE_KERNEL_ZSTD
1874 config SYS_SUPPORTS_ZBOOT_UART16550
1876 select SYS_SUPPORTS_ZBOOT
1878 config SYS_SUPPORTS_ZBOOT_UART_PROM
1880 select SYS_SUPPORTS_ZBOOT
1882 config CPU_LOONGSON2EF
1884 select CPU_SUPPORTS_32BIT_KERNEL
1885 select CPU_SUPPORTS_64BIT_KERNEL
1886 select CPU_SUPPORTS_HIGHMEM
1887 select CPU_SUPPORTS_HUGEPAGES
1888 select ARCH_HAS_PHYS_TO_DMA
1890 config CPU_LOONGSON32
1894 select CPU_HAS_PREFETCH
1895 select CPU_SUPPORTS_32BIT_KERNEL
1896 select CPU_SUPPORTS_HIGHMEM
1897 select CPU_SUPPORTS_CPUFREQ
1899 config CPU_BMIPS32_3300
1900 select SMP_UP if SMP
1903 config CPU_BMIPS4350
1905 select SYS_SUPPORTS_SMP
1906 select SYS_SUPPORTS_HOTPLUG_CPU
1908 config CPU_BMIPS4380
1910 select MIPS_L1_CACHE_SHIFT_6
1911 select SYS_SUPPORTS_SMP
1912 select SYS_SUPPORTS_HOTPLUG_CPU
1915 config CPU_BMIPS5000
1917 select MIPS_CPU_SCACHE
1918 select MIPS_L1_CACHE_SHIFT_7
1919 select SYS_SUPPORTS_SMP
1920 select SYS_SUPPORTS_HOTPLUG_CPU
1923 config SYS_HAS_CPU_LOONGSON64
1925 select CPU_SUPPORTS_CPUFREQ
1928 config SYS_HAS_CPU_LOONGSON2E
1931 config SYS_HAS_CPU_LOONGSON2F
1933 select CPU_SUPPORTS_CPUFREQ
1934 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1936 config SYS_HAS_CPU_LOONGSON1B
1939 config SYS_HAS_CPU_LOONGSON1C
1942 config SYS_HAS_CPU_MIPS32_R1
1945 config SYS_HAS_CPU_MIPS32_R2
1948 config SYS_HAS_CPU_MIPS32_R3_5
1951 config SYS_HAS_CPU_MIPS32_R5
1953 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1955 config SYS_HAS_CPU_MIPS32_R6
1957 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1959 config SYS_HAS_CPU_MIPS64_R1
1962 config SYS_HAS_CPU_MIPS64_R2
1965 config SYS_HAS_CPU_MIPS64_R6
1967 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1969 config SYS_HAS_CPU_P5600
1971 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1973 config SYS_HAS_CPU_R3000
1976 config SYS_HAS_CPU_TX39XX
1979 config SYS_HAS_CPU_VR41XX
1982 config SYS_HAS_CPU_R4X00
1985 config SYS_HAS_CPU_TX49XX
1988 config SYS_HAS_CPU_R5000
1991 config SYS_HAS_CPU_R5500
1994 config SYS_HAS_CPU_NEVADA
1997 config SYS_HAS_CPU_R10000
1999 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2001 config SYS_HAS_CPU_RM7000
2004 config SYS_HAS_CPU_SB1
2007 config SYS_HAS_CPU_CAVIUM_OCTEON
2010 config SYS_HAS_CPU_BMIPS
2013 config SYS_HAS_CPU_BMIPS32_3300
2015 select SYS_HAS_CPU_BMIPS
2017 config SYS_HAS_CPU_BMIPS4350
2019 select SYS_HAS_CPU_BMIPS
2021 config SYS_HAS_CPU_BMIPS4380
2023 select SYS_HAS_CPU_BMIPS
2025 config SYS_HAS_CPU_BMIPS5000
2027 select SYS_HAS_CPU_BMIPS
2028 select ARCH_HAS_SYNC_DMA_FOR_CPU
2030 config SYS_HAS_CPU_XLR
2033 config SYS_HAS_CPU_XLP
2037 # CPU may reorder R->R, R->W, W->R, W->W
2038 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2040 config WEAK_ORDERING
2044 # CPU may reorder reads and writes beyond LL/SC
2045 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2047 config WEAK_REORDERING_BEYOND_LLSC
2052 # These two indicate any level of the MIPS32 and MIPS64 architecture
2056 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2057 CPU_MIPS32_R6 || CPU_P5600
2061 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2065 # These indicate the revision of the architecture
2069 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2073 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2075 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2080 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2082 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2087 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2089 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2090 select HAVE_ARCH_BITREVERSE
2091 select MIPS_ASID_BITS_VARIABLE
2092 select MIPS_CRC_SUPPORT
2095 config TARGET_ISA_REV
2097 default 1 if CPU_MIPSR1
2098 default 2 if CPU_MIPSR2
2099 default 5 if CPU_MIPSR5
2100 default 6 if CPU_MIPSR6
2103 Reflects the ISA revision being targeted by the kernel build. This
2104 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2112 config SYS_SUPPORTS_32BIT_KERNEL
2114 config SYS_SUPPORTS_64BIT_KERNEL
2116 config CPU_SUPPORTS_32BIT_KERNEL
2118 config CPU_SUPPORTS_64BIT_KERNEL
2120 config CPU_SUPPORTS_CPUFREQ
2122 config CPU_SUPPORTS_ADDRWINCFG
2124 config CPU_SUPPORTS_HUGEPAGES
2126 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2127 config MIPS_PGD_C0_CONTEXT
2129 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2132 # Set to y for ptrace access to watch registers.
2134 config HARDWARE_WATCHPOINTS
2136 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2141 prompt "Kernel code model"
2143 You should only select this option if you have a workload that
2144 actually benefits from 64-bit processing or if your machine has
2145 large memory. You will only be presented a single option in this
2146 menu if your system does not support both 32-bit and 64-bit kernels.
2149 bool "32-bit kernel"
2150 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2153 Select this option if you want to build a 32-bit kernel.
2156 bool "64-bit kernel"
2157 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2159 Select this option if you want to build a 64-bit kernel.
2164 bool "KVM Guest Kernel"
2165 depends on CPU_MIPS32_R2
2166 depends on BROKEN_ON_SMP
2168 Select this option if building a guest kernel for KVM (Trap & Emulate)
2171 config KVM_GUEST_TIMER_FREQ
2172 int "Count/Compare Timer Frequency (MHz)"
2173 depends on KVM_GUEST
2176 Set this to non-zero if building a guest kernel for KVM to skip RTC
2177 emulation when determining guest CPU Frequency. Instead, the guest's
2178 timer frequency is specified directly.
2180 config MIPS_VA_BITS_48
2181 bool "48 bits virtual memory"
2184 Support a maximum at least 48 bits of application virtual
2185 memory. Default is 40 bits or less, depending on the CPU.
2186 For page sizes 16k and above, this option results in a small
2187 memory overhead for page tables. For 4k page size, a fourth
2188 level of page tables is added which imposes both a memory
2189 overhead as well as slower TLB fault handling.
2194 prompt "Kernel page size"
2195 default PAGE_SIZE_4KB
2197 config PAGE_SIZE_4KB
2199 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2201 This option select the standard 4kB Linux page size. On some
2202 R3000-family processors this is the only available page size. Using
2203 4kB page size will minimize memory consumption and is therefore
2204 recommended for low memory systems.
2206 config PAGE_SIZE_8KB
2208 depends on CPU_CAVIUM_OCTEON
2209 depends on !MIPS_VA_BITS_48
2211 Using 8kB page size will result in higher performance kernel at
2212 the price of higher memory consumption. This option is available
2213 only on cnMIPS processors. Note that you will need a suitable Linux
2214 distribution to support this.
2216 config PAGE_SIZE_16KB
2218 depends on !CPU_R3000 && !CPU_TX39XX
2220 Using 16kB page size will result in higher performance kernel at
2221 the price of higher memory consumption. This option is available on
2222 all non-R3000 family processors. Note that you will need a suitable
2223 Linux distribution to support this.
2225 config PAGE_SIZE_32KB
2227 depends on CPU_CAVIUM_OCTEON
2228 depends on !MIPS_VA_BITS_48
2230 Using 32kB page size will result in higher performance kernel at
2231 the price of higher memory consumption. This option is available
2232 only on cnMIPS cores. Note that you will need a suitable Linux
2233 distribution to support this.
2235 config PAGE_SIZE_64KB
2237 depends on !CPU_R3000 && !CPU_TX39XX
2239 Using 64kB page size will result in higher performance kernel at
2240 the price of higher memory consumption. This option is available on
2241 all non-R3000 family processor. Not that at the time of this
2242 writing this option is still high experimental.
2246 config FORCE_MAX_ZONEORDER
2247 int "Maximum zone order"
2248 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2249 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2250 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2251 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2252 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2253 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2257 The kernel memory allocator divides physically contiguous memory
2258 blocks into "zones", where each zone is a power of two number of
2259 pages. This option selects the largest power of two that the kernel
2260 keeps in the memory allocator. If you need to allocate very large
2261 blocks of physically contiguous memory, then you may need to
2262 increase this value.
2264 This config option is actually maximum order plus one. For example,
2265 a value of 11 means that the largest free memory block is 2^10 pages.
2267 The page size is not necessarily 4KB. Keep this in mind
2268 when choosing a value for this option.
2273 config IP22_CPU_SCACHE
2278 # Support for a MIPS32 / MIPS64 style S-caches
2280 config MIPS_CPU_SCACHE
2284 config R5000_CPU_SCACHE
2288 config RM7000_CPU_SCACHE
2292 config SIBYTE_DMA_PAGEOPS
2293 bool "Use DMA to clear/copy pages"
2296 Instead of using the CPU to zero and copy pages, use a Data Mover
2297 channel. These DMA channels are otherwise unused by the standard
2298 SiByte Linux port. Seems to give a small performance benefit.
2300 config CPU_HAS_PREFETCH
2303 config CPU_GENERIC_DUMP_TLB
2305 default y if !(CPU_R3000 || CPU_TX39XX)
2307 config MIPS_FP_SUPPORT
2308 bool "Floating Point support" if EXPERT
2311 Select y to include support for floating point in the kernel
2312 including initialization of FPU hardware, FP context save & restore
2313 and emulation of an FPU where necessary. Without this support any
2314 userland program attempting to use floating point instructions will
2317 If you know that your userland will not attempt to use floating point
2318 instructions then you can say n here to shrink the kernel a little.
2322 config CPU_R2300_FPU
2324 depends on MIPS_FP_SUPPORT
2325 default y if CPU_R3000 || CPU_TX39XX
2332 depends on MIPS_FP_SUPPORT
2333 default y if !CPU_R2300_FPU
2335 config CPU_R4K_CACHE_TLB
2337 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2340 bool "MIPS MT SMP support (1 TC on each available VPE)"
2342 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2343 select CPU_MIPSR2_IRQ_VI
2344 select CPU_MIPSR2_IRQ_EI
2349 select SYS_SUPPORTS_SMP
2350 select SYS_SUPPORTS_SCHED_SMT
2351 select MIPS_PERF_SHARED_TC_COUNTERS
2353 This is a kernel model which is known as SMVP. This is supported
2354 on cores with the MT ASE and uses the available VPEs to implement
2355 virtual processors which supports SMP. This is equivalent to the
2356 Intel Hyperthreading feature. For further information go to
2357 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2363 bool "SMT (multithreading) scheduler support"
2364 depends on SYS_SUPPORTS_SCHED_SMT
2367 SMT scheduler support improves the CPU scheduler's decision making
2368 when dealing with MIPS MT enabled cores at a cost of slightly
2369 increased overhead in some places. If unsure say N here.
2371 config SYS_SUPPORTS_SCHED_SMT
2374 config SYS_SUPPORTS_MULTITHREADING
2377 config MIPS_MT_FPAFF
2378 bool "Dynamic FPU affinity for FP-intensive threads"
2380 depends on MIPS_MT_SMP
2382 config MIPSR2_TO_R6_EMULATOR
2383 bool "MIPS R2-to-R6 emulator"
2384 depends on CPU_MIPSR6
2385 depends on MIPS_FP_SUPPORT
2388 Choose this option if you want to run non-R6 MIPS userland code.
2389 Even if you say 'Y' here, the emulator will still be disabled by
2390 default. You can enable it using the 'mipsr2emu' kernel option.
2391 The only reason this is a build-time option is to save ~14K from the
2394 config SYS_SUPPORTS_VPE_LOADER
2396 depends on SYS_SUPPORTS_MULTITHREADING
2398 Indicates that the platform supports the VPE loader, and provides
2401 config MIPS_VPE_LOADER
2402 bool "VPE loader support."
2403 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2404 select CPU_MIPSR2_IRQ_VI
2405 select CPU_MIPSR2_IRQ_EI
2408 Includes a loader for loading an elf relocatable object
2409 onto another VPE and running it.
2411 config MIPS_VPE_LOADER_CMP
2414 depends on MIPS_VPE_LOADER && MIPS_CMP
2416 config MIPS_VPE_LOADER_MT
2419 depends on MIPS_VPE_LOADER && !MIPS_CMP
2421 config MIPS_VPE_LOADER_TOM
2422 bool "Load VPE program into memory hidden from linux"
2423 depends on MIPS_VPE_LOADER
2426 The loader can use memory that is present but has been hidden from
2427 Linux using the kernel command line option "mem=xxMB". It's up to
2428 you to ensure the amount you put in the option and the space your
2429 program requires is less or equal to the amount physically present.
2431 config MIPS_VPE_APSP_API
2432 bool "Enable support for AP/SP API (RTLX)"
2433 depends on MIPS_VPE_LOADER
2435 config MIPS_VPE_APSP_API_CMP
2438 depends on MIPS_VPE_APSP_API && MIPS_CMP
2440 config MIPS_VPE_APSP_API_MT
2443 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2446 bool "MIPS CMP framework support (DEPRECATED)"
2447 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2450 select SYS_SUPPORTS_SMP
2451 select WEAK_ORDERING
2454 Select this if you are using a bootloader which implements the "CMP
2455 framework" protocol (ie. YAMON) and want your kernel to make use of
2456 its ability to start secondary CPUs.
2458 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2462 bool "MIPS Coherent Processing System support"
2463 depends on SYS_SUPPORTS_MIPS_CPS
2465 select MIPS_CPS_PM if HOTPLUG_CPU
2467 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2468 select SYS_SUPPORTS_HOTPLUG_CPU
2469 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2470 select SYS_SUPPORTS_SMP
2471 select WEAK_ORDERING
2473 Select this if you wish to run an SMP kernel across multiple cores
2474 within a MIPS Coherent Processing System. When this option is
2475 enabled the kernel will probe for other cores and boot them with
2476 no external assistance. It is safe to enable this when hardware
2477 support is unavailable.
2490 config SB1_PASS_2_WORKAROUNDS
2492 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2495 config SB1_PASS_2_1_WORKAROUNDS
2497 depends on CPU_SB1 && CPU_SB1_PASS_2
2501 prompt "SmartMIPS or microMIPS ASE support"
2503 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2506 Select this if you want neither microMIPS nor SmartMIPS support
2508 config CPU_HAS_SMARTMIPS
2509 depends on SYS_SUPPORTS_SMARTMIPS
2512 SmartMIPS is a extension of the MIPS32 architecture aimed at
2513 increased security at both hardware and software level for
2514 smartcards. Enabling this option will allow proper use of the
2515 SmartMIPS instructions by Linux applications. However a kernel with
2516 this option will not work on a MIPS core without SmartMIPS core. If
2517 you don't know you probably don't have SmartMIPS and should say N
2520 config CPU_MICROMIPS
2521 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2524 When this option is enabled the kernel will be built using the
2530 bool "Support for the MIPS SIMD Architecture"
2531 depends on CPU_SUPPORTS_MSA
2532 depends on MIPS_FP_SUPPORT
2533 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2535 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2536 and a set of SIMD instructions to operate on them. When this option
2537 is enabled the kernel will support allocating & switching MSA
2538 vector register contexts. If you know that your kernel will only be
2539 running on CPUs which do not support MSA or that your userland will
2540 not be making use of it then you may wish to say N here to reduce
2541 the size & complexity of your kernel.
2552 depends on !CPU_DIEI_BROKEN
2555 config CPU_DIEI_BROKEN
2561 config CPU_NO_LOAD_STORE_LR
2564 CPU lacks support for unaligned load and store instructions:
2565 LWL, LWR, SWL, SWR (Load/store word left/right).
2566 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2570 # Vectored interrupt mode is an R2 feature
2572 config CPU_MIPSR2_IRQ_VI
2576 # Extended interrupt mode is an R2 feature
2578 config CPU_MIPSR2_IRQ_EI
2583 depends on !CPU_R3000
2589 config CPU_DADDI_WORKAROUNDS
2592 config CPU_R4000_WORKAROUNDS
2594 select CPU_R4400_WORKAROUNDS
2596 config CPU_R4400_WORKAROUNDS
2599 config CPU_R4X00_BUGS64
2601 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2603 config MIPS_ASID_SHIFT
2605 default 6 if CPU_R3000 || CPU_TX39XX
2608 config MIPS_ASID_BITS
2610 default 0 if MIPS_ASID_BITS_VARIABLE
2611 default 6 if CPU_R3000 || CPU_TX39XX
2614 config MIPS_ASID_BITS_VARIABLE
2617 config MIPS_CRC_SUPPORT
2620 # R4600 erratum. Due to the lack of errata information the exact
2621 # technical details aren't known. I've experimentally found that disabling
2622 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2624 config WAR_R4600_V1_INDEX_ICACHEOP
2627 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2629 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2630 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2631 # executed if there is no other dcache activity. If the dcache is
2632 # accessed for another instruction immeidately preceding when these
2633 # cache instructions are executing, it is possible that the dcache
2634 # tag match outputs used by these cache instructions will be
2635 # incorrect. These cache instructions should be preceded by at least
2636 # four instructions that are not any kind of load or store
2639 # This is not allowed: lw
2643 # cache Hit_Writeback_Invalidate_D
2645 # This is allowed: lw
2650 # cache Hit_Writeback_Invalidate_D
2651 config WAR_R4600_V1_HIT_CACHEOP
2654 # Writeback and invalidate the primary cache dcache before DMA.
2656 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2657 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2658 # operate correctly if the internal data cache refill buffer is empty. These
2659 # CACHE instructions should be separated from any potential data cache miss
2660 # by a load instruction to an uncached address to empty the response buffer."
2661 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2663 config WAR_R4600_V2_HIT_CACHEOP
2666 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2667 # the line which this instruction itself exists, the following
2668 # operation is not guaranteed."
2670 # Workaround: do two phase flushing for Index_Invalidate_I
2671 config WAR_TX49XX_ICACHE_INDEX_INV
2674 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2675 # opposes it being called that) where invalid instructions in the same
2676 # I-cache line worth of instructions being fetched may case spurious
2678 config WAR_ICACHE_REFILLS
2681 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2682 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2683 config WAR_R10000_LLSC
2686 # 34K core erratum: "Problems Executing the TLBR Instruction"
2687 config WAR_MIPS34K_MISSED_ITLB
2691 # - Highmem only makes sense for the 32-bit kernel.
2692 # - The current highmem code will only work properly on physically indexed
2693 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2694 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2695 # moment we protect the user and offer the highmem option only on machines
2696 # where it's known to be safe. This will not offer highmem on a few systems
2697 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2698 # indexed CPUs but we're playing safe.
2699 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2700 # know they might have memory configurations that could make use of highmem
2704 bool "High Memory Support"
2705 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2707 config CPU_SUPPORTS_HIGHMEM
2710 config SYS_SUPPORTS_HIGHMEM
2713 config SYS_SUPPORTS_SMARTMIPS
2716 config SYS_SUPPORTS_MICROMIPS
2719 config SYS_SUPPORTS_MIPS16
2722 This option must be set if a kernel might be executed on a MIPS16-
2723 enabled CPU even if MIPS16 is not actually being used. In other
2724 words, it makes the kernel MIPS16-tolerant.
2726 config CPU_SUPPORTS_MSA
2729 config ARCH_FLATMEM_ENABLE
2731 depends on !NUMA && !CPU_LOONGSON2EF
2733 config ARCH_SPARSEMEM_ENABLE
2735 select SPARSEMEM_STATIC if !SGI_IP27
2739 depends on SYS_SUPPORTS_NUMA
2741 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2742 Access). This option improves performance on systems with more
2743 than two nodes; on two node systems it is generally better to
2744 leave it disabled; on single node systems leave this option
2747 config SYS_SUPPORTS_NUMA
2750 config HAVE_SETUP_PER_CPU_AREA
2754 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2759 bool "Relocatable kernel"
2760 depends on SYS_SUPPORTS_RELOCATABLE
2761 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2762 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2763 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2764 CPU_P5600 || CAVIUM_OCTEON_SOC
2766 This builds a kernel image that retains relocation information
2767 so it can be loaded someplace besides the default 1MB.
2768 The relocations make the kernel binary about 15% larger,
2769 but are discarded at runtime
2771 config RELOCATION_TABLE_SIZE
2772 hex "Relocation table size"
2773 depends on RELOCATABLE
2774 range 0x0 0x01000000
2775 default "0x00100000"
2777 A table of relocation data will be appended to the kernel binary
2778 and parsed at boot to fix up the relocated kernel.
2780 This option allows the amount of space reserved for the table to be
2781 adjusted, although the default of 1Mb should be ok in most cases.
2783 The build will fail and a valid size suggested if this is too small.
2785 If unsure, leave at the default value.
2787 config RANDOMIZE_BASE
2788 bool "Randomize the address of the kernel image"
2789 depends on RELOCATABLE
2791 Randomizes the physical and virtual address at which the
2792 kernel image is loaded, as a security feature that
2793 deters exploit attempts relying on knowledge of the location
2794 of kernel internals.
2796 Entropy is generated using any coprocessor 0 registers available.
2798 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2802 config RANDOMIZE_BASE_MAX_OFFSET
2803 hex "Maximum kASLR offset" if EXPERT
2804 depends on RANDOMIZE_BASE
2805 range 0x0 0x40000000 if EVA || 64BIT
2806 range 0x0 0x08000000
2807 default "0x01000000"
2809 When kASLR is active, this provides the maximum offset that will
2810 be applied to the kernel image. It should be set according to the
2811 amount of physical RAM available in the target system minus
2812 PHYSICAL_START and must be a power of 2.
2814 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2815 EVA or 64-bit. The default is 16Mb.
2820 depends on NEED_MULTIPLE_NODES
2822 config HW_PERF_EVENTS
2823 bool "Enable hardware performance counter support for perf events"
2824 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2827 Enable hardware performance counter support for perf events. If
2828 disabled, perf events will use software events only.
2831 bool "Enable DMI scanning"
2832 depends on MACH_LOONGSON64
2833 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2836 Enabled scanning of DMI to identify machine quirks. Say Y
2837 here unless you have verified that your setup is not
2838 affected by entries in the DMI blacklist. Required by PNP
2842 bool "Multi-Processing support"
2843 depends on SYS_SUPPORTS_SMP
2845 This enables support for systems with more than one CPU. If you have
2846 a system with only one CPU, say N. If you have a system with more
2847 than one CPU, say Y.
2849 If you say N here, the kernel will run on uni- and multiprocessor
2850 machines, but will use only one CPU of a multiprocessor machine. If
2851 you say Y here, the kernel will run on many, but not all,
2852 uniprocessor machines. On a uniprocessor machine, the kernel
2853 will run faster if you say N here.
2855 People using multiprocessor machines who say Y here should also say
2856 Y to "Enhanced Real Time Clock Support", below.
2858 See also the SMP-HOWTO available at
2859 <https://www.tldp.org/docs.html#howto>.
2861 If you don't know what to do here, say N.
2864 bool "Support for hot-pluggable CPUs"
2865 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2867 Say Y here to allow turning CPUs off and on. CPUs can be
2868 controlled through /sys/devices/system/cpu.
2869 (Note: power management support will enable this option
2870 automatically on SMP systems. )
2871 Say N if you want to disable CPU hotplug.
2876 config SYS_SUPPORTS_MIPS_CMP
2879 config SYS_SUPPORTS_MIPS_CPS
2882 config SYS_SUPPORTS_SMP
2885 config NR_CPUS_DEFAULT_4
2888 config NR_CPUS_DEFAULT_8
2891 config NR_CPUS_DEFAULT_16
2894 config NR_CPUS_DEFAULT_32
2897 config NR_CPUS_DEFAULT_64
2901 int "Maximum number of CPUs (2-256)"
2904 default "4" if NR_CPUS_DEFAULT_4
2905 default "8" if NR_CPUS_DEFAULT_8
2906 default "16" if NR_CPUS_DEFAULT_16
2907 default "32" if NR_CPUS_DEFAULT_32
2908 default "64" if NR_CPUS_DEFAULT_64
2910 This allows you to specify the maximum number of CPUs which this
2911 kernel will support. The maximum supported value is 32 for 32-bit
2912 kernel and 64 for 64-bit kernels; the minimum value which makes
2913 sense is 1 for Qemu (useful only for kernel debugging purposes)
2914 and 2 for all others.
2916 This is purely to save memory - each supported CPU adds
2917 approximately eight kilobytes to the kernel image. For best
2918 performance should round up your number of processors to the next
2921 config MIPS_PERF_SHARED_TC_COUNTERS
2924 config MIPS_NR_CPU_NR_MAP_1024
2927 config MIPS_NR_CPU_NR_MAP
2930 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2931 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2934 # Timer Interrupt Frequency Configuration
2938 prompt "Timer frequency"
2941 Allows the configuration of the timer frequency.
2944 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2947 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2950 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2953 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2956 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2959 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2962 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2965 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2969 config SYS_SUPPORTS_24HZ
2972 config SYS_SUPPORTS_48HZ
2975 config SYS_SUPPORTS_100HZ
2978 config SYS_SUPPORTS_128HZ
2981 config SYS_SUPPORTS_250HZ
2984 config SYS_SUPPORTS_256HZ
2987 config SYS_SUPPORTS_1000HZ
2990 config SYS_SUPPORTS_1024HZ
2993 config SYS_SUPPORTS_ARBIT_HZ
2995 default y if !SYS_SUPPORTS_24HZ && \
2996 !SYS_SUPPORTS_48HZ && \
2997 !SYS_SUPPORTS_100HZ && \
2998 !SYS_SUPPORTS_128HZ && \
2999 !SYS_SUPPORTS_250HZ && \
3000 !SYS_SUPPORTS_256HZ && \
3001 !SYS_SUPPORTS_1000HZ && \
3002 !SYS_SUPPORTS_1024HZ
3008 default 100 if HZ_100
3009 default 128 if HZ_128
3010 default 250 if HZ_250
3011 default 256 if HZ_256
3012 default 1000 if HZ_1000
3013 default 1024 if HZ_1024
3016 def_bool HIGH_RES_TIMERS
3019 bool "Kexec system call"
3022 kexec is a system call that implements the ability to shutdown your
3023 current kernel, and to start another kernel. It is like a reboot
3024 but it is independent of the system firmware. And like a reboot
3025 you can start any kernel with it, not just Linux.
3027 The name comes from the similarity to the exec system call.
3029 It is an ongoing process to be certain the hardware in a machine
3030 is properly shutdown, so do not be surprised if this code does not
3031 initially work for you. As of this writing the exact hardware
3032 interface is strongly in flux, so no good recommendation can be
3036 bool "Kernel crash dumps"
3038 Generate crash dump after being started by kexec.
3039 This should be normally only set in special crash dump kernels
3040 which are loaded in the main kernel with kexec-tools into
3041 a specially reserved region and then later executed after
3042 a crash by kdump/kexec. The crash dump kernel must be compiled
3043 to a memory address not used by the main kernel or firmware using
3046 config PHYSICAL_START
3047 hex "Physical address where the kernel is loaded"
3048 default "0xffffffff84000000"
3049 depends on CRASH_DUMP
3051 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3052 If you plan to use kernel for capturing the crash dump change
3053 this value to start of the reserved region (the "X" value as
3054 specified in the "crashkernel=YM@XM" command line boot parameter
3055 passed to the panic-ed kernel).
3058 bool "Enable seccomp to safely compute untrusted bytecode"
3062 This kernel feature is useful for number crunching applications
3063 that may need to compute untrusted bytecode during their
3064 execution. By using pipes or other transports made available to
3065 the process as file descriptors supporting the read/write
3066 syscalls, it's possible to isolate those applications in
3067 their own address space using seccomp. Once seccomp is
3068 enabled via /proc/<pid>/seccomp, it cannot be disabled
3069 and the task is only allowed to execute a few safe syscalls
3070 defined by each seccomp mode.
3072 If unsure, say Y. Only embedded should say N here.
3074 config MIPS_O32_FP64_SUPPORT
3075 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3076 depends on 32BIT || MIPS32_O32
3078 When this is enabled, the kernel will support use of 64-bit floating
3079 point registers with binaries using the O32 ABI along with the
3080 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3081 32-bit MIPS systems this support is at the cost of increasing the
3082 size and complexity of the compiled FPU emulator. Thus if you are
3083 running a MIPS32 system and know that none of your userland binaries
3084 will require 64-bit floating point, you may wish to reduce the size
3085 of your kernel & potentially improve FP emulation performance by
3088 Although binutils currently supports use of this flag the details
3089 concerning its effect upon the O32 ABI in userland are still being
3090 worked on. In order to avoid userland becoming dependant upon current
3091 behaviour before the details have been finalised, this option should
3092 be considered experimental and only enabled by those working upon
3100 select OF_EARLY_FLATTREE
3110 prompt "Kernel appended dtb support" if USE_OF
3111 default MIPS_NO_APPENDED_DTB
3113 config MIPS_NO_APPENDED_DTB
3116 Do not enable appended dtb support.
3118 config MIPS_ELF_APPENDED_DTB
3121 With this option, the boot code will look for a device tree binary
3122 DTB) included in the vmlinux ELF section .appended_dtb. By default
3123 it is empty and the DTB can be appended using binutils command
3126 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3128 This is meant as a backward compatiblity convenience for those
3129 systems with a bootloader that can't be upgraded to accommodate
3130 the documented boot protocol using a device tree.
3132 config MIPS_RAW_APPENDED_DTB
3133 bool "vmlinux.bin or vmlinuz.bin"
3135 With this option, the boot code will look for a device tree binary
3136 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3137 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3139 This is meant as a backward compatibility convenience for those
3140 systems with a bootloader that can't be upgraded to accommodate
3141 the documented boot protocol using a device tree.
3143 Beware that there is very little in terms of protection against
3144 this option being confused by leftover garbage in memory that might
3145 look like a DTB header after a reboot if no actual DTB is appended
3146 to vmlinux.bin. Do not leave this option active in a production kernel
3147 if you don't intend to always append a DTB.
3151 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3152 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3153 !MACH_LOONGSON64 && !MIPS_MALTA && \
3155 default MIPS_CMDLINE_FROM_BOOTLOADER
3157 config MIPS_CMDLINE_FROM_DTB
3159 bool "Dtb kernel arguments if available"
3161 config MIPS_CMDLINE_DTB_EXTEND
3163 bool "Extend dtb kernel arguments with bootloader arguments"
3165 config MIPS_CMDLINE_FROM_BOOTLOADER
3166 bool "Bootloader kernel arguments if available"
3168 config MIPS_CMDLINE_BUILTIN_EXTEND
3169 depends on CMDLINE_BOOL
3170 bool "Extend builtin kernel arguments with bootloader arguments"
3175 config LOCKDEP_SUPPORT
3179 config STACKTRACE_SUPPORT
3183 config PGTABLE_LEVELS
3185 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3186 default 3 if 64BIT && !PAGE_SIZE_64KB
3189 config MIPS_AUTO_PFN_OFFSET
3192 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3194 config PCI_DRIVERS_GENERIC
3195 select PCI_DOMAINS_GENERIC if PCI
3198 config PCI_DRIVERS_LEGACY
3199 def_bool !PCI_DRIVERS_GENERIC
3200 select NO_GENERIC_PCI_IOPORT_MAP
3201 select PCI_DOMAINS if PCI
3204 # ISA support is now enabled via select. Too many systems still have the one
3205 # or other ISA chip on the board that users don't know about so don't expect
3206 # users to choose the right thing ...
3212 bool "TURBOchannel support"
3213 depends on MACH_DECSTATION
3215 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3216 processors. TURBOchannel programming specifications are available
3218 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3220 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3221 Linux driver support status is documented at:
3222 <http://www.linux-mips.org/wiki/DECstation>
3228 config ARCH_MMAP_RND_BITS_MIN
3232 config ARCH_MMAP_RND_BITS_MAX
3236 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3239 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3246 select MIPS_EXTERNAL_TIMER
3259 config MIPS32_COMPAT
3265 config SYSVIPC_COMPAT
3269 bool "Kernel support for o32 binaries"
3271 select ARCH_WANT_OLD_COMPAT_IPC
3273 select MIPS32_COMPAT
3274 select SYSVIPC_COMPAT if SYSVIPC
3276 Select this option if you want to run o32 binaries. These are pure
3277 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3278 existing binaries are in this format.
3283 bool "Kernel support for n32 binaries"
3285 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3287 select MIPS32_COMPAT
3288 select SYSVIPC_COMPAT if SYSVIPC
3290 Select this option if you want to run n32 binaries. These are
3291 64-bit binaries using 32-bit quantities for addressing and certain
3292 data that would normally be 64-bit. They are used in special
3299 default y if MIPS32_O32 || MIPS32_N32
3302 menu "Power management options"
3304 config ARCH_HIBERNATION_POSSIBLE
3306 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3308 config ARCH_SUSPEND_POSSIBLE
3310 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3312 source "kernel/power/Kconfig"
3316 config MIPS_EXTERNAL_TIMER
3319 menu "CPU Power Management"
3321 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3322 source "drivers/cpufreq/Kconfig"
3325 source "drivers/cpuidle/Kconfig"
3329 source "drivers/firmware/Kconfig"
3331 source "arch/mips/kvm/Kconfig"
3333 source "arch/mips/vdso/Kconfig"