1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11 select ARCH_HAS_UBSAN_SANITIZE_ALL
12 select ARCH_SUPPORTS_UPROBES
13 select ARCH_USE_BUILTIN_BSWAP
14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
15 select ARCH_USE_QUEUED_RWLOCKS
16 select ARCH_USE_QUEUED_SPINLOCKS
17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
18 select ARCH_WANT_IPC_PARSE_VERSION
19 select BUILDTIME_TABLE_SORT
20 select CLONE_BACKWARDS
21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
22 select CPU_PM if CPU_IDLE
23 select GENERIC_ATOMIC64 if !64BIT
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_CMOS_UPDATE
26 select GENERIC_CPU_AUTOPROBE
27 select GENERIC_GETTIMEOFDAY
29 select GENERIC_IRQ_PROBE
30 select GENERIC_IRQ_SHOW
31 select GENERIC_ISA_DMA if EISA
32 select GENERIC_LIB_ASHLDI3
33 select GENERIC_LIB_ASHRDI3
34 select GENERIC_LIB_CMPDI2
35 select GENERIC_LIB_LSHRDI3
36 select GENERIC_LIB_UCMPDI2
37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
38 select GENERIC_SMP_IDLE_THREAD
39 select GENERIC_TIME_VSYSCALL
40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
41 select HANDLE_DOMAIN_IRQ
42 select HAVE_ARCH_COMPILER_H
43 select HAVE_ARCH_JUMP_LABEL
45 select HAVE_ARCH_MMAP_RND_BITS if MMU
46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
47 select HAVE_ARCH_SECCOMP_FILTER
48 select HAVE_ARCH_TRACEHOOK
49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
50 select HAVE_ASM_MODVERSIONS
51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
52 select HAVE_CONTEXT_TRACKING
54 select HAVE_C_RECORDMCOUNT
55 select HAVE_DEBUG_KMEMLEAK
56 select HAVE_DEBUG_STACKOVERFLOW
57 select HAVE_DMA_CONTIGUOUS
58 select HAVE_DYNAMIC_FTRACE
59 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
60 select HAVE_EXIT_THREAD
62 select HAVE_FTRACE_MCOUNT_RECORD
63 select HAVE_FUNCTION_GRAPH_TRACER
64 select HAVE_FUNCTION_TRACER
65 select HAVE_GCC_PLUGINS
66 select HAVE_GENERIC_VDSO
68 select HAVE_IOREMAP_PROT
69 select HAVE_IRQ_EXIT_ON_IRQ_STACK
70 select HAVE_IRQ_TIME_ACCOUNTING
72 select HAVE_KRETPROBES
73 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
74 select HAVE_MOD_ARCH_SPECIFIC
77 select HAVE_PERF_EVENTS
78 select HAVE_REGS_AND_STACK_ACCESS_API
80 select HAVE_SPARSE_SYSCALL_NR
81 select HAVE_STACKPROTECTOR
82 select HAVE_SYSCALL_TRACEPOINTS
83 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
84 select IRQ_FORCED_THREADING
86 select MODULES_USE_ELF_REL if MODULES
87 select MODULES_USE_ELF_RELA if MODULES && 64BIT
88 select PERF_USE_VMALLOC
89 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
92 select SYSCTL_EXCEPTION_TRACE
95 config MIPS_FIXUP_BIGPHYS_ADDR
103 select SYS_SUPPORTS_32BIT_KERNEL
104 select SYS_SUPPORTS_LITTLE_ENDIAN
105 select SYS_SUPPORTS_ZBOOT
106 select DMA_NONCOHERENT
111 select GENERIC_IRQ_CHIP
112 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
114 select CPU_SUPPORTS_CPUFREQ
115 select MIPS_EXTERNAL_TIMER
117 menu "Machine selection"
121 default MIPS_GENERIC_KERNEL
123 config MIPS_GENERIC_KERNEL
124 bool "Generic board-agnostic MIPS kernel"
129 select CLKSRC_MIPS_GIC
131 select CPU_MIPSR2_IRQ_EI
132 select CPU_MIPSR2_IRQ_VI
134 select DMA_PERDEV_COHERENT
137 select MIPS_AUTO_PFN_OFFSET
138 select MIPS_CPU_SCACHE
140 select MIPS_L1_CACHE_SHIFT_7
141 select NO_EXCEPT_FILL
142 select PCI_DRIVERS_GENERIC
145 select SYS_HAS_CPU_MIPS32_R1
146 select SYS_HAS_CPU_MIPS32_R2
147 select SYS_HAS_CPU_MIPS32_R6
148 select SYS_HAS_CPU_MIPS64_R1
149 select SYS_HAS_CPU_MIPS64_R2
150 select SYS_HAS_CPU_MIPS64_R6
151 select SYS_SUPPORTS_32BIT_KERNEL
152 select SYS_SUPPORTS_64BIT_KERNEL
153 select SYS_SUPPORTS_BIG_ENDIAN
154 select SYS_SUPPORTS_HIGHMEM
155 select SYS_SUPPORTS_LITTLE_ENDIAN
156 select SYS_SUPPORTS_MICROMIPS
157 select SYS_SUPPORTS_MIPS16
158 select SYS_SUPPORTS_MIPS_CPS
159 select SYS_SUPPORTS_MULTITHREADING
160 select SYS_SUPPORTS_RELOCATABLE
161 select SYS_SUPPORTS_SMARTMIPS
162 select SYS_SUPPORTS_ZBOOT
164 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
165 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
166 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
167 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
168 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
169 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
172 Select this to build a kernel which aims to support multiple boards,
173 generally using a flattened device tree passed from the bootloader
174 using the boot protocol defined in the UHI (Unified Hosting
175 Interface) specification.
178 bool "Alchemy processor based machines"
179 select PHYS_ADDR_T_64BIT
183 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
184 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
185 select SYS_HAS_CPU_MIPS32_R1
186 select SYS_SUPPORTS_32BIT_KERNEL
187 select SYS_SUPPORTS_APM_EMULATION
189 select SYS_SUPPORTS_ZBOOT
193 bool "Texas Instruments AR7"
195 select DMA_NONCOHERENT
199 select NO_EXCEPT_FILL
201 select SYS_HAS_CPU_MIPS32_R1
202 select SYS_HAS_EARLY_PRINTK
203 select SYS_SUPPORTS_32BIT_KERNEL
204 select SYS_SUPPORTS_LITTLE_ENDIAN
205 select SYS_SUPPORTS_MIPS16
206 select SYS_SUPPORTS_ZBOOT_UART16550
209 select HAVE_LEGACY_CLK
211 Support for the Texas Instruments AR7 System-on-a-Chip
212 family: TNETD7100, 7200 and 7300.
215 bool "Atheros AR231x/AR531x SoC support"
218 select DMA_NONCOHERENT
221 select SYS_HAS_CPU_MIPS32_R1
222 select SYS_SUPPORTS_BIG_ENDIAN
223 select SYS_SUPPORTS_32BIT_KERNEL
224 select SYS_HAS_EARLY_PRINTK
226 Support for Atheros AR231x and Atheros AR531x based boards
229 bool "Atheros AR71XX/AR724X/AR913X based boards"
230 select ARCH_HAS_RESET_CONTROLLER
234 select DMA_NONCOHERENT
239 select SYS_HAS_CPU_MIPS32_R2
240 select SYS_HAS_EARLY_PRINTK
241 select SYS_SUPPORTS_32BIT_KERNEL
242 select SYS_SUPPORTS_BIG_ENDIAN
243 select SYS_SUPPORTS_MIPS16
244 select SYS_SUPPORTS_ZBOOT_UART_PROM
246 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
248 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
251 bool "Broadcom Generic BMIPS kernel"
252 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
253 select ARCH_HAS_PHYS_TO_DMA
255 select NO_EXCEPT_FILL
261 select BCM6345_L1_IRQ
262 select BCM7038_L1_IRQ
263 select BCM7120_L2_IRQ
264 select BRCMSTB_L2_IRQ
266 select DMA_NONCOHERENT
267 select SYS_SUPPORTS_32BIT_KERNEL
268 select SYS_SUPPORTS_LITTLE_ENDIAN
269 select SYS_SUPPORTS_BIG_ENDIAN
270 select SYS_SUPPORTS_HIGHMEM
271 select SYS_HAS_CPU_BMIPS32_3300
272 select SYS_HAS_CPU_BMIPS4350
273 select SYS_HAS_CPU_BMIPS4380
274 select SYS_HAS_CPU_BMIPS5000
276 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
277 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
278 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
279 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
280 select HARDIRQS_SW_RESEND
282 Build a generic DT-based kernel image that boots on select
283 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
284 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
285 must be set appropriately for your board.
288 bool "Broadcom BCM47XX based boards"
292 select DMA_NONCOHERENT
295 select SYS_HAS_CPU_MIPS32_R1
296 select NO_EXCEPT_FILL
297 select SYS_SUPPORTS_32BIT_KERNEL
298 select SYS_SUPPORTS_LITTLE_ENDIAN
299 select SYS_SUPPORTS_MIPS16
300 select SYS_SUPPORTS_ZBOOT
301 select SYS_HAS_EARLY_PRINTK
302 select USE_GENERIC_EARLY_PRINTK_8250
304 select LEDS_GPIO_REGISTER
307 select BCM47XX_SSB if !BCM47XX_BCMA
309 Support for BCM47XX based boards
312 bool "Broadcom BCM63XX based boards"
317 select DMA_NONCOHERENT
319 select SYS_SUPPORTS_32BIT_KERNEL
320 select SYS_SUPPORTS_BIG_ENDIAN
321 select SYS_HAS_EARLY_PRINTK
324 select MIPS_L1_CACHE_SHIFT_4
326 select HAVE_LEGACY_CLK
328 Support for BCM63XX based boards
335 select DMA_NONCOHERENT
341 select PCI_GT64XXX_PCI0
342 select SYS_HAS_CPU_NEVADA
343 select SYS_HAS_EARLY_PRINTK
344 select SYS_SUPPORTS_32BIT_KERNEL
345 select SYS_SUPPORTS_64BIT_KERNEL
346 select SYS_SUPPORTS_LITTLE_ENDIAN
347 select USE_GENERIC_EARLY_PRINTK_8250
349 config MACH_DECSTATION
353 select CEVT_R4K if CPU_R4X00
355 select CSRC_R4K if CPU_R4X00
356 select CPU_DADDI_WORKAROUNDS if 64BIT
357 select CPU_R4000_WORKAROUNDS if 64BIT
358 select CPU_R4400_WORKAROUNDS if 64BIT
359 select DMA_NONCOHERENT
362 select SYS_HAS_CPU_R3000
363 select SYS_HAS_CPU_R4X00
364 select SYS_SUPPORTS_32BIT_KERNEL
365 select SYS_SUPPORTS_64BIT_KERNEL
366 select SYS_SUPPORTS_LITTLE_ENDIAN
367 select SYS_SUPPORTS_128HZ
368 select SYS_SUPPORTS_256HZ
369 select SYS_SUPPORTS_1024HZ
370 select MIPS_L1_CACHE_SHIFT_4
372 This enables support for DEC's MIPS based workstations. For details
373 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
374 DECstation porting pages on <http://decstation.unix-ag.org/>.
376 If you have one of the following DECstation Models you definitely
377 want to choose R4xx0 for the CPU Type:
384 otherwise choose R3000.
387 bool "Jazz family of machines"
390 select ARCH_MIGHT_HAVE_PC_PARPORT
391 select ARCH_MIGHT_HAVE_PC_SERIO
395 select ARCH_MAY_HAVE_PC_FDC
398 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
399 select GENERIC_ISA_DMA
400 select HAVE_PCSPKR_PLATFORM
405 select SYS_HAS_CPU_R4X00
406 select SYS_SUPPORTS_32BIT_KERNEL
407 select SYS_SUPPORTS_64BIT_KERNEL
408 select SYS_SUPPORTS_100HZ
410 This a family of machines based on the MIPS R4030 chipset which was
411 used by several vendors to build RISC/os and Windows NT workstations.
412 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
413 Olivetti M700-10 workstations.
415 config MACH_INGENIC_SOC
416 bool "Ingenic SoC based machines"
419 select SYS_SUPPORTS_ZBOOT_UART16550
422 bool "Lantiq based platforms"
423 select DMA_NONCOHERENT
427 select SYS_HAS_CPU_MIPS32_R1
428 select SYS_HAS_CPU_MIPS32_R2
429 select SYS_SUPPORTS_BIG_ENDIAN
430 select SYS_SUPPORTS_32BIT_KERNEL
431 select SYS_SUPPORTS_MIPS16
432 select SYS_SUPPORTS_MULTITHREADING
433 select SYS_SUPPORTS_VPE_LOADER
434 select SYS_HAS_EARLY_PRINTK
439 select HAVE_LEGACY_CLK
442 select PINCTRL_LANTIQ
443 select ARCH_HAS_RESET_CONTROLLER
444 select RESET_CONTROLLER
446 config MACH_LOONGSON32
447 bool "Loongson 32-bit family of machines"
448 select SYS_SUPPORTS_ZBOOT
450 This enables support for the Loongson-1 family of machines.
452 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
453 the Institute of Computing Technology (ICT), Chinese Academy of
456 config MACH_LOONGSON2EF
457 bool "Loongson-2E/F family of machines"
458 select SYS_SUPPORTS_ZBOOT
460 This enables the support of early Loongson-2E/F family of machines.
462 config MACH_LOONGSON64
463 bool "Loongson 64-bit family of machines"
464 select ARCH_SPARSEMEM_ENABLE
465 select ARCH_MIGHT_HAVE_PC_PARPORT
466 select ARCH_MIGHT_HAVE_PC_SERIO
467 select GENERIC_ISA_DMA_SUPPORT_BROKEN
477 select NO_EXCEPT_FILL
478 select NR_CPUS_DEFAULT_64
479 select USE_GENERIC_EARLY_PRINTK_8250
480 select PCI_DRIVERS_GENERIC
481 select SYS_HAS_CPU_LOONGSON64
482 select SYS_HAS_EARLY_PRINTK
483 select SYS_SUPPORTS_SMP
484 select SYS_SUPPORTS_HOTPLUG_CPU
485 select SYS_SUPPORTS_NUMA
486 select SYS_SUPPORTS_64BIT_KERNEL
487 select SYS_SUPPORTS_HIGHMEM
488 select SYS_SUPPORTS_LITTLE_ENDIAN
489 select SYS_SUPPORTS_ZBOOT
496 select PCI_HOST_GENERIC
498 This enables the support of Loongson-2/3 family of machines.
500 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
501 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
502 and Loongson-2F which will be removed), developed by the Institute
503 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
505 config MACH_PISTACHIO
506 bool "IMG Pistachio SoC based boards"
510 select CLKSRC_MIPS_GIC
513 select DMA_NONCOHERENT
517 select MIPS_CPU_SCACHE
521 select SYS_HAS_CPU_MIPS32_R2
522 select SYS_SUPPORTS_32BIT_KERNEL
523 select SYS_SUPPORTS_LITTLE_ENDIAN
524 select SYS_SUPPORTS_MIPS_CPS
525 select SYS_SUPPORTS_MULTITHREADING
526 select SYS_SUPPORTS_RELOCATABLE
527 select SYS_SUPPORTS_ZBOOT
528 select SYS_HAS_EARLY_PRINTK
529 select USE_GENERIC_EARLY_PRINTK_8250
532 This enables support for the IMG Pistachio SoC platform.
535 bool "MIPS Malta board"
536 select ARCH_MAY_HAVE_PC_FDC
537 select ARCH_MIGHT_HAVE_PC_PARPORT
538 select ARCH_MIGHT_HAVE_PC_SERIO
543 select CLKSRC_MIPS_GIC
546 select DMA_MAYBE_COHERENT
547 select GENERIC_ISA_DMA
548 select HAVE_PCSPKR_PLATFORM
554 select MIPS_CPU_SCACHE
556 select MIPS_L1_CACHE_SHIFT_6
558 select PCI_GT64XXX_PCI0
561 select SYS_HAS_CPU_MIPS32_R1
562 select SYS_HAS_CPU_MIPS32_R2
563 select SYS_HAS_CPU_MIPS32_R3_5
564 select SYS_HAS_CPU_MIPS32_R5
565 select SYS_HAS_CPU_MIPS32_R6
566 select SYS_HAS_CPU_MIPS64_R1
567 select SYS_HAS_CPU_MIPS64_R2
568 select SYS_HAS_CPU_MIPS64_R6
569 select SYS_HAS_CPU_NEVADA
570 select SYS_HAS_CPU_RM7000
571 select SYS_SUPPORTS_32BIT_KERNEL
572 select SYS_SUPPORTS_64BIT_KERNEL
573 select SYS_SUPPORTS_BIG_ENDIAN
574 select SYS_SUPPORTS_HIGHMEM
575 select SYS_SUPPORTS_LITTLE_ENDIAN
576 select SYS_SUPPORTS_MICROMIPS
577 select SYS_SUPPORTS_MIPS16
578 select SYS_SUPPORTS_MIPS_CMP
579 select SYS_SUPPORTS_MIPS_CPS
580 select SYS_SUPPORTS_MULTITHREADING
581 select SYS_SUPPORTS_RELOCATABLE
582 select SYS_SUPPORTS_SMARTMIPS
583 select SYS_SUPPORTS_VPE_LOADER
584 select SYS_SUPPORTS_ZBOOT
586 select WAR_ICACHE_REFILLS
587 select ZONE_DMA32 if 64BIT
589 This enables support for the MIPS Technologies Malta evaluation
593 bool "Microchip PIC32 Family"
595 This enables support for the Microchip PIC32 family of platforms.
597 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
601 bool "NEC VR4100 series based machines"
604 select SYS_HAS_CPU_VR41XX
605 select SYS_SUPPORTS_MIPS16
609 bool "Ralink based machines"
613 select DMA_NONCOHERENT
616 select SYS_HAS_CPU_MIPS32_R1
617 select SYS_HAS_CPU_MIPS32_R2
618 select SYS_SUPPORTS_32BIT_KERNEL
619 select SYS_SUPPORTS_LITTLE_ENDIAN
620 select SYS_SUPPORTS_MIPS16
621 select SYS_SUPPORTS_ZBOOT
622 select SYS_HAS_EARLY_PRINTK
624 select ARCH_HAS_RESET_CONTROLLER
625 select RESET_CONTROLLER
628 bool "SGI IP22 (Indy/Indigo2)"
633 select ARCH_MIGHT_HAVE_PC_SERIO
637 select DEFAULT_SGI_PARTITION
638 select DMA_NONCOHERENT
642 select IP22_CPU_SCACHE
644 select GENERIC_ISA_DMA_SUPPORT_BROKEN
646 select SGI_HAS_INDYDOG
652 select SYS_HAS_CPU_R4X00
653 select SYS_HAS_CPU_R5000
654 select SYS_HAS_EARLY_PRINTK
655 select SYS_SUPPORTS_32BIT_KERNEL
656 select SYS_SUPPORTS_64BIT_KERNEL
657 select SYS_SUPPORTS_BIG_ENDIAN
658 select WAR_R4600_V1_INDEX_ICACHEOP
659 select WAR_R4600_V1_HIT_CACHEOP
660 select WAR_R4600_V2_HIT_CACHEOP
661 select MIPS_L1_CACHE_SHIFT_7
663 This are the SGI Indy, Challenge S and Indigo2, as well as certain
664 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
665 that runs on these, say Y here.
668 bool "SGI IP27 (Origin200/2000)"
669 select ARCH_HAS_PHYS_TO_DMA
670 select ARCH_SPARSEMEM_ENABLE
673 select ARC_CMDLINE_ONLY
675 select DEFAULT_SGI_PARTITION
676 select SYS_HAS_EARLY_PRINTK
679 select IRQ_DOMAIN_HIERARCHY
680 select NR_CPUS_DEFAULT_64
681 select PCI_DRIVERS_GENERIC
682 select PCI_XTALK_BRIDGE
683 select SYS_HAS_CPU_R10000
684 select SYS_SUPPORTS_64BIT_KERNEL
685 select SYS_SUPPORTS_BIG_ENDIAN
686 select SYS_SUPPORTS_NUMA
687 select SYS_SUPPORTS_SMP
688 select WAR_R10000_LLSC
689 select MIPS_L1_CACHE_SHIFT_7
692 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
693 workstations. To compile a Linux kernel that runs on these, say Y
697 bool "SGI IP28 (Indigo2 R10k)"
702 select ARCH_MIGHT_HAVE_PC_SERIO
706 select DEFAULT_SGI_PARTITION
707 select DMA_NONCOHERENT
708 select GENERIC_ISA_DMA_SUPPORT_BROKEN
714 select SGI_HAS_INDYDOG
720 select SYS_HAS_CPU_R10000
721 select SYS_HAS_EARLY_PRINTK
722 select SYS_SUPPORTS_64BIT_KERNEL
723 select SYS_SUPPORTS_BIG_ENDIAN
724 select WAR_R10000_LLSC
725 select MIPS_L1_CACHE_SHIFT_7
727 This is the SGI Indigo2 with R10000 processor. To compile a Linux
728 kernel that runs on these, say Y here.
731 bool "SGI IP30 (Octane/Octane2)"
732 select ARCH_HAS_PHYS_TO_DMA
738 select SYNC_R4K if SMP
742 select IRQ_DOMAIN_HIERARCHY
743 select NR_CPUS_DEFAULT_2
744 select PCI_DRIVERS_GENERIC
745 select PCI_XTALK_BRIDGE
746 select SYS_HAS_EARLY_PRINTK
747 select SYS_HAS_CPU_R10000
748 select SYS_SUPPORTS_64BIT_KERNEL
749 select SYS_SUPPORTS_BIG_ENDIAN
750 select SYS_SUPPORTS_SMP
751 select WAR_R10000_LLSC
752 select MIPS_L1_CACHE_SHIFT_7
755 These are the SGI Octane and Octane2 graphics workstations. To
756 compile a Linux kernel that runs on these, say Y here.
762 select ARCH_HAS_PHYS_TO_DMA
768 select DMA_NONCOHERENT
771 select R5000_CPU_SCACHE
772 select RM7000_CPU_SCACHE
773 select SYS_HAS_CPU_R5000
774 select SYS_HAS_CPU_R10000 if BROKEN
775 select SYS_HAS_CPU_RM7000
776 select SYS_HAS_CPU_NEVADA
777 select SYS_SUPPORTS_64BIT_KERNEL
778 select SYS_SUPPORTS_BIG_ENDIAN
779 select WAR_ICACHE_REFILLS
781 If you want this kernel to run on SGI O2 workstation, say Y here.
784 bool "Sibyte BCM91120C-CRhine"
786 select SIBYTE_BCM1120
788 select SYS_HAS_CPU_SB1
789 select SYS_SUPPORTS_BIG_ENDIAN
790 select SYS_SUPPORTS_LITTLE_ENDIAN
793 bool "Sibyte BCM91120x-Carmel"
795 select SIBYTE_BCM1120
797 select SYS_HAS_CPU_SB1
798 select SYS_SUPPORTS_BIG_ENDIAN
799 select SYS_SUPPORTS_LITTLE_ENDIAN
802 bool "Sibyte BCM91125C-CRhone"
804 select SIBYTE_BCM1125
806 select SYS_HAS_CPU_SB1
807 select SYS_SUPPORTS_BIG_ENDIAN
808 select SYS_SUPPORTS_HIGHMEM
809 select SYS_SUPPORTS_LITTLE_ENDIAN
812 bool "Sibyte BCM91125E-Rhone"
814 select SIBYTE_BCM1125H
816 select SYS_HAS_CPU_SB1
817 select SYS_SUPPORTS_BIG_ENDIAN
818 select SYS_SUPPORTS_LITTLE_ENDIAN
821 bool "Sibyte BCM91250A-SWARM"
823 select HAVE_PATA_PLATFORM
826 select SYS_HAS_CPU_SB1
827 select SYS_SUPPORTS_BIG_ENDIAN
828 select SYS_SUPPORTS_HIGHMEM
829 select SYS_SUPPORTS_LITTLE_ENDIAN
830 select ZONE_DMA32 if 64BIT
831 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
833 config SIBYTE_LITTLESUR
834 bool "Sibyte BCM91250C2-LittleSur"
836 select HAVE_PATA_PLATFORM
839 select SYS_HAS_CPU_SB1
840 select SYS_SUPPORTS_BIG_ENDIAN
841 select SYS_SUPPORTS_HIGHMEM
842 select SYS_SUPPORTS_LITTLE_ENDIAN
843 select ZONE_DMA32 if 64BIT
845 config SIBYTE_SENTOSA
846 bool "Sibyte BCM91250E-Sentosa"
850 select SYS_HAS_CPU_SB1
851 select SYS_SUPPORTS_BIG_ENDIAN
852 select SYS_SUPPORTS_LITTLE_ENDIAN
853 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
856 bool "Sibyte BCM91480B-BigSur"
858 select NR_CPUS_DEFAULT_4
859 select SIBYTE_BCM1x80
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_HIGHMEM
864 select SYS_SUPPORTS_LITTLE_ENDIAN
865 select ZONE_DMA32 if 64BIT
866 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
869 bool "SNI RM200/300/400"
872 select FW_ARC if CPU_LITTLE_ENDIAN
873 select FW_ARC32 if CPU_LITTLE_ENDIAN
874 select FW_SNIPROM if CPU_BIG_ENDIAN
875 select ARCH_MAY_HAVE_PC_FDC
876 select ARCH_MIGHT_HAVE_PC_PARPORT
877 select ARCH_MIGHT_HAVE_PC_SERIO
881 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
882 select DMA_NONCOHERENT
883 select GENERIC_ISA_DMA
885 select HAVE_PCSPKR_PLATFORM
891 select MIPS_L1_CACHE_SHIFT_6
892 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
893 select SYS_HAS_CPU_R4X00
894 select SYS_HAS_CPU_R5000
895 select SYS_HAS_CPU_R10000
896 select R5000_CPU_SCACHE
897 select SYS_HAS_EARLY_PRINTK
898 select SYS_SUPPORTS_32BIT_KERNEL
899 select SYS_SUPPORTS_64BIT_KERNEL
900 select SYS_SUPPORTS_BIG_ENDIAN
901 select SYS_SUPPORTS_HIGHMEM
902 select SYS_SUPPORTS_LITTLE_ENDIAN
903 select WAR_R4600_V2_HIT_CACHEOP
905 The SNI RM200/300/400 are MIPS-based machines manufactured by
906 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
907 Technology and now in turn merged with Fujitsu. Say Y here to
908 support this machine type.
911 bool "Toshiba TX39 series based machines"
914 bool "Toshiba TX49 series based machines"
915 select WAR_TX49XX_ICACHE_INDEX_INV
917 config MIKROTIK_RB532
918 bool "Mikrotik RB532 boards"
921 select DMA_NONCOHERENT
924 select SYS_HAS_CPU_MIPS32_R1
925 select SYS_SUPPORTS_32BIT_KERNEL
926 select SYS_SUPPORTS_LITTLE_ENDIAN
930 select MIPS_L1_CACHE_SHIFT_4
932 Support the Mikrotik(tm) RouterBoard 532 series,
933 based on the IDT RC32434 SoC.
935 config CAVIUM_OCTEON_SOC
936 bool "Cavium Networks Octeon SoC based boards"
938 select ARCH_HAS_PHYS_TO_DMA
940 select PHYS_ADDR_T_64BIT
941 select SYS_SUPPORTS_64BIT_KERNEL
942 select SYS_SUPPORTS_BIG_ENDIAN
944 select EDAC_ATOMIC_SCRUB
945 select SYS_SUPPORTS_LITTLE_ENDIAN
946 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
947 select SYS_HAS_EARLY_PRINTK
948 select SYS_HAS_CPU_CAVIUM_OCTEON
950 select HAVE_PLAT_DELAY
951 select HAVE_PLAT_FW_INIT_CMDLINE
952 select HAVE_PLAT_MEMCPY
957 select ARCH_SPARSEMEM_ENABLE
958 select SYS_SUPPORTS_SMP
959 select NR_CPUS_DEFAULT_64
960 select MIPS_NR_CPU_NR_MAP_1024
962 select MTD_COMPLEX_MAPPINGS
964 select SYS_SUPPORTS_RELOCATABLE
966 This option supports all of the Octeon reference boards from Cavium
967 Networks. It builds a kernel that dynamically determines the Octeon
968 CPU type and supports all known board reference implementations.
969 Some of the supported boards are:
976 Say Y here for most Octeon reference boards.
979 bool "Netlogic XLR/XLS based systems"
982 select SYS_HAS_CPU_XLR
983 select SYS_SUPPORTS_SMP
986 select SYS_SUPPORTS_32BIT_KERNEL
987 select SYS_SUPPORTS_64BIT_KERNEL
988 select PHYS_ADDR_T_64BIT
989 select SYS_SUPPORTS_BIG_ENDIAN
990 select SYS_SUPPORTS_HIGHMEM
991 select NR_CPUS_DEFAULT_32
995 select ZONE_DMA32 if 64BIT
997 select SYS_HAS_EARLY_PRINTK
998 select SYS_SUPPORTS_ZBOOT
999 select SYS_SUPPORTS_ZBOOT_UART16550
1001 Support for systems based on Netlogic XLR and XLS processors.
1002 Say Y here if you have a XLR or XLS based board.
1004 config NLM_XLP_BOARD
1005 bool "Netlogic XLP based systems"
1008 select SYS_HAS_CPU_XLP
1009 select SYS_SUPPORTS_SMP
1011 select SYS_SUPPORTS_32BIT_KERNEL
1012 select SYS_SUPPORTS_64BIT_KERNEL
1013 select PHYS_ADDR_T_64BIT
1015 select SYS_SUPPORTS_BIG_ENDIAN
1016 select SYS_SUPPORTS_LITTLE_ENDIAN
1017 select SYS_SUPPORTS_HIGHMEM
1018 select NR_CPUS_DEFAULT_32
1022 select ZONE_DMA32 if 64BIT
1024 select SYS_HAS_EARLY_PRINTK
1026 select SYS_SUPPORTS_ZBOOT
1027 select SYS_SUPPORTS_ZBOOT_UART16550
1029 This board is based on Netlogic XLP Processor.
1030 Say Y here if you have a XLP based board.
1034 source "arch/mips/alchemy/Kconfig"
1035 source "arch/mips/ath25/Kconfig"
1036 source "arch/mips/ath79/Kconfig"
1037 source "arch/mips/bcm47xx/Kconfig"
1038 source "arch/mips/bcm63xx/Kconfig"
1039 source "arch/mips/bmips/Kconfig"
1040 source "arch/mips/generic/Kconfig"
1041 source "arch/mips/ingenic/Kconfig"
1042 source "arch/mips/jazz/Kconfig"
1043 source "arch/mips/lantiq/Kconfig"
1044 source "arch/mips/pic32/Kconfig"
1045 source "arch/mips/pistachio/Kconfig"
1046 source "arch/mips/ralink/Kconfig"
1047 source "arch/mips/sgi-ip27/Kconfig"
1048 source "arch/mips/sibyte/Kconfig"
1049 source "arch/mips/txx9/Kconfig"
1050 source "arch/mips/vr41xx/Kconfig"
1051 source "arch/mips/cavium-octeon/Kconfig"
1052 source "arch/mips/loongson2ef/Kconfig"
1053 source "arch/mips/loongson32/Kconfig"
1054 source "arch/mips/loongson64/Kconfig"
1055 source "arch/mips/netlogic/Kconfig"
1059 config GENERIC_HWEIGHT
1063 config GENERIC_CALIBRATE_DELAY
1067 config SCHED_OMIT_FRAME_POINTER
1072 # Select some configuration options automatically based on user selections.
1077 config ARCH_MAY_HAVE_PC_FDC
1108 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1114 config MIPS_CLOCK_VSYSCALL
1115 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1124 config ARCH_SUPPORTS_UPROBES
1127 config DMA_MAYBE_COHERENT
1128 select ARCH_HAS_DMA_COHERENCE_H
1129 select DMA_NONCOHERENT
1132 config DMA_PERDEV_COHERENT
1134 select ARCH_HAS_SETUP_DMA_OPS
1135 select DMA_NONCOHERENT
1137 config DMA_NONCOHERENT
1140 # MIPS allows mixing "slightly different" Cacheability and Coherency
1141 # Attribute bits. It is believed that the uncached access through
1142 # KSEG1 and the implementation specific "uncached accelerated" used
1143 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1144 # significant advantages.
1146 select ARCH_HAS_DMA_WRITE_COMBINE
1147 select ARCH_HAS_DMA_PREP_COHERENT
1148 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1149 select ARCH_HAS_DMA_SET_UNCACHED
1150 select DMA_NONCOHERENT_MMAP
1151 select NEED_DMA_MAP_STATE
1153 config SYS_HAS_EARLY_PRINTK
1156 config SYS_SUPPORTS_HOTPLUG_CPU
1159 config MIPS_BONITO64
1168 config NO_IOPORT_MAP
1172 def_bool CPU_NO_LOAD_STORE_LR
1174 config GENERIC_ISA_DMA
1176 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1179 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1181 select GENERIC_ISA_DMA
1183 config HAVE_PLAT_DELAY
1186 config HAVE_PLAT_FW_INIT_CMDLINE
1189 config HAVE_PLAT_MEMCPY
1195 config HOLES_IN_ZONE
1198 config SYS_SUPPORTS_RELOCATABLE
1201 Selected if the platform supports relocating the kernel.
1202 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1203 to allow access to command line and entropy sources.
1205 config MIPS_CBPF_JIT
1207 depends on BPF_JIT && HAVE_CBPF_JIT
1209 config MIPS_EBPF_JIT
1211 depends on BPF_JIT && HAVE_EBPF_JIT
1215 # Endianness selection. Sufficiently obscure so many users don't know what to
1216 # answer,so we try hard to limit the available choices. Also the use of a
1217 # choice statement should be more obvious to the user.
1220 prompt "Endianness selection"
1222 Some MIPS machines can be configured for either little or big endian
1223 byte order. These modes require different kernels and a different
1224 Linux distribution. In general there is one preferred byteorder for a
1225 particular system but some systems are just as commonly used in the
1226 one or the other endianness.
1228 config CPU_BIG_ENDIAN
1230 depends on SYS_SUPPORTS_BIG_ENDIAN
1232 config CPU_LITTLE_ENDIAN
1233 bool "Little endian"
1234 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1241 config SYS_SUPPORTS_APM_EMULATION
1244 config SYS_SUPPORTS_BIG_ENDIAN
1247 config SYS_SUPPORTS_LITTLE_ENDIAN
1250 config SYS_SUPPORTS_HUGETLBFS
1252 depends on CPU_SUPPORTS_HUGEPAGES
1255 config MIPS_HUGE_TLB_SUPPORT
1256 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1273 config PCI_GT64XXX_PCI0
1276 config PCI_XTALK_BRIDGE
1279 config NO_EXCEPT_FILL
1285 config SWAP_IO_SPACE
1288 config SGI_HAS_INDYDOG
1300 config SGI_HAS_ZILOG
1303 config SGI_HAS_I8042
1306 config DEFAULT_SGI_PARTITION
1318 config MIPS_L1_CACHE_SHIFT_4
1321 config MIPS_L1_CACHE_SHIFT_5
1324 config MIPS_L1_CACHE_SHIFT_6
1327 config MIPS_L1_CACHE_SHIFT_7
1330 config MIPS_L1_CACHE_SHIFT
1332 default "7" if MIPS_L1_CACHE_SHIFT_7
1333 default "6" if MIPS_L1_CACHE_SHIFT_6
1334 default "5" if MIPS_L1_CACHE_SHIFT_5
1335 default "4" if MIPS_L1_CACHE_SHIFT_4
1338 config ARC_CMDLINE_ONLY
1342 bool "ARC console support"
1343 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1357 menu "CPU selection"
1363 config CPU_LOONGSON64
1364 bool "Loongson 64-bit CPU"
1365 depends on SYS_HAS_CPU_LOONGSON64
1366 select ARCH_HAS_PHYS_TO_DMA
1368 select CPU_HAS_PREFETCH
1369 select CPU_SUPPORTS_64BIT_KERNEL
1370 select CPU_SUPPORTS_HIGHMEM
1371 select CPU_SUPPORTS_HUGEPAGES
1372 select CPU_SUPPORTS_MSA
1373 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1374 select CPU_MIPSR2_IRQ_VI
1375 select WEAK_ORDERING
1376 select WEAK_REORDERING_BEYOND_LLSC
1377 select MIPS_ASID_BITS_VARIABLE
1378 select MIPS_PGD_C0_CONTEXT
1379 select MIPS_L1_CACHE_SHIFT_6
1384 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1385 cores implements the MIPS64R2 instruction set with many extensions,
1386 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1387 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1388 Loongson-2E/2F is not covered here and will be removed in future.
1390 config LOONGSON3_ENHANCEMENT
1391 bool "New Loongson-3 CPU Enhancements"
1393 depends on CPU_LOONGSON64
1395 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1396 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1397 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1398 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1399 Fast TLB refill support, etc.
1401 This option enable those enhancements which are not probed at run
1402 time. If you want a generic kernel to run on all Loongson 3 machines,
1403 please say 'N' here. If you want a high-performance kernel to run on
1404 new Loongson-3 machines only, please say 'Y' here.
1406 config CPU_LOONGSON3_WORKAROUNDS
1407 bool "Old Loongson-3 LLSC Workarounds"
1409 depends on CPU_LOONGSON64
1411 Loongson-3 processors have the llsc issues which require workarounds.
1412 Without workarounds the system may hang unexpectedly.
1414 Newer Loongson-3 will fix these issues and no workarounds are needed.
1415 The workarounds have no significant side effect on them but may
1416 decrease the performance of the system so this option should be
1417 disabled unless the kernel is intended to be run on old systems.
1419 If unsure, please say Y.
1421 config CPU_LOONGSON3_CPUCFG_EMULATION
1422 bool "Emulate the CPUCFG instruction on older Loongson cores"
1424 depends on CPU_LOONGSON64
1426 Loongson-3A R4 and newer have the CPUCFG instruction available for
1427 userland to query CPU capabilities, much like CPUID on x86. This
1428 option provides emulation of the instruction on older Loongson
1429 cores, back to Loongson-3A1000.
1431 If unsure, please say Y.
1433 config CPU_LOONGSON2E
1435 depends on SYS_HAS_CPU_LOONGSON2E
1436 select CPU_LOONGSON2EF
1438 The Loongson 2E processor implements the MIPS III instruction set
1439 with many extensions.
1441 It has an internal FPGA northbridge, which is compatible to
1444 config CPU_LOONGSON2F
1446 depends on SYS_HAS_CPU_LOONGSON2F
1447 select CPU_LOONGSON2EF
1450 The Loongson 2F processor implements the MIPS III instruction set
1451 with many extensions.
1453 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1454 have a similar programming interface with FPGA northbridge used in
1457 config CPU_LOONGSON1B
1459 depends on SYS_HAS_CPU_LOONGSON1B
1460 select CPU_LOONGSON32
1461 select LEDS_GPIO_REGISTER
1463 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1464 Release 1 instruction set and part of the MIPS32 Release 2
1467 config CPU_LOONGSON1C
1469 depends on SYS_HAS_CPU_LOONGSON1C
1470 select CPU_LOONGSON32
1471 select LEDS_GPIO_REGISTER
1473 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1474 Release 1 instruction set and part of the MIPS32 Release 2
1477 config CPU_MIPS32_R1
1478 bool "MIPS32 Release 1"
1479 depends on SYS_HAS_CPU_MIPS32_R1
1480 select CPU_HAS_PREFETCH
1481 select CPU_SUPPORTS_32BIT_KERNEL
1482 select CPU_SUPPORTS_HIGHMEM
1484 Choose this option to build a kernel for release 1 or later of the
1485 MIPS32 architecture. Most modern embedded systems with a 32-bit
1486 MIPS processor are based on a MIPS32 processor. If you know the
1487 specific type of processor in your system, choose those that one
1488 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1489 Release 2 of the MIPS32 architecture is available since several
1490 years so chances are you even have a MIPS32 Release 2 processor
1491 in which case you should choose CPU_MIPS32_R2 instead for better
1494 config CPU_MIPS32_R2
1495 bool "MIPS32 Release 2"
1496 depends on SYS_HAS_CPU_MIPS32_R2
1497 select CPU_HAS_PREFETCH
1498 select CPU_SUPPORTS_32BIT_KERNEL
1499 select CPU_SUPPORTS_HIGHMEM
1500 select CPU_SUPPORTS_MSA
1503 Choose this option to build a kernel for release 2 or later of the
1504 MIPS32 architecture. Most modern embedded systems with a 32-bit
1505 MIPS processor are based on a MIPS32 processor. If you know the
1506 specific type of processor in your system, choose those that one
1507 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1509 config CPU_MIPS32_R5
1510 bool "MIPS32 Release 5"
1511 depends on SYS_HAS_CPU_MIPS32_R5
1512 select CPU_HAS_PREFETCH
1513 select CPU_SUPPORTS_32BIT_KERNEL
1514 select CPU_SUPPORTS_HIGHMEM
1515 select CPU_SUPPORTS_MSA
1517 select MIPS_O32_FP64_SUPPORT
1519 Choose this option to build a kernel for release 5 or later of the
1520 MIPS32 architecture. New MIPS processors, starting with the Warrior
1521 family, are based on a MIPS32r5 processor. If you own an older
1522 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1524 config CPU_MIPS32_R6
1525 bool "MIPS32 Release 6"
1526 depends on SYS_HAS_CPU_MIPS32_R6
1527 select CPU_HAS_PREFETCH
1528 select CPU_NO_LOAD_STORE_LR
1529 select CPU_SUPPORTS_32BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_MSA
1533 select MIPS_O32_FP64_SUPPORT
1535 Choose this option to build a kernel for release 6 or later of the
1536 MIPS32 architecture. New MIPS processors, starting with the Warrior
1537 family, are based on a MIPS32r6 processor. If you own an older
1538 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1540 config CPU_MIPS64_R1
1541 bool "MIPS64 Release 1"
1542 depends on SYS_HAS_CPU_MIPS64_R1
1543 select CPU_HAS_PREFETCH
1544 select CPU_SUPPORTS_32BIT_KERNEL
1545 select CPU_SUPPORTS_64BIT_KERNEL
1546 select CPU_SUPPORTS_HIGHMEM
1547 select CPU_SUPPORTS_HUGEPAGES
1549 Choose this option to build a kernel for release 1 or later of the
1550 MIPS64 architecture. Many modern embedded systems with a 64-bit
1551 MIPS processor are based on a MIPS64 processor. If you know the
1552 specific type of processor in your system, choose those that one
1553 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1554 Release 2 of the MIPS64 architecture is available since several
1555 years so chances are you even have a MIPS64 Release 2 processor
1556 in which case you should choose CPU_MIPS64_R2 instead for better
1559 config CPU_MIPS64_R2
1560 bool "MIPS64 Release 2"
1561 depends on SYS_HAS_CPU_MIPS64_R2
1562 select CPU_HAS_PREFETCH
1563 select CPU_SUPPORTS_32BIT_KERNEL
1564 select CPU_SUPPORTS_64BIT_KERNEL
1565 select CPU_SUPPORTS_HIGHMEM
1566 select CPU_SUPPORTS_HUGEPAGES
1567 select CPU_SUPPORTS_MSA
1570 Choose this option to build a kernel for release 2 or later of the
1571 MIPS64 architecture. Many modern embedded systems with a 64-bit
1572 MIPS processor are based on a MIPS64 processor. If you know the
1573 specific type of processor in your system, choose those that one
1574 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1576 config CPU_MIPS64_R5
1577 bool "MIPS64 Release 5"
1578 depends on SYS_HAS_CPU_MIPS64_R5
1579 select CPU_HAS_PREFETCH
1580 select CPU_SUPPORTS_32BIT_KERNEL
1581 select CPU_SUPPORTS_64BIT_KERNEL
1582 select CPU_SUPPORTS_HIGHMEM
1583 select CPU_SUPPORTS_HUGEPAGES
1584 select CPU_SUPPORTS_MSA
1585 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1588 Choose this option to build a kernel for release 5 or later of the
1589 MIPS64 architecture. This is a intermediate MIPS architecture
1590 release partly implementing release 6 features. Though there is no
1591 any hardware known to be based on this release.
1593 config CPU_MIPS64_R6
1594 bool "MIPS64 Release 6"
1595 depends on SYS_HAS_CPU_MIPS64_R6
1596 select CPU_HAS_PREFETCH
1597 select CPU_NO_LOAD_STORE_LR
1598 select CPU_SUPPORTS_32BIT_KERNEL
1599 select CPU_SUPPORTS_64BIT_KERNEL
1600 select CPU_SUPPORTS_HIGHMEM
1601 select CPU_SUPPORTS_HUGEPAGES
1602 select CPU_SUPPORTS_MSA
1603 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1606 Choose this option to build a kernel for release 6 or later of the
1607 MIPS64 architecture. New MIPS processors, starting with the Warrior
1608 family, are based on a MIPS64r6 processor. If you own an older
1609 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1612 bool "MIPS Warrior P5600"
1613 depends on SYS_HAS_CPU_P5600
1614 select CPU_HAS_PREFETCH
1615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_HIGHMEM
1617 select CPU_SUPPORTS_MSA
1618 select CPU_SUPPORTS_CPUFREQ
1619 select CPU_MIPSR2_IRQ_VI
1620 select CPU_MIPSR2_IRQ_EI
1622 select MIPS_O32_FP64_SUPPORT
1624 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1625 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1626 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1627 level features like up to six P5600 calculation cores, CM2 with L2
1628 cache, IOCU/IOMMU (though might be unused depending on the system-
1629 specific IP core configuration), GIC, CPC, virtualisation module,
1634 depends on SYS_HAS_CPU_R3000
1637 select CPU_SUPPORTS_32BIT_KERNEL
1638 select CPU_SUPPORTS_HIGHMEM
1640 Please make sure to pick the right CPU type. Linux/MIPS is not
1641 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1642 *not* work on R4000 machines and vice versa. However, since most
1643 of the supported machines have an R4000 (or similar) CPU, R4x00
1644 might be a safe bet. If the resulting kernel does not work,
1645 try to recompile with R3000.
1649 depends on SYS_HAS_CPU_TX39XX
1650 select CPU_SUPPORTS_32BIT_KERNEL
1655 depends on SYS_HAS_CPU_VR41XX
1656 select CPU_SUPPORTS_32BIT_KERNEL
1657 select CPU_SUPPORTS_64BIT_KERNEL
1659 The options selects support for the NEC VR4100 series of processors.
1660 Only choose this option if you have one of these processors as a
1661 kernel built with this option will not run on any other type of
1662 processor or vice versa.
1666 depends on SYS_HAS_CPU_R4X00
1667 select CPU_SUPPORTS_32BIT_KERNEL
1668 select CPU_SUPPORTS_64BIT_KERNEL
1669 select CPU_SUPPORTS_HUGEPAGES
1671 MIPS Technologies R4000-series processors other than 4300, including
1672 the R4000, R4400, R4600, and 4700.
1676 depends on SYS_HAS_CPU_TX49XX
1677 select CPU_HAS_PREFETCH
1678 select CPU_SUPPORTS_32BIT_KERNEL
1679 select CPU_SUPPORTS_64BIT_KERNEL
1680 select CPU_SUPPORTS_HUGEPAGES
1684 depends on SYS_HAS_CPU_R5000
1685 select CPU_SUPPORTS_32BIT_KERNEL
1686 select CPU_SUPPORTS_64BIT_KERNEL
1687 select CPU_SUPPORTS_HUGEPAGES
1689 MIPS Technologies R5000-series processors other than the Nevada.
1693 depends on SYS_HAS_CPU_R5500
1694 select CPU_SUPPORTS_32BIT_KERNEL
1695 select CPU_SUPPORTS_64BIT_KERNEL
1696 select CPU_SUPPORTS_HUGEPAGES
1698 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1703 depends on SYS_HAS_CPU_NEVADA
1704 select CPU_SUPPORTS_32BIT_KERNEL
1705 select CPU_SUPPORTS_64BIT_KERNEL
1706 select CPU_SUPPORTS_HUGEPAGES
1708 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1712 depends on SYS_HAS_CPU_R10000
1713 select CPU_HAS_PREFETCH
1714 select CPU_SUPPORTS_32BIT_KERNEL
1715 select CPU_SUPPORTS_64BIT_KERNEL
1716 select CPU_SUPPORTS_HIGHMEM
1717 select CPU_SUPPORTS_HUGEPAGES
1719 MIPS Technologies R10000-series processors.
1723 depends on SYS_HAS_CPU_RM7000
1724 select CPU_HAS_PREFETCH
1725 select CPU_SUPPORTS_32BIT_KERNEL
1726 select CPU_SUPPORTS_64BIT_KERNEL
1727 select CPU_SUPPORTS_HIGHMEM
1728 select CPU_SUPPORTS_HUGEPAGES
1732 depends on SYS_HAS_CPU_SB1
1733 select CPU_SUPPORTS_32BIT_KERNEL
1734 select CPU_SUPPORTS_64BIT_KERNEL
1735 select CPU_SUPPORTS_HIGHMEM
1736 select CPU_SUPPORTS_HUGEPAGES
1737 select WEAK_ORDERING
1739 config CPU_CAVIUM_OCTEON
1740 bool "Cavium Octeon processor"
1741 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1742 select CPU_HAS_PREFETCH
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select WEAK_ORDERING
1745 select CPU_SUPPORTS_HIGHMEM
1746 select CPU_SUPPORTS_HUGEPAGES
1747 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1748 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1749 select MIPS_L1_CACHE_SHIFT_7
1752 The Cavium Octeon processor is a highly integrated chip containing
1753 many ethernet hardware widgets for networking tasks. The processor
1754 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1755 Full details can be found at http://www.caviumnetworks.com.
1758 bool "Broadcom BMIPS"
1759 depends on SYS_HAS_CPU_BMIPS
1761 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1762 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1763 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1764 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1765 select CPU_SUPPORTS_32BIT_KERNEL
1766 select DMA_NONCOHERENT
1768 select SWAP_IO_SPACE
1769 select WEAK_ORDERING
1770 select CPU_SUPPORTS_HIGHMEM
1771 select CPU_HAS_PREFETCH
1772 select CPU_SUPPORTS_CPUFREQ
1773 select MIPS_EXTERNAL_TIMER
1775 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1778 bool "Netlogic XLR SoC"
1779 depends on SYS_HAS_CPU_XLR
1780 select CPU_SUPPORTS_32BIT_KERNEL
1781 select CPU_SUPPORTS_64BIT_KERNEL
1782 select CPU_SUPPORTS_HIGHMEM
1783 select CPU_SUPPORTS_HUGEPAGES
1784 select WEAK_ORDERING
1785 select WEAK_REORDERING_BEYOND_LLSC
1787 Netlogic Microsystems XLR/XLS processors.
1790 bool "Netlogic XLP SoC"
1791 depends on SYS_HAS_CPU_XLP
1792 select CPU_SUPPORTS_32BIT_KERNEL
1793 select CPU_SUPPORTS_64BIT_KERNEL
1794 select CPU_SUPPORTS_HIGHMEM
1795 select WEAK_ORDERING
1796 select WEAK_REORDERING_BEYOND_LLSC
1797 select CPU_HAS_PREFETCH
1799 select CPU_SUPPORTS_HUGEPAGES
1800 select MIPS_ASID_BITS_VARIABLE
1802 Netlogic Microsystems XLP processors.
1805 config CPU_MIPS32_3_5_FEATURES
1806 bool "MIPS32 Release 3.5 Features"
1807 depends on SYS_HAS_CPU_MIPS32_R3_5
1808 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1811 Choose this option to build a kernel for release 2 or later of the
1812 MIPS32 architecture including features from the 3.5 release such as
1813 support for Enhanced Virtual Addressing (EVA).
1815 config CPU_MIPS32_3_5_EVA
1816 bool "Enhanced Virtual Addressing (EVA)"
1817 depends on CPU_MIPS32_3_5_FEATURES
1821 Choose this option if you want to enable the Enhanced Virtual
1822 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1823 One of its primary benefits is an increase in the maximum size
1824 of lowmem (up to 3GB). If unsure, say 'N' here.
1826 config CPU_MIPS32_R5_FEATURES
1827 bool "MIPS32 Release 5 Features"
1828 depends on SYS_HAS_CPU_MIPS32_R5
1829 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1831 Choose this option to build a kernel for release 2 or later of the
1832 MIPS32 architecture including features from release 5 such as
1833 support for Extended Physical Addressing (XPA).
1835 config CPU_MIPS32_R5_XPA
1836 bool "Extended Physical Addressing (XPA)"
1837 depends on CPU_MIPS32_R5_FEATURES
1839 depends on !PAGE_SIZE_4KB
1840 depends on SYS_SUPPORTS_HIGHMEM
1843 select PHYS_ADDR_T_64BIT
1846 Choose this option if you want to enable the Extended Physical
1847 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1848 benefit is to increase physical addressing equal to or greater
1849 than 40 bits. Note that this has the side effect of turning on
1850 64-bit addressing which in turn makes the PTEs 64-bit in size.
1851 If unsure, say 'N' here.
1854 config CPU_NOP_WORKAROUNDS
1857 config CPU_JUMP_WORKAROUNDS
1860 config CPU_LOONGSON2F_WORKAROUNDS
1861 bool "Loongson 2F Workarounds"
1863 select CPU_NOP_WORKAROUNDS
1864 select CPU_JUMP_WORKAROUNDS
1866 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1867 require workarounds. Without workarounds the system may hang
1868 unexpectedly. For more information please refer to the gas
1869 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1871 Loongson 2F03 and later have fixed these issues and no workarounds
1872 are needed. The workarounds have no significant side effect on them
1873 but may decrease the performance of the system so this option should
1874 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1877 If unsure, please say Y.
1878 endif # CPU_LOONGSON2F
1880 config SYS_SUPPORTS_ZBOOT
1882 select HAVE_KERNEL_GZIP
1883 select HAVE_KERNEL_BZIP2
1884 select HAVE_KERNEL_LZ4
1885 select HAVE_KERNEL_LZMA
1886 select HAVE_KERNEL_LZO
1887 select HAVE_KERNEL_XZ
1888 select HAVE_KERNEL_ZSTD
1890 config SYS_SUPPORTS_ZBOOT_UART16550
1892 select SYS_SUPPORTS_ZBOOT
1894 config SYS_SUPPORTS_ZBOOT_UART_PROM
1896 select SYS_SUPPORTS_ZBOOT
1898 config CPU_LOONGSON2EF
1900 select CPU_SUPPORTS_32BIT_KERNEL
1901 select CPU_SUPPORTS_64BIT_KERNEL
1902 select CPU_SUPPORTS_HIGHMEM
1903 select CPU_SUPPORTS_HUGEPAGES
1904 select ARCH_HAS_PHYS_TO_DMA
1906 config CPU_LOONGSON32
1910 select CPU_HAS_PREFETCH
1911 select CPU_SUPPORTS_32BIT_KERNEL
1912 select CPU_SUPPORTS_HIGHMEM
1913 select CPU_SUPPORTS_CPUFREQ
1915 config CPU_BMIPS32_3300
1916 select SMP_UP if SMP
1919 config CPU_BMIPS4350
1921 select SYS_SUPPORTS_SMP
1922 select SYS_SUPPORTS_HOTPLUG_CPU
1924 config CPU_BMIPS4380
1926 select MIPS_L1_CACHE_SHIFT_6
1927 select SYS_SUPPORTS_SMP
1928 select SYS_SUPPORTS_HOTPLUG_CPU
1931 config CPU_BMIPS5000
1933 select MIPS_CPU_SCACHE
1934 select MIPS_L1_CACHE_SHIFT_7
1935 select SYS_SUPPORTS_SMP
1936 select SYS_SUPPORTS_HOTPLUG_CPU
1939 config SYS_HAS_CPU_LOONGSON64
1941 select CPU_SUPPORTS_CPUFREQ
1944 config SYS_HAS_CPU_LOONGSON2E
1947 config SYS_HAS_CPU_LOONGSON2F
1949 select CPU_SUPPORTS_CPUFREQ
1950 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1952 config SYS_HAS_CPU_LOONGSON1B
1955 config SYS_HAS_CPU_LOONGSON1C
1958 config SYS_HAS_CPU_MIPS32_R1
1961 config SYS_HAS_CPU_MIPS32_R2
1964 config SYS_HAS_CPU_MIPS32_R3_5
1967 config SYS_HAS_CPU_MIPS32_R5
1969 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1971 config SYS_HAS_CPU_MIPS32_R6
1973 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1975 config SYS_HAS_CPU_MIPS64_R1
1978 config SYS_HAS_CPU_MIPS64_R2
1981 config SYS_HAS_CPU_MIPS64_R6
1983 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1985 config SYS_HAS_CPU_P5600
1987 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1989 config SYS_HAS_CPU_R3000
1992 config SYS_HAS_CPU_TX39XX
1995 config SYS_HAS_CPU_VR41XX
1998 config SYS_HAS_CPU_R4X00
2001 config SYS_HAS_CPU_TX49XX
2004 config SYS_HAS_CPU_R5000
2007 config SYS_HAS_CPU_R5500
2010 config SYS_HAS_CPU_NEVADA
2013 config SYS_HAS_CPU_R10000
2015 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2017 config SYS_HAS_CPU_RM7000
2020 config SYS_HAS_CPU_SB1
2023 config SYS_HAS_CPU_CAVIUM_OCTEON
2026 config SYS_HAS_CPU_BMIPS
2029 config SYS_HAS_CPU_BMIPS32_3300
2031 select SYS_HAS_CPU_BMIPS
2033 config SYS_HAS_CPU_BMIPS4350
2035 select SYS_HAS_CPU_BMIPS
2037 config SYS_HAS_CPU_BMIPS4380
2039 select SYS_HAS_CPU_BMIPS
2041 config SYS_HAS_CPU_BMIPS5000
2043 select SYS_HAS_CPU_BMIPS
2044 select ARCH_HAS_SYNC_DMA_FOR_CPU
2046 config SYS_HAS_CPU_XLR
2049 config SYS_HAS_CPU_XLP
2053 # CPU may reorder R->R, R->W, W->R, W->W
2054 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2056 config WEAK_ORDERING
2060 # CPU may reorder reads and writes beyond LL/SC
2061 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2063 config WEAK_REORDERING_BEYOND_LLSC
2068 # These two indicate any level of the MIPS32 and MIPS64 architecture
2072 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2073 CPU_MIPS32_R6 || CPU_P5600
2077 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2081 # These indicate the revision of the architecture
2085 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2089 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2091 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2096 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2098 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2103 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2105 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2106 select HAVE_ARCH_BITREVERSE
2107 select MIPS_ASID_BITS_VARIABLE
2108 select MIPS_CRC_SUPPORT
2111 config TARGET_ISA_REV
2113 default 1 if CPU_MIPSR1
2114 default 2 if CPU_MIPSR2
2115 default 5 if CPU_MIPSR5
2116 default 6 if CPU_MIPSR6
2119 Reflects the ISA revision being targeted by the kernel build. This
2120 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2128 config SYS_SUPPORTS_32BIT_KERNEL
2130 config SYS_SUPPORTS_64BIT_KERNEL
2132 config CPU_SUPPORTS_32BIT_KERNEL
2134 config CPU_SUPPORTS_64BIT_KERNEL
2136 config CPU_SUPPORTS_CPUFREQ
2138 config CPU_SUPPORTS_ADDRWINCFG
2140 config CPU_SUPPORTS_HUGEPAGES
2142 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2143 config MIPS_PGD_C0_CONTEXT
2145 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2148 # Set to y for ptrace access to watch registers.
2150 config HARDWARE_WATCHPOINTS
2152 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2157 prompt "Kernel code model"
2159 You should only select this option if you have a workload that
2160 actually benefits from 64-bit processing or if your machine has
2161 large memory. You will only be presented a single option in this
2162 menu if your system does not support both 32-bit and 64-bit kernels.
2165 bool "32-bit kernel"
2166 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2169 Select this option if you want to build a 32-bit kernel.
2172 bool "64-bit kernel"
2173 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2175 Select this option if you want to build a 64-bit kernel.
2180 bool "KVM Guest Kernel"
2181 depends on CPU_MIPS32_R2
2182 depends on BROKEN_ON_SMP
2184 Select this option if building a guest kernel for KVM (Trap & Emulate)
2187 config KVM_GUEST_TIMER_FREQ
2188 int "Count/Compare Timer Frequency (MHz)"
2189 depends on KVM_GUEST
2192 Set this to non-zero if building a guest kernel for KVM to skip RTC
2193 emulation when determining guest CPU Frequency. Instead, the guest's
2194 timer frequency is specified directly.
2196 config MIPS_VA_BITS_48
2197 bool "48 bits virtual memory"
2200 Support a maximum at least 48 bits of application virtual
2201 memory. Default is 40 bits or less, depending on the CPU.
2202 For page sizes 16k and above, this option results in a small
2203 memory overhead for page tables. For 4k page size, a fourth
2204 level of page tables is added which imposes both a memory
2205 overhead as well as slower TLB fault handling.
2210 prompt "Kernel page size"
2211 default PAGE_SIZE_4KB
2213 config PAGE_SIZE_4KB
2215 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2217 This option select the standard 4kB Linux page size. On some
2218 R3000-family processors this is the only available page size. Using
2219 4kB page size will minimize memory consumption and is therefore
2220 recommended for low memory systems.
2222 config PAGE_SIZE_8KB
2224 depends on CPU_CAVIUM_OCTEON
2225 depends on !MIPS_VA_BITS_48
2227 Using 8kB page size will result in higher performance kernel at
2228 the price of higher memory consumption. This option is available
2229 only on cnMIPS processors. Note that you will need a suitable Linux
2230 distribution to support this.
2232 config PAGE_SIZE_16KB
2234 depends on !CPU_R3000 && !CPU_TX39XX
2236 Using 16kB page size will result in higher performance kernel at
2237 the price of higher memory consumption. This option is available on
2238 all non-R3000 family processors. Note that you will need a suitable
2239 Linux distribution to support this.
2241 config PAGE_SIZE_32KB
2243 depends on CPU_CAVIUM_OCTEON
2244 depends on !MIPS_VA_BITS_48
2246 Using 32kB page size will result in higher performance kernel at
2247 the price of higher memory consumption. This option is available
2248 only on cnMIPS cores. Note that you will need a suitable Linux
2249 distribution to support this.
2251 config PAGE_SIZE_64KB
2253 depends on !CPU_R3000 && !CPU_TX39XX
2255 Using 64kB page size will result in higher performance kernel at
2256 the price of higher memory consumption. This option is available on
2257 all non-R3000 family processor. Not that at the time of this
2258 writing this option is still high experimental.
2262 config FORCE_MAX_ZONEORDER
2263 int "Maximum zone order"
2264 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2265 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2266 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2267 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2268 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2269 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2273 The kernel memory allocator divides physically contiguous memory
2274 blocks into "zones", where each zone is a power of two number of
2275 pages. This option selects the largest power of two that the kernel
2276 keeps in the memory allocator. If you need to allocate very large
2277 blocks of physically contiguous memory, then you may need to
2278 increase this value.
2280 This config option is actually maximum order plus one. For example,
2281 a value of 11 means that the largest free memory block is 2^10 pages.
2283 The page size is not necessarily 4KB. Keep this in mind
2284 when choosing a value for this option.
2289 config IP22_CPU_SCACHE
2294 # Support for a MIPS32 / MIPS64 style S-caches
2296 config MIPS_CPU_SCACHE
2300 config R5000_CPU_SCACHE
2304 config RM7000_CPU_SCACHE
2308 config SIBYTE_DMA_PAGEOPS
2309 bool "Use DMA to clear/copy pages"
2312 Instead of using the CPU to zero and copy pages, use a Data Mover
2313 channel. These DMA channels are otherwise unused by the standard
2314 SiByte Linux port. Seems to give a small performance benefit.
2316 config CPU_HAS_PREFETCH
2319 config CPU_GENERIC_DUMP_TLB
2321 default y if !(CPU_R3000 || CPU_TX39XX)
2323 config MIPS_FP_SUPPORT
2324 bool "Floating Point support" if EXPERT
2327 Select y to include support for floating point in the kernel
2328 including initialization of FPU hardware, FP context save & restore
2329 and emulation of an FPU where necessary. Without this support any
2330 userland program attempting to use floating point instructions will
2333 If you know that your userland will not attempt to use floating point
2334 instructions then you can say n here to shrink the kernel a little.
2338 config CPU_R2300_FPU
2340 depends on MIPS_FP_SUPPORT
2341 default y if CPU_R3000 || CPU_TX39XX
2348 depends on MIPS_FP_SUPPORT
2349 default y if !CPU_R2300_FPU
2351 config CPU_R4K_CACHE_TLB
2353 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2356 bool "MIPS MT SMP support (1 TC on each available VPE)"
2358 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2359 select CPU_MIPSR2_IRQ_VI
2360 select CPU_MIPSR2_IRQ_EI
2365 select SYS_SUPPORTS_SMP
2366 select SYS_SUPPORTS_SCHED_SMT
2367 select MIPS_PERF_SHARED_TC_COUNTERS
2369 This is a kernel model which is known as SMVP. This is supported
2370 on cores with the MT ASE and uses the available VPEs to implement
2371 virtual processors which supports SMP. This is equivalent to the
2372 Intel Hyperthreading feature. For further information go to
2373 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2379 bool "SMT (multithreading) scheduler support"
2380 depends on SYS_SUPPORTS_SCHED_SMT
2383 SMT scheduler support improves the CPU scheduler's decision making
2384 when dealing with MIPS MT enabled cores at a cost of slightly
2385 increased overhead in some places. If unsure say N here.
2387 config SYS_SUPPORTS_SCHED_SMT
2390 config SYS_SUPPORTS_MULTITHREADING
2393 config MIPS_MT_FPAFF
2394 bool "Dynamic FPU affinity for FP-intensive threads"
2396 depends on MIPS_MT_SMP
2398 config MIPSR2_TO_R6_EMULATOR
2399 bool "MIPS R2-to-R6 emulator"
2400 depends on CPU_MIPSR6
2401 depends on MIPS_FP_SUPPORT
2404 Choose this option if you want to run non-R6 MIPS userland code.
2405 Even if you say 'Y' here, the emulator will still be disabled by
2406 default. You can enable it using the 'mipsr2emu' kernel option.
2407 The only reason this is a build-time option is to save ~14K from the
2410 config SYS_SUPPORTS_VPE_LOADER
2412 depends on SYS_SUPPORTS_MULTITHREADING
2414 Indicates that the platform supports the VPE loader, and provides
2417 config MIPS_VPE_LOADER
2418 bool "VPE loader support."
2419 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2420 select CPU_MIPSR2_IRQ_VI
2421 select CPU_MIPSR2_IRQ_EI
2424 Includes a loader for loading an elf relocatable object
2425 onto another VPE and running it.
2427 config MIPS_VPE_LOADER_CMP
2430 depends on MIPS_VPE_LOADER && MIPS_CMP
2432 config MIPS_VPE_LOADER_MT
2435 depends on MIPS_VPE_LOADER && !MIPS_CMP
2437 config MIPS_VPE_LOADER_TOM
2438 bool "Load VPE program into memory hidden from linux"
2439 depends on MIPS_VPE_LOADER
2442 The loader can use memory that is present but has been hidden from
2443 Linux using the kernel command line option "mem=xxMB". It's up to
2444 you to ensure the amount you put in the option and the space your
2445 program requires is less or equal to the amount physically present.
2447 config MIPS_VPE_APSP_API
2448 bool "Enable support for AP/SP API (RTLX)"
2449 depends on MIPS_VPE_LOADER
2451 config MIPS_VPE_APSP_API_CMP
2454 depends on MIPS_VPE_APSP_API && MIPS_CMP
2456 config MIPS_VPE_APSP_API_MT
2459 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2462 bool "MIPS CMP framework support (DEPRECATED)"
2463 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2466 select SYS_SUPPORTS_SMP
2467 select WEAK_ORDERING
2470 Select this if you are using a bootloader which implements the "CMP
2471 framework" protocol (ie. YAMON) and want your kernel to make use of
2472 its ability to start secondary CPUs.
2474 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2478 bool "MIPS Coherent Processing System support"
2479 depends on SYS_SUPPORTS_MIPS_CPS
2481 select MIPS_CPS_PM if HOTPLUG_CPU
2483 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2484 select SYS_SUPPORTS_HOTPLUG_CPU
2485 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2486 select SYS_SUPPORTS_SMP
2487 select WEAK_ORDERING
2489 Select this if you wish to run an SMP kernel across multiple cores
2490 within a MIPS Coherent Processing System. When this option is
2491 enabled the kernel will probe for other cores and boot them with
2492 no external assistance. It is safe to enable this when hardware
2493 support is unavailable.
2506 config SB1_PASS_2_WORKAROUNDS
2508 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2511 config SB1_PASS_2_1_WORKAROUNDS
2513 depends on CPU_SB1 && CPU_SB1_PASS_2
2517 prompt "SmartMIPS or microMIPS ASE support"
2519 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2522 Select this if you want neither microMIPS nor SmartMIPS support
2524 config CPU_HAS_SMARTMIPS
2525 depends on SYS_SUPPORTS_SMARTMIPS
2528 SmartMIPS is a extension of the MIPS32 architecture aimed at
2529 increased security at both hardware and software level for
2530 smartcards. Enabling this option will allow proper use of the
2531 SmartMIPS instructions by Linux applications. However a kernel with
2532 this option will not work on a MIPS core without SmartMIPS core. If
2533 you don't know you probably don't have SmartMIPS and should say N
2536 config CPU_MICROMIPS
2537 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2540 When this option is enabled the kernel will be built using the
2546 bool "Support for the MIPS SIMD Architecture"
2547 depends on CPU_SUPPORTS_MSA
2548 depends on MIPS_FP_SUPPORT
2549 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2551 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2552 and a set of SIMD instructions to operate on them. When this option
2553 is enabled the kernel will support allocating & switching MSA
2554 vector register contexts. If you know that your kernel will only be
2555 running on CPUs which do not support MSA or that your userland will
2556 not be making use of it then you may wish to say N here to reduce
2557 the size & complexity of your kernel.
2568 depends on !CPU_DIEI_BROKEN
2571 config CPU_DIEI_BROKEN
2577 config CPU_NO_LOAD_STORE_LR
2580 CPU lacks support for unaligned load and store instructions:
2581 LWL, LWR, SWL, SWR (Load/store word left/right).
2582 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2586 # Vectored interrupt mode is an R2 feature
2588 config CPU_MIPSR2_IRQ_VI
2592 # Extended interrupt mode is an R2 feature
2594 config CPU_MIPSR2_IRQ_EI
2599 depends on !CPU_R3000
2605 config CPU_DADDI_WORKAROUNDS
2608 config CPU_R4000_WORKAROUNDS
2610 select CPU_R4400_WORKAROUNDS
2612 config CPU_R4400_WORKAROUNDS
2615 config CPU_R4X00_BUGS64
2617 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2619 config MIPS_ASID_SHIFT
2621 default 6 if CPU_R3000 || CPU_TX39XX
2624 config MIPS_ASID_BITS
2626 default 0 if MIPS_ASID_BITS_VARIABLE
2627 default 6 if CPU_R3000 || CPU_TX39XX
2630 config MIPS_ASID_BITS_VARIABLE
2633 config MIPS_CRC_SUPPORT
2636 # R4600 erratum. Due to the lack of errata information the exact
2637 # technical details aren't known. I've experimentally found that disabling
2638 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2640 config WAR_R4600_V1_INDEX_ICACHEOP
2643 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2645 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2646 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2647 # executed if there is no other dcache activity. If the dcache is
2648 # accessed for another instruction immeidately preceding when these
2649 # cache instructions are executing, it is possible that the dcache
2650 # tag match outputs used by these cache instructions will be
2651 # incorrect. These cache instructions should be preceded by at least
2652 # four instructions that are not any kind of load or store
2655 # This is not allowed: lw
2659 # cache Hit_Writeback_Invalidate_D
2661 # This is allowed: lw
2666 # cache Hit_Writeback_Invalidate_D
2667 config WAR_R4600_V1_HIT_CACHEOP
2670 # Writeback and invalidate the primary cache dcache before DMA.
2672 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2673 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2674 # operate correctly if the internal data cache refill buffer is empty. These
2675 # CACHE instructions should be separated from any potential data cache miss
2676 # by a load instruction to an uncached address to empty the response buffer."
2677 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2679 config WAR_R4600_V2_HIT_CACHEOP
2682 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2683 # the line which this instruction itself exists, the following
2684 # operation is not guaranteed."
2686 # Workaround: do two phase flushing for Index_Invalidate_I
2687 config WAR_TX49XX_ICACHE_INDEX_INV
2690 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2691 # opposes it being called that) where invalid instructions in the same
2692 # I-cache line worth of instructions being fetched may case spurious
2694 config WAR_ICACHE_REFILLS
2697 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2698 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2699 config WAR_R10000_LLSC
2702 # 34K core erratum: "Problems Executing the TLBR Instruction"
2703 config WAR_MIPS34K_MISSED_ITLB
2707 # - Highmem only makes sense for the 32-bit kernel.
2708 # - The current highmem code will only work properly on physically indexed
2709 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2710 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2711 # moment we protect the user and offer the highmem option only on machines
2712 # where it's known to be safe. This will not offer highmem on a few systems
2713 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2714 # indexed CPUs but we're playing safe.
2715 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2716 # know they might have memory configurations that could make use of highmem
2720 bool "High Memory Support"
2721 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2723 config CPU_SUPPORTS_HIGHMEM
2726 config SYS_SUPPORTS_HIGHMEM
2729 config SYS_SUPPORTS_SMARTMIPS
2732 config SYS_SUPPORTS_MICROMIPS
2735 config SYS_SUPPORTS_MIPS16
2738 This option must be set if a kernel might be executed on a MIPS16-
2739 enabled CPU even if MIPS16 is not actually being used. In other
2740 words, it makes the kernel MIPS16-tolerant.
2742 config CPU_SUPPORTS_MSA
2745 config ARCH_FLATMEM_ENABLE
2747 depends on !NUMA && !CPU_LOONGSON2EF
2749 config ARCH_SPARSEMEM_ENABLE
2751 select SPARSEMEM_STATIC if !SGI_IP27
2755 depends on SYS_SUPPORTS_NUMA
2757 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2758 Access). This option improves performance on systems with more
2759 than two nodes; on two node systems it is generally better to
2760 leave it disabled; on single node systems leave this option
2763 config SYS_SUPPORTS_NUMA
2766 config HAVE_SETUP_PER_CPU_AREA
2770 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2775 bool "Relocatable kernel"
2776 depends on SYS_SUPPORTS_RELOCATABLE
2777 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2778 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2779 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2780 CPU_P5600 || CAVIUM_OCTEON_SOC
2782 This builds a kernel image that retains relocation information
2783 so it can be loaded someplace besides the default 1MB.
2784 The relocations make the kernel binary about 15% larger,
2785 but are discarded at runtime
2787 config RELOCATION_TABLE_SIZE
2788 hex "Relocation table size"
2789 depends on RELOCATABLE
2790 range 0x0 0x01000000
2791 default "0x00100000"
2793 A table of relocation data will be appended to the kernel binary
2794 and parsed at boot to fix up the relocated kernel.
2796 This option allows the amount of space reserved for the table to be
2797 adjusted, although the default of 1Mb should be ok in most cases.
2799 The build will fail and a valid size suggested if this is too small.
2801 If unsure, leave at the default value.
2803 config RANDOMIZE_BASE
2804 bool "Randomize the address of the kernel image"
2805 depends on RELOCATABLE
2807 Randomizes the physical and virtual address at which the
2808 kernel image is loaded, as a security feature that
2809 deters exploit attempts relying on knowledge of the location
2810 of kernel internals.
2812 Entropy is generated using any coprocessor 0 registers available.
2814 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2818 config RANDOMIZE_BASE_MAX_OFFSET
2819 hex "Maximum kASLR offset" if EXPERT
2820 depends on RANDOMIZE_BASE
2821 range 0x0 0x40000000 if EVA || 64BIT
2822 range 0x0 0x08000000
2823 default "0x01000000"
2825 When kASLR is active, this provides the maximum offset that will
2826 be applied to the kernel image. It should be set according to the
2827 amount of physical RAM available in the target system minus
2828 PHYSICAL_START and must be a power of 2.
2830 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2831 EVA or 64-bit. The default is 16Mb.
2836 depends on NEED_MULTIPLE_NODES
2838 config HW_PERF_EVENTS
2839 bool "Enable hardware performance counter support for perf events"
2840 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2843 Enable hardware performance counter support for perf events. If
2844 disabled, perf events will use software events only.
2847 bool "Enable DMI scanning"
2848 depends on MACH_LOONGSON64
2849 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2852 Enabled scanning of DMI to identify machine quirks. Say Y
2853 here unless you have verified that your setup is not
2854 affected by entries in the DMI blacklist. Required by PNP
2858 bool "Multi-Processing support"
2859 depends on SYS_SUPPORTS_SMP
2861 This enables support for systems with more than one CPU. If you have
2862 a system with only one CPU, say N. If you have a system with more
2863 than one CPU, say Y.
2865 If you say N here, the kernel will run on uni- and multiprocessor
2866 machines, but will use only one CPU of a multiprocessor machine. If
2867 you say Y here, the kernel will run on many, but not all,
2868 uniprocessor machines. On a uniprocessor machine, the kernel
2869 will run faster if you say N here.
2871 People using multiprocessor machines who say Y here should also say
2872 Y to "Enhanced Real Time Clock Support", below.
2874 See also the SMP-HOWTO available at
2875 <https://www.tldp.org/docs.html#howto>.
2877 If you don't know what to do here, say N.
2880 bool "Support for hot-pluggable CPUs"
2881 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2883 Say Y here to allow turning CPUs off and on. CPUs can be
2884 controlled through /sys/devices/system/cpu.
2885 (Note: power management support will enable this option
2886 automatically on SMP systems. )
2887 Say N if you want to disable CPU hotplug.
2892 config SYS_SUPPORTS_MIPS_CMP
2895 config SYS_SUPPORTS_MIPS_CPS
2898 config SYS_SUPPORTS_SMP
2901 config NR_CPUS_DEFAULT_4
2904 config NR_CPUS_DEFAULT_8
2907 config NR_CPUS_DEFAULT_16
2910 config NR_CPUS_DEFAULT_32
2913 config NR_CPUS_DEFAULT_64
2917 int "Maximum number of CPUs (2-256)"
2920 default "4" if NR_CPUS_DEFAULT_4
2921 default "8" if NR_CPUS_DEFAULT_8
2922 default "16" if NR_CPUS_DEFAULT_16
2923 default "32" if NR_CPUS_DEFAULT_32
2924 default "64" if NR_CPUS_DEFAULT_64
2926 This allows you to specify the maximum number of CPUs which this
2927 kernel will support. The maximum supported value is 32 for 32-bit
2928 kernel and 64 for 64-bit kernels; the minimum value which makes
2929 sense is 1 for Qemu (useful only for kernel debugging purposes)
2930 and 2 for all others.
2932 This is purely to save memory - each supported CPU adds
2933 approximately eight kilobytes to the kernel image. For best
2934 performance should round up your number of processors to the next
2937 config MIPS_PERF_SHARED_TC_COUNTERS
2940 config MIPS_NR_CPU_NR_MAP_1024
2943 config MIPS_NR_CPU_NR_MAP
2946 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2947 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2950 # Timer Interrupt Frequency Configuration
2954 prompt "Timer frequency"
2957 Allows the configuration of the timer frequency.
2960 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2963 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2966 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2969 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2972 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2975 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2978 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2981 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2985 config SYS_SUPPORTS_24HZ
2988 config SYS_SUPPORTS_48HZ
2991 config SYS_SUPPORTS_100HZ
2994 config SYS_SUPPORTS_128HZ
2997 config SYS_SUPPORTS_250HZ
3000 config SYS_SUPPORTS_256HZ
3003 config SYS_SUPPORTS_1000HZ
3006 config SYS_SUPPORTS_1024HZ
3009 config SYS_SUPPORTS_ARBIT_HZ
3011 default y if !SYS_SUPPORTS_24HZ && \
3012 !SYS_SUPPORTS_48HZ && \
3013 !SYS_SUPPORTS_100HZ && \
3014 !SYS_SUPPORTS_128HZ && \
3015 !SYS_SUPPORTS_250HZ && \
3016 !SYS_SUPPORTS_256HZ && \
3017 !SYS_SUPPORTS_1000HZ && \
3018 !SYS_SUPPORTS_1024HZ
3024 default 100 if HZ_100
3025 default 128 if HZ_128
3026 default 250 if HZ_250
3027 default 256 if HZ_256
3028 default 1000 if HZ_1000
3029 default 1024 if HZ_1024
3032 def_bool HIGH_RES_TIMERS
3035 bool "Kexec system call"
3038 kexec is a system call that implements the ability to shutdown your
3039 current kernel, and to start another kernel. It is like a reboot
3040 but it is independent of the system firmware. And like a reboot
3041 you can start any kernel with it, not just Linux.
3043 The name comes from the similarity to the exec system call.
3045 It is an ongoing process to be certain the hardware in a machine
3046 is properly shutdown, so do not be surprised if this code does not
3047 initially work for you. As of this writing the exact hardware
3048 interface is strongly in flux, so no good recommendation can be
3052 bool "Kernel crash dumps"
3054 Generate crash dump after being started by kexec.
3055 This should be normally only set in special crash dump kernels
3056 which are loaded in the main kernel with kexec-tools into
3057 a specially reserved region and then later executed after
3058 a crash by kdump/kexec. The crash dump kernel must be compiled
3059 to a memory address not used by the main kernel or firmware using
3062 config PHYSICAL_START
3063 hex "Physical address where the kernel is loaded"
3064 default "0xffffffff84000000"
3065 depends on CRASH_DUMP
3067 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3068 If you plan to use kernel for capturing the crash dump change
3069 this value to start of the reserved region (the "X" value as
3070 specified in the "crashkernel=YM@XM" command line boot parameter
3071 passed to the panic-ed kernel).
3073 config MIPS_O32_FP64_SUPPORT
3074 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3075 depends on 32BIT || MIPS32_O32
3077 When this is enabled, the kernel will support use of 64-bit floating
3078 point registers with binaries using the O32 ABI along with the
3079 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3080 32-bit MIPS systems this support is at the cost of increasing the
3081 size and complexity of the compiled FPU emulator. Thus if you are
3082 running a MIPS32 system and know that none of your userland binaries
3083 will require 64-bit floating point, you may wish to reduce the size
3084 of your kernel & potentially improve FP emulation performance by
3087 Although binutils currently supports use of this flag the details
3088 concerning its effect upon the O32 ABI in userland are still being
3089 worked on. In order to avoid userland becoming dependant upon current
3090 behaviour before the details have been finalised, this option should
3091 be considered experimental and only enabled by those working upon
3099 select OF_EARLY_FLATTREE
3109 prompt "Kernel appended dtb support" if USE_OF
3110 default MIPS_NO_APPENDED_DTB
3112 config MIPS_NO_APPENDED_DTB
3115 Do not enable appended dtb support.
3117 config MIPS_ELF_APPENDED_DTB
3120 With this option, the boot code will look for a device tree binary
3121 DTB) included in the vmlinux ELF section .appended_dtb. By default
3122 it is empty and the DTB can be appended using binutils command
3125 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3127 This is meant as a backward compatiblity convenience for those
3128 systems with a bootloader that can't be upgraded to accommodate
3129 the documented boot protocol using a device tree.
3131 config MIPS_RAW_APPENDED_DTB
3132 bool "vmlinux.bin or vmlinuz.bin"
3134 With this option, the boot code will look for a device tree binary
3135 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3136 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3138 This is meant as a backward compatibility convenience for those
3139 systems with a bootloader that can't be upgraded to accommodate
3140 the documented boot protocol using a device tree.
3142 Beware that there is very little in terms of protection against
3143 this option being confused by leftover garbage in memory that might
3144 look like a DTB header after a reboot if no actual DTB is appended
3145 to vmlinux.bin. Do not leave this option active in a production kernel
3146 if you don't intend to always append a DTB.
3150 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3151 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3152 !MACH_LOONGSON64 && !MIPS_MALTA && \
3154 default MIPS_CMDLINE_FROM_BOOTLOADER
3156 config MIPS_CMDLINE_FROM_DTB
3158 bool "Dtb kernel arguments if available"
3160 config MIPS_CMDLINE_DTB_EXTEND
3162 bool "Extend dtb kernel arguments with bootloader arguments"
3164 config MIPS_CMDLINE_FROM_BOOTLOADER
3165 bool "Bootloader kernel arguments if available"
3167 config MIPS_CMDLINE_BUILTIN_EXTEND
3168 depends on CMDLINE_BOOL
3169 bool "Extend builtin kernel arguments with bootloader arguments"
3174 config LOCKDEP_SUPPORT
3178 config STACKTRACE_SUPPORT
3182 config PGTABLE_LEVELS
3184 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3185 default 3 if 64BIT && !PAGE_SIZE_64KB
3188 config MIPS_AUTO_PFN_OFFSET
3191 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3193 config PCI_DRIVERS_GENERIC
3194 select PCI_DOMAINS_GENERIC if PCI
3197 config PCI_DRIVERS_LEGACY
3198 def_bool !PCI_DRIVERS_GENERIC
3199 select NO_GENERIC_PCI_IOPORT_MAP
3200 select PCI_DOMAINS if PCI
3203 # ISA support is now enabled via select. Too many systems still have the one
3204 # or other ISA chip on the board that users don't know about so don't expect
3205 # users to choose the right thing ...
3211 bool "TURBOchannel support"
3212 depends on MACH_DECSTATION
3214 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3215 processors. TURBOchannel programming specifications are available
3217 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3219 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3220 Linux driver support status is documented at:
3221 <http://www.linux-mips.org/wiki/DECstation>
3227 config ARCH_MMAP_RND_BITS_MIN
3231 config ARCH_MMAP_RND_BITS_MAX
3235 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3238 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3245 select MIPS_EXTERNAL_TIMER
3258 config MIPS32_COMPAT
3264 config SYSVIPC_COMPAT
3268 bool "Kernel support for o32 binaries"
3270 select ARCH_WANT_OLD_COMPAT_IPC
3272 select MIPS32_COMPAT
3273 select SYSVIPC_COMPAT if SYSVIPC
3275 Select this option if you want to run o32 binaries. These are pure
3276 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3277 existing binaries are in this format.
3282 bool "Kernel support for n32 binaries"
3284 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3286 select MIPS32_COMPAT
3287 select SYSVIPC_COMPAT if SYSVIPC
3289 Select this option if you want to run n32 binaries. These are
3290 64-bit binaries using 32-bit quantities for addressing and certain
3291 data that would normally be 64-bit. They are used in special
3298 default y if MIPS32_O32 || MIPS32_N32
3301 menu "Power management options"
3303 config ARCH_HIBERNATION_POSSIBLE
3305 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3307 config ARCH_SUSPEND_POSSIBLE
3309 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3311 source "kernel/power/Kconfig"
3315 config MIPS_EXTERNAL_TIMER
3318 menu "CPU Power Management"
3320 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3321 source "drivers/cpufreq/Kconfig"
3324 source "drivers/cpuidle/Kconfig"
3328 source "drivers/firmware/Kconfig"
3330 source "arch/mips/kvm/Kconfig"
3332 source "arch/mips/vdso/Kconfig"