3 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_DMA_COHERENT_TO_PFN if MMU
6 select ARCH_HAS_GCOV_PROFILE_ALL
7 select ARCH_HAS_SYNC_DMA_FOR_CPU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9 select ARCH_MIGHT_HAVE_PC_PARPORT
10 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
11 select ARCH_WANT_IPC_PARSE_VERSION
12 select BUILDTIME_EXTABLE_SORT
14 select CLONE_BACKWARDS3
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_CPU_DEVICES
19 select GENERIC_IDLE_POLL_SETUP
20 select GENERIC_IRQ_PROBE
21 select GENERIC_IRQ_SHOW
22 select GENERIC_PCI_IOMAP
23 select GENERIC_SCHED_CLOCK
26 select HAVE_DEBUG_KMEMLEAK
27 select HAVE_DYNAMIC_FTRACE
28 select HAVE_FTRACE_MCOUNT_RECORD
29 select HAVE_FUNCTION_GRAPH_TRACER
30 select HAVE_FUNCTION_TRACER
31 select HAVE_MEMBLOCK_NODE_MAP
36 select MODULES_USE_ELF_RELA
38 select OF_EARLY_FLATTREE
39 select PCI_DOMAINS_GENERIC if PCI
40 select PCI_SYSCALL if PCI
41 select TRACING_SUPPORT
43 select CPU_NO_EFFICIENT_FFS
44 select MMU_GATHER_NO_RANGE if MMU
46 # Endianness selection
48 prompt "Endianness selection"
49 default CPU_LITTLE_ENDIAN
51 microblaze architectures can be configured for either little or
52 big endian formats. Be sure to select the appropriate mode.
57 config CPU_LITTLE_ENDIAN
65 config ARCH_HAS_ILOG2_U32
68 config ARCH_HAS_ILOG2_U64
71 config GENERIC_HWEIGHT
74 config GENERIC_CALIBRATE_DELAY
80 config STACKTRACE_SUPPORT
83 config LOCKDEP_SUPPORT
86 source "arch/microblaze/Kconfig.platform"
88 menu "Processor type and features"
90 source "kernel/Kconfig.hz"
96 comment "Boot options"
99 bool "Default bootloader kernel arguments"
102 string "Default kernel command string"
103 depends on CMDLINE_BOOL
104 default "console=ttyUL0,115200"
106 On some architectures there is currently no way for the boot loader
107 to pass arguments to the kernel. For these architectures, you should
108 supply some command-line options at build time by entering them
112 bool "Force default kernel command string"
113 depends on CMDLINE_BOOL
116 Set this to have arguments from the default kernel command string
117 override those passed by the boot loader.
120 bool "Enable seccomp to safely compute untrusted bytecode"
124 This kernel feature is useful for number crunching applications
125 that may need to compute untrusted bytecode during their
126 execution. By using pipes or other transports made available to
127 the process as file descriptors supporting the read/write
128 syscalls, it's possible to isolate those applications in
129 their own address space using seccomp. Once seccomp is
130 enabled via /proc/<pid>/seccomp, it cannot be disabled
131 and the task is only allowed to execute a few safe syscalls
132 defined by each seccomp mode.
134 If unsure, say Y. Only embedded should say N here.
138 menu "Kernel features"
144 config ADVANCED_OPTIONS
145 bool "Prompt for advanced kernel configuration options"
147 This option will enable prompting for a variety of advanced kernel
148 configuration options. These options can cause the kernel to not
149 work if they are set incorrectly, but can be used to optimize certain
150 aspects of kernel memory management.
152 Unless you know what you are doing, say N here.
154 comment "Default settings for advanced configuration options are used"
155 depends on !ADVANCED_OPTIONS
157 config XILINX_UNCACHED_SHADOW
158 bool "Are you using uncached shadow for RAM ?"
159 depends on ADVANCED_OPTIONS && !MMU
162 This is needed to be able to allocate uncachable memory regions.
163 The feature requires the design to define the RAM memory controller
164 window to be twice as large as the actual physical memory.
167 bool "High memory support"
170 The address space of Microblaze processors is only 4 Gigabytes large
171 and it has to accommodate user address space, kernel address
172 space as well as some memory mapped IO. That means that, if you
173 have a large amount of physical memory and/or IO, not all of the
174 memory can be "permanently mapped" by the kernel. The physical
175 memory that is not permanently mapped is called "high memory".
179 config LOWMEM_SIZE_BOOL
180 bool "Set maximum low memory"
181 depends on ADVANCED_OPTIONS && MMU
183 This option allows you to set the maximum amount of memory which
184 will be used as "low memory", that is, memory which the kernel can
185 access directly, without having to set up a kernel virtual mapping.
186 This can be useful in optimizing the layout of kernel virtual
189 Say N here unless you know what you are doing.
192 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
195 config MANUAL_RESET_VECTOR
196 hex "Microblaze reset vector address setup"
199 Set this option to have the kernel override the CPU Reset vector.
200 If zero, no change will be made to the MicroBlaze reset vector at
202 If non-zero, a jump instruction to this address, will be written
203 to the reset vector at address 0x0.
204 If you are unsure, set it to default value 0x0.
206 config KERNEL_START_BOOL
207 bool "Set custom kernel base address"
208 depends on ADVANCED_OPTIONS
210 This option allows you to set the kernel virtual address at which
211 the kernel will map low memory (the kernel image will be linked at
212 this address). This can be useful in optimizing the virtual memory
213 layout of the system.
215 Say N here unless you know what you are doing.
218 hex "Virtual address of kernel base" if KERNEL_START_BOOL
219 default "0xc0000000" if MMU
220 default KERNEL_BASE_ADDR if !MMU
222 config TASK_SIZE_BOOL
223 bool "Set custom user task size"
224 depends on ADVANCED_OPTIONS && MMU
226 This option allows you to set the amount of virtual address space
227 allocated to user tasks. This can be useful in optimizing the
228 virtual memory layout of the system.
230 Say N here unless you know what you are doing.
233 hex "Size of user task space" if TASK_SIZE_BOOL
238 default MICROBLAZE_4K_PAGES
239 depends on ADVANCED_OPTIONS && !MMU
241 Select the kernel logical page size. Increasing the page size
242 will reduce software overhead at each page boundary, allow
243 hardware prefetch mechanisms to be more effective, and allow
244 larger dma transfers increasing IO efficiency and reducing
245 overhead. However the utilization of memory will increase.
246 For example, each cached file will using a multiple of the
247 page size to hold its contents and the difference between the
248 end of file and the end of page is wasted.
250 If unsure, choose 4K_PAGES.
252 config MICROBLAZE_4K_PAGES
255 config MICROBLAZE_16K_PAGES
258 config MICROBLAZE_64K_PAGES
268 bool "Xilinx PCI host bridge support"