1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/sizes.h>
3 #include <asm/asm-offsets.h>
4 #include <asm/thread_info.h>
6 #define PAGE_SIZE _PAGE_SIZE
7 #define RO_EXCEPTION_TABLE_ALIGN 4
10 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
11 * ensure that it has .bss alignment (64K).
13 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
15 #include <asm-generic/vmlinux.lds.h>
16 #include "image-vars.h"
19 * Max avaliable Page Size is 64K, so we set SectionAlignment
20 * field of EFI application to 64K.
22 PECOFF_FILE_ALIGN = 0x200;
23 PECOFF_SEGMENT_ALIGN = 0x10000;
25 OUTPUT_ARCH(loongarch)
28 text PT_LOAD FLAGS(7); /* RWX */
29 note PT_NOTE FLAGS(4); /* R__ */
36 . = VMLINUX_LOAD_ADDRESS;
41 . = ALIGN(PECOFF_SEGMENT_ALIGN);
54 . = ALIGN(PECOFF_SEGMENT_ALIGN);
58 * struct alt_inst entries. From the header (alternative.h):
59 * "Alternative instructions for different CPU types or capabilities"
60 * Think locking instructions on spinlocks.
63 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
64 __alt_instructions = .;
66 __alt_instructions_end = .;
69 .got : ALIGN(16) { *(.got) }
70 .plt : ALIGN(16) { *(.plt) }
71 .got.plt : ALIGN(16) { *(.got.plt) }
73 . = ALIGN(PECOFF_SEGMENT_ALIGN);
77 INIT_TEXT_SECTION(PAGE_SIZE)
82 . = ALIGN(PECOFF_SEGMENT_ALIGN);
93 PERCPU_SECTION(1 << CONFIG_L1_CACHE_SHIFT)
96 .rela.dyn : ALIGN(8) { *(.rela.dyn) *(.rela*) }
101 . = ALIGN(PECOFF_SEGMENT_ALIGN);
108 RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PAGE_SIZE, THREAD_SIZE)
113 .edata_padding : { BYTE(0); . = ALIGN(PECOFF_FILE_ALIGN); }
116 BSS_SECTION(0, SZ_64K, 8)
117 . = ALIGN(PECOFF_SEGMENT_ALIGN);