1 // SPDX-License-Identifier: GPL-2.0
3 * Author: Huacai Chen <chenhuacai@loongson.cn>
4 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 #include <linux/bitfield.h>
7 #include <linux/bitops.h>
9 #include <linux/compiler.h>
10 #include <linux/context_tracking.h>
11 #include <linux/entry-common.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/kexec.h>
15 #include <linux/module.h>
16 #include <linux/extable.h>
18 #include <linux/sched/mm.h>
19 #include <linux/sched/debug.h>
20 #include <linux/smp.h>
21 #include <linux/spinlock.h>
22 #include <linux/kallsyms.h>
23 #include <linux/memblock.h>
24 #include <linux/interrupt.h>
25 #include <linux/ptrace.h>
26 #include <linux/kgdb.h>
27 #include <linux/kdebug.h>
28 #include <linux/kprobes.h>
29 #include <linux/notifier.h>
30 #include <linux/irq.h>
31 #include <linux/perf_event.h>
33 #include <asm/addrspace.h>
34 #include <asm/bootinfo.h>
35 #include <asm/branch.h>
36 #include <asm/break.h>
39 #include <asm/loongarch.h>
40 #include <asm/mmu_context.h>
41 #include <asm/pgtable.h>
42 #include <asm/ptrace.h>
43 #include <asm/sections.h>
44 #include <asm/siginfo.h>
45 #include <asm/stacktrace.h>
47 #include <asm/types.h>
48 #include <asm/unwind.h>
50 #include "access-helper.h"
52 extern asmlinkage void handle_ade(void);
53 extern asmlinkage void handle_ale(void);
54 extern asmlinkage void handle_sys(void);
55 extern asmlinkage void handle_bp(void);
56 extern asmlinkage void handle_ri(void);
57 extern asmlinkage void handle_fpu(void);
58 extern asmlinkage void handle_fpe(void);
59 extern asmlinkage void handle_lbt(void);
60 extern asmlinkage void handle_lsx(void);
61 extern asmlinkage void handle_lasx(void);
62 extern asmlinkage void handle_reserved(void);
63 extern asmlinkage void handle_watch(void);
64 extern asmlinkage void handle_vint(void);
66 static void show_backtrace(struct task_struct *task, const struct pt_regs *regs,
67 const char *loglvl, bool user)
70 struct unwind_state state;
71 struct pt_regs *pregs = (struct pt_regs *)regs;
76 printk("%sCall Trace:", loglvl);
77 for (unwind_start(&state, task, pregs);
78 !unwind_done(&state); unwind_next_frame(&state)) {
79 addr = unwind_get_return_address(&state);
80 print_ip_sym(loglvl, addr);
82 printk("%s\n", loglvl);
85 static void show_stacktrace(struct task_struct *task,
86 const struct pt_regs *regs, const char *loglvl, bool user)
89 const int field = 2 * sizeof(unsigned long);
90 unsigned long stackdata;
91 unsigned long *sp = (unsigned long *)regs->regs[3];
93 printk("%sStack :", loglvl);
95 while ((unsigned long) sp & (PAGE_SIZE - 1)) {
96 if (i && ((i % (64 / field)) == 0)) {
98 printk("%s ", loglvl);
105 if (__get_addr(&stackdata, sp++, user)) {
106 pr_cont(" (Bad stack address)");
110 pr_cont(" %0*lx", field, stackdata);
114 show_backtrace(task, regs, loglvl, user);
117 void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
125 regs.regs[3] = (unsigned long)sp;
127 if (!task || task == current)
128 prepare_frametrace(®s);
130 regs.csr_era = task->thread.reg01;
132 regs.regs[3] = task->thread.reg03;
133 regs.regs[22] = task->thread.reg22;
137 show_stacktrace(task, ®s, loglvl, false);
140 static void show_code(unsigned int *pc, bool user)
147 for(i = -3 ; i < 6 ; i++) {
148 if (__get_inst(&insn, pc + i, user)) {
149 pr_cont(" (Bad address in era)\n");
152 pr_cont("%c%08x%c", (i?' ':'<'), insn, (i?' ':'>'));
157 static void print_bool_fragment(const char *key, unsigned long val, bool first)
159 /* e.g. "+PG", "-DA" */
160 pr_cont("%s%c%s", first ? "" : " ", val ? '+' : '-', key);
163 static void print_plv_fragment(const char *key, int val)
165 /* e.g. "PLV0", "PPLV3" */
166 pr_cont("%s%d", key, val);
169 static void print_memory_type_fragment(const char *key, unsigned long val)
171 const char *humanized_type;
175 humanized_type = "SUC";
178 humanized_type = "CC";
181 humanized_type = "WUC";
184 pr_cont(" %s=Reserved(%lu)", key, val);
188 /* e.g. " DATM=WUC" */
189 pr_cont(" %s=%s", key, humanized_type);
192 static void print_crmd(unsigned long x)
194 printk(" CRMD: %08lx (", x);
195 print_plv_fragment("PLV", (int) FIELD_GET(CSR_CRMD_PLV, x));
196 print_bool_fragment("IE", FIELD_GET(CSR_CRMD_IE, x), false);
197 print_bool_fragment("DA", FIELD_GET(CSR_CRMD_DA, x), false);
198 print_bool_fragment("PG", FIELD_GET(CSR_CRMD_PG, x), false);
199 print_memory_type_fragment("DACF", FIELD_GET(CSR_CRMD_DACF, x));
200 print_memory_type_fragment("DACM", FIELD_GET(CSR_CRMD_DACM, x));
201 print_bool_fragment("WE", FIELD_GET(CSR_CRMD_WE, x), false);
205 static void print_prmd(unsigned long x)
207 printk(" PRMD: %08lx (", x);
208 print_plv_fragment("PPLV", (int) FIELD_GET(CSR_PRMD_PPLV, x));
209 print_bool_fragment("PIE", FIELD_GET(CSR_PRMD_PIE, x), false);
210 print_bool_fragment("PWE", FIELD_GET(CSR_PRMD_PWE, x), false);
214 static void print_euen(unsigned long x)
216 printk(" EUEN: %08lx (", x);
217 print_bool_fragment("FPE", FIELD_GET(CSR_EUEN_FPEN, x), true);
218 print_bool_fragment("SXE", FIELD_GET(CSR_EUEN_LSXEN, x), false);
219 print_bool_fragment("ASXE", FIELD_GET(CSR_EUEN_LASXEN, x), false);
220 print_bool_fragment("BTE", FIELD_GET(CSR_EUEN_LBTEN, x), false);
224 static void __show_regs(const struct pt_regs *regs)
226 const int field = 2 * sizeof(unsigned long);
227 unsigned int excsubcode;
228 unsigned int exccode;
230 show_regs_print_info(KERN_DEFAULT);
232 /* Print saved GPRs except $zero (substituting with PC/ERA) */
233 #define GPR_FIELD(x) field, regs->regs[x]
234 printk("pc %0*lx ra %0*lx tp %0*lx sp %0*lx\n",
235 field, regs->csr_era, GPR_FIELD(1), GPR_FIELD(2), GPR_FIELD(3));
236 printk("a0 %0*lx a1 %0*lx a2 %0*lx a3 %0*lx\n",
237 GPR_FIELD(4), GPR_FIELD(5), GPR_FIELD(6), GPR_FIELD(7));
238 printk("a4 %0*lx a5 %0*lx a6 %0*lx a7 %0*lx\n",
239 GPR_FIELD(8), GPR_FIELD(9), GPR_FIELD(10), GPR_FIELD(11));
240 printk("t0 %0*lx t1 %0*lx t2 %0*lx t3 %0*lx\n",
241 GPR_FIELD(12), GPR_FIELD(13), GPR_FIELD(14), GPR_FIELD(15));
242 printk("t4 %0*lx t5 %0*lx t6 %0*lx t7 %0*lx\n",
243 GPR_FIELD(16), GPR_FIELD(17), GPR_FIELD(18), GPR_FIELD(19));
244 printk("t8 %0*lx u0 %0*lx s9 %0*lx s0 %0*lx\n",
245 GPR_FIELD(20), GPR_FIELD(21), GPR_FIELD(22), GPR_FIELD(23));
246 printk("s1 %0*lx s2 %0*lx s3 %0*lx s4 %0*lx\n",
247 GPR_FIELD(24), GPR_FIELD(25), GPR_FIELD(26), GPR_FIELD(27));
248 printk("s5 %0*lx s6 %0*lx s7 %0*lx s8 %0*lx\n",
249 GPR_FIELD(28), GPR_FIELD(29), GPR_FIELD(30), GPR_FIELD(31));
251 /* The slot for $zero is reused as the syscall restart flag */
253 printk("syscall restart flag: %0*lx\n", GPR_FIELD(0));
255 if (user_mode(regs)) {
256 printk(" ra: %0*lx\n", GPR_FIELD(1));
257 printk(" ERA: %0*lx\n", field, regs->csr_era);
259 printk(" ra: %0*lx %pS\n", GPR_FIELD(1), (void *) regs->regs[1]);
260 printk(" ERA: %0*lx %pS\n", field, regs->csr_era, (void *) regs->csr_era);
264 /* Print saved important CSRs */
265 print_crmd(regs->csr_crmd);
266 print_prmd(regs->csr_prmd);
267 print_euen(regs->csr_euen);
268 printk(" ECFG: %08lx\n", regs->csr_ecfg);
269 printk("ESTAT: %08lx\n", regs->csr_estat);
271 exccode = ((regs->csr_estat) & CSR_ESTAT_EXC) >> CSR_ESTAT_EXC_SHIFT;
272 excsubcode = ((regs->csr_estat) & CSR_ESTAT_ESUBCODE) >> CSR_ESTAT_ESUBCODE_SHIFT;
273 printk("ExcCode : %x (SubCode %x)\n", exccode, excsubcode);
275 if (exccode >= EXCCODE_TLBL && exccode <= EXCCODE_ALE)
276 printk("BadVA : %0*lx\n", field, regs->csr_badvaddr);
278 printk("PrId : %08x (%s)\n", read_cpucfg(LOONGARCH_CPUCFG0),
279 cpu_family_string());
282 void show_regs(struct pt_regs *regs)
284 __show_regs((struct pt_regs *)regs);
288 void show_registers(struct pt_regs *regs)
292 printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n",
293 current->comm, current->pid, current_thread_info(), current);
295 show_stacktrace(current, regs, KERN_DEFAULT, user_mode(regs));
296 show_code((void *)regs->csr_era, user_mode(regs));
300 static DEFINE_RAW_SPINLOCK(die_lock);
302 void __noreturn die(const char *str, struct pt_regs *regs)
304 static int die_counter;
309 if (notify_die(DIE_OOPS, str, regs, 0, current->thread.trap_nr,
310 SIGSEGV) == NOTIFY_STOP)
314 raw_spin_lock_irq(&die_lock);
317 printk("%s[#%d]:\n", str, ++die_counter);
318 show_registers(regs);
319 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
320 raw_spin_unlock_irq(&die_lock);
324 if (regs && kexec_should_crash(current))
328 panic("Fatal exception in interrupt");
331 panic("Fatal exception");
336 static inline void setup_vint_size(unsigned int size)
342 if (vs == 0 || vs > 7)
343 panic("vint_size %d Not support yet", vs);
345 csr_xchg32(vs<<CSR_ECFG_VS_SHIFT, CSR_ECFG_VS, LOONGARCH_CSR_ECFG);
349 * Send SIGFPE according to FCSR Cause bits, which must have already
350 * been masked against Enable bits. This is impotant as Inexact can
351 * happen together with Overflow or Underflow, and `ptrace' can set
354 void force_fcsr_sig(unsigned long fcsr, void __user *fault_addr,
355 struct task_struct *tsk)
357 int si_code = FPE_FLTUNK;
359 if (fcsr & FPU_CSR_INV_X)
360 si_code = FPE_FLTINV;
361 else if (fcsr & FPU_CSR_DIV_X)
362 si_code = FPE_FLTDIV;
363 else if (fcsr & FPU_CSR_OVF_X)
364 si_code = FPE_FLTOVF;
365 else if (fcsr & FPU_CSR_UDF_X)
366 si_code = FPE_FLTUND;
367 else if (fcsr & FPU_CSR_INE_X)
368 si_code = FPE_FLTRES;
370 force_sig_fault(SIGFPE, si_code, fault_addr);
373 int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcsr)
382 force_fcsr_sig(fcsr, fault_addr, current);
386 force_sig_fault(SIGBUS, BUS_ADRERR, fault_addr);
390 mmap_read_lock(current->mm);
391 if (vma_lookup(current->mm, (unsigned long)fault_addr))
392 si_code = SEGV_ACCERR;
394 si_code = SEGV_MAPERR;
395 mmap_read_unlock(current->mm);
396 force_sig_fault(SIGSEGV, si_code, fault_addr);
406 * Delayed fp exceptions when doing a lazy ctx switch
408 asmlinkage void noinstr do_fpe(struct pt_regs *regs, unsigned long fcsr)
411 void __user *fault_addr;
412 irqentry_state_t state = irqentry_enter(regs);
414 if (notify_die(DIE_FP, "FP exception", regs, 0, current->thread.trap_nr,
415 SIGFPE) == NOTIFY_STOP)
418 /* Clear FCSR.Cause before enabling interrupts */
419 write_fcsr(LOONGARCH_FCSR0, fcsr & ~mask_fcsr_x(fcsr));
422 die_if_kernel("FP exception in kernel code", regs);
425 fault_addr = (void __user *) regs->csr_era;
427 /* Send a signal if required. */
428 process_fpemu_return(sig, fault_addr, fcsr);
432 irqentry_exit(regs, state);
435 asmlinkage void noinstr do_ade(struct pt_regs *regs)
437 irqentry_state_t state = irqentry_enter(regs);
439 die_if_kernel("Kernel ade access", regs);
440 force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)regs->csr_badvaddr);
442 irqentry_exit(regs, state);
446 int unaligned_enabled __read_mostly = 1; /* Enabled by default */
447 int no_unaligned_warning __read_mostly = 1; /* Only 1 warning by default */
449 asmlinkage void noinstr do_ale(struct pt_regs *regs)
451 irqentry_state_t state = irqentry_enter(regs);
453 #ifndef CONFIG_ARCH_STRICT_ALIGN
454 die_if_kernel("Kernel ale access", regs);
455 force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs->csr_badvaddr);
459 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs->csr_badvaddr);
462 * Did we catch a fault trying to load an instruction?
464 if (regs->csr_badvaddr == regs->csr_era)
466 if (user_mode(regs) && !test_thread_flag(TIF_FIXADE))
468 if (!unaligned_enabled)
470 if (!no_unaligned_warning)
471 show_registers(regs);
473 pc = (unsigned int *)exception_era(regs);
475 emulate_load_store_insn(regs, (void __user *)regs->csr_badvaddr, pc);
480 die_if_kernel("Kernel ale access", regs);
481 force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs->csr_badvaddr);
484 irqentry_exit(regs, state);
487 #ifdef CONFIG_GENERIC_BUG
488 int is_valid_bugaddr(unsigned long addr)
492 #endif /* CONFIG_GENERIC_BUG */
494 static void bug_handler(struct pt_regs *regs)
496 switch (report_bug(regs->csr_era, regs)) {
497 case BUG_TRAP_TYPE_BUG:
498 case BUG_TRAP_TYPE_NONE:
499 die_if_kernel("Oops - BUG", regs);
503 case BUG_TRAP_TYPE_WARN:
504 /* Skip the BUG instruction and continue */
505 regs->csr_era += LOONGARCH_INSN_SIZE;
510 asmlinkage void noinstr do_bp(struct pt_regs *regs)
512 bool user = user_mode(regs);
513 unsigned int opcode, bcode;
514 unsigned long era = exception_era(regs);
515 irqentry_state_t state = irqentry_enter(regs);
517 if (regs->csr_prmd & CSR_PRMD_PIE)
520 current->thread.trap_nr = read_csr_excode();
521 if (__get_inst(&opcode, (u32 *)era, user))
524 bcode = (opcode & 0x7fff);
527 * notify the kprobe handlers, if instruction is likely to
532 if (kprobe_breakpoint_handler(regs))
536 case BRK_KPROBE_SSTEPBP:
537 if (kprobe_singlestep_handler(regs))
542 if (notify_die(DIE_UPROBE, "Uprobe", regs, bcode,
543 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP)
547 case BRK_UPROBE_XOLBP:
548 if (notify_die(DIE_UPROBE_XOL, "Uprobe_XOL", regs, bcode,
549 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP)
554 if (notify_die(DIE_TRAP, "Break", regs, bcode,
555 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP)
566 die_if_kernel("Break instruction in kernel code", regs);
567 force_sig_fault(SIGFPE, FPE_INTDIV, (void __user *)regs->csr_era);
570 die_if_kernel("Break instruction in kernel code", regs);
571 force_sig_fault(SIGFPE, FPE_INTOVF, (void __user *)regs->csr_era);
574 die_if_kernel("Break instruction in kernel code", regs);
575 force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->csr_era);
580 if (regs->csr_prmd & CSR_PRMD_PIE)
583 irqentry_exit(regs, state);
591 asmlinkage void noinstr do_watch(struct pt_regs *regs)
593 irqentry_state_t state = irqentry_enter(regs);
595 #ifndef CONFIG_HAVE_HW_BREAKPOINT
596 pr_warn("Hardware watch point handler not implemented!\n");
598 if (test_tsk_thread_flag(current, TIF_SINGLESTEP)) {
599 int llbit = (csr_read32(LOONGARCH_CSR_LLBCTL) & 0x1);
600 unsigned long pc = instruction_pointer(regs);
601 union loongarch_instruction *ip = (union loongarch_instruction *)pc;
605 * When the ll-sc combo is encountered, it is regarded as an single
606 * instruction. So don't clear llbit and reset CSR.FWPS.Skip until
607 * the llsc execution is completed.
609 csr_write32(CSR_FWPC_SKIP, LOONGARCH_CSR_FWPS);
610 csr_write32(CSR_LLBCTL_KLO, LOONGARCH_CSR_LLBCTL);
614 if (pc == current->thread.single_step) {
616 * Certain insns are occasionally not skipped when CSR.FWPS.Skip is
617 * set, such as fld.d/fst.d. So singlestep needs to compare whether
618 * the csr_era is equal to the value of singlestep which last time set.
620 if (!is_self_loop_ins(ip, regs)) {
622 * Check if the given instruction the target pc is equal to the
623 * current pc, If yes, then we should not set the CSR.FWPS.SKIP
624 * bit to break the original instruction stream.
626 csr_write32(CSR_FWPC_SKIP, LOONGARCH_CSR_FWPS);
631 breakpoint_handler(regs);
632 watchpoint_handler(regs);
638 irqentry_exit(regs, state);
641 asmlinkage void noinstr do_ri(struct pt_regs *regs)
644 unsigned int opcode = 0;
645 unsigned int __user *era = (unsigned int __user *)exception_era(regs);
646 irqentry_state_t state = irqentry_enter(regs);
649 current->thread.trap_nr = read_csr_excode();
651 if (notify_die(DIE_RI, "RI Fault", regs, 0, current->thread.trap_nr,
652 SIGILL) == NOTIFY_STOP)
655 die_if_kernel("Reserved instruction in kernel code", regs);
657 if (unlikely(get_user(opcode, era) < 0)) {
659 current->thread.error_code = 1;
666 irqentry_exit(regs, state);
669 static void init_restore_fp(void)
672 /* First time FP context user. */
675 /* This task has formerly used the FP context */
680 BUG_ON(!is_fp_enabled());
683 asmlinkage void noinstr do_fpu(struct pt_regs *regs)
685 irqentry_state_t state = irqentry_enter(regs);
688 die_if_kernel("do_fpu invoked from kernel context!", regs);
695 irqentry_exit(regs, state);
698 asmlinkage void noinstr do_lsx(struct pt_regs *regs)
700 irqentry_state_t state = irqentry_enter(regs);
706 irqentry_exit(regs, state);
709 asmlinkage void noinstr do_lasx(struct pt_regs *regs)
711 irqentry_state_t state = irqentry_enter(regs);
717 irqentry_exit(regs, state);
720 asmlinkage void noinstr do_lbt(struct pt_regs *regs)
722 irqentry_state_t state = irqentry_enter(regs);
728 irqentry_exit(regs, state);
731 asmlinkage void noinstr do_reserved(struct pt_regs *regs)
733 irqentry_state_t state = irqentry_enter(regs);
737 * Game over - no way to handle this if it ever occurs. Most probably
738 * caused by a fatal error after another hardware/software error.
740 pr_err("Caught reserved exception %u on pid:%d [%s] - should not happen\n",
741 read_csr_excode(), current->pid, current->comm);
742 die_if_kernel("do_reserved exception", regs);
743 force_sig(SIGUNUSED);
747 irqentry_exit(regs, state);
750 asmlinkage void cache_parity_error(void)
752 /* For the moment, report the problem and hang. */
753 pr_err("Cache error exception:\n");
754 pr_err("csr_merrctl == %08x\n", csr_read32(LOONGARCH_CSR_MERRCTL));
755 pr_err("csr_merrera == %016llx\n", csr_read64(LOONGARCH_CSR_MERRERA));
756 panic("Can't handle the cache error!");
759 asmlinkage void noinstr handle_loongarch_irq(struct pt_regs *regs)
761 struct pt_regs *old_regs;
764 old_regs = set_irq_regs(regs);
765 handle_arch_irq(regs);
766 set_irq_regs(old_regs);
770 asmlinkage void noinstr do_vint(struct pt_regs *regs, unsigned long sp)
773 register unsigned long stack;
774 irqentry_state_t state = irqentry_enter(regs);
776 cpu = smp_processor_id();
778 if (on_irq_stack(cpu, sp))
779 handle_loongarch_irq(regs);
781 stack = per_cpu(irq_stack, cpu) + IRQ_STACK_START;
783 /* Save task's sp on IRQ stack for unwinding */
784 *(unsigned long *)stack = sp;
786 __asm__ __volatile__(
787 "move $s0, $sp \n" /* Preserve sp */
788 "move $sp, %[stk] \n" /* Switch stack */
789 "move $a0, %[regs] \n"
790 "bl handle_loongarch_irq \n"
791 "move $sp, $s0 \n" /* Restore sp */
793 : [stk] "r" (stack), [regs] "r" (regs)
794 : "$a0", "$a1", "$a2", "$a3", "$a4", "$a5", "$a6", "$a7", "$s0",
795 "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8",
799 irqentry_exit(regs, state);
802 unsigned long eentry;
803 unsigned long tlbrentry;
805 long exception_handlers[VECSIZE * 128 / sizeof(long)] __aligned(SZ_64K);
807 static void configure_exception_vector(void)
809 eentry = (unsigned long)exception_handlers;
810 tlbrentry = (unsigned long)exception_handlers + 80*VECSIZE;
812 csr_write64(eentry, LOONGARCH_CSR_EENTRY);
813 csr_write64(eentry, LOONGARCH_CSR_MERRENTRY);
814 csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY);
817 void per_cpu_trap_init(int cpu)
821 setup_vint_size(VECSIZE);
823 configure_exception_vector();
825 if (!cpu_data[cpu].asid_cache)
826 cpu_data[cpu].asid_cache = asid_first_version(cpu);
829 current->active_mm = &init_mm;
831 enter_lazy_tlb(&init_mm, current);
833 /* Initialise exception handlers */
835 for (i = 0; i < 64; i++)
836 set_handler(i * VECSIZE, handle_reserved, VECSIZE);
842 /* Install CPU exception handler */
843 void set_handler(unsigned long offset, void *addr, unsigned long size)
845 memcpy((void *)(eentry + offset), addr, size);
846 local_flush_icache_range(eentry + offset, eentry + offset + size);
849 static const char panic_null_cerr[] =
850 "Trying to set NULL cache error exception handler\n";
853 * Install uncached CPU exception handler.
854 * This is suitable only for the cache error exception which is the only
855 * exception handler that is being run uncached.
857 void set_merr_handler(unsigned long offset, void *addr, unsigned long size)
859 unsigned long uncached_eentry = TO_UNCACHE(__pa(eentry));
862 panic(panic_null_cerr);
864 memcpy((void *)(uncached_eentry + offset), addr, size);
867 void __init trap_init(void)
871 /* Set interrupt vector handler */
872 for (i = EXCCODE_INT_START; i <= EXCCODE_INT_END; i++)
873 set_handler(i * VECSIZE, handle_vint, VECSIZE);
875 set_handler(EXCCODE_ADE * VECSIZE, handle_ade, VECSIZE);
876 set_handler(EXCCODE_ALE * VECSIZE, handle_ale, VECSIZE);
877 set_handler(EXCCODE_SYS * VECSIZE, handle_sys, VECSIZE);
878 set_handler(EXCCODE_BP * VECSIZE, handle_bp, VECSIZE);
879 set_handler(EXCCODE_INE * VECSIZE, handle_ri, VECSIZE);
880 set_handler(EXCCODE_IPE * VECSIZE, handle_ri, VECSIZE);
881 set_handler(EXCCODE_FPDIS * VECSIZE, handle_fpu, VECSIZE);
882 set_handler(EXCCODE_LSXDIS * VECSIZE, handle_lsx, VECSIZE);
883 set_handler(EXCCODE_LASXDIS * VECSIZE, handle_lasx, VECSIZE);
884 set_handler(EXCCODE_FPE * VECSIZE, handle_fpe, VECSIZE);
885 set_handler(EXCCODE_BTDIS * VECSIZE, handle_lbt, VECSIZE);
886 set_handler(EXCCODE_WATCH * VECSIZE, handle_watch, VECSIZE);
890 local_flush_icache_range(eentry, eentry + 0x400);