arch/loongarch/include/asm/cacheflush.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
   4  */
   5 #ifndef _ASM_CACHEFLUSH_H
   6 #define _ASM_CACHEFLUSH_H
   7
   8 #include <linux/mm.h>
   9 #include <asm/cpu-features.h>
  10 #include <asm/cacheops.h>
  11
  12 extern void local_flush_icache_range(unsigned long start, unsigned long end);
  13
  14 #define flush_icache_range      local_flush_icache_range
  15 #define flush_icache_user_range local_flush_icache_range
  16
  17 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
  18
  19 #define flush_cache_all()                               do { } while (0)
  20 #define flush_cache_mm(mm)                              do { } while (0)
  21 #define flush_cache_dup_mm(mm)                          do { } while (0)
  22 #define flush_cache_range(vma, start, end)              do { } while (0)
  23 #define flush_cache_page(vma, vmaddr, pfn)              do { } while (0)
  24 #define flush_cache_vmap(start, end)                    do { } while (0)
  25 #define flush_cache_vunmap(start, end)                  do { } while (0)
  26 #define flush_icache_page(vma, page)                    do { } while (0)
  27 #define flush_icache_user_page(vma, page, addr, len)    do { } while (0)
  28 #define flush_dcache_page(page)                         do { } while (0)
  29 #define flush_dcache_mmap_lock(mapping)                 do { } while (0)
  30 #define flush_dcache_mmap_unlock(mapping)               do { } while (0)
  31
  32 #define cache_op(op, addr)                                              \
  33         __asm__ __volatile__(                                           \
  34         "       cacop   %0, %1                                  \n"     \
  35         :                                                               \
  36         : "i" (op), "ZC" (*(unsigned char *)(addr)))
  37
  38 static inline void flush_icache_line_indexed(unsigned long addr)
  39 {
  40         cache_op(Index_Invalidate_I, addr);
  41 }
  42
  43 static inline void flush_dcache_line_indexed(unsigned long addr)
  44 {
  45         cache_op(Index_Writeback_Inv_D, addr);
  46 }
  47
  48 static inline void flush_vcache_line_indexed(unsigned long addr)
  49 {
  50         cache_op(Index_Writeback_Inv_V, addr);
  51 }
  52
  53 static inline void flush_scache_line_indexed(unsigned long addr)
  54 {
  55         cache_op(Index_Writeback_Inv_S, addr);
  56 }
  57
  58 static inline void flush_icache_line(unsigned long addr)
  59 {
  60         cache_op(Hit_Invalidate_I, addr);
  61 }
  62
  63 static inline void flush_dcache_line(unsigned long addr)
  64 {
  65         cache_op(Hit_Writeback_Inv_D, addr);
  66 }
  67
  68 static inline void flush_vcache_line(unsigned long addr)
  69 {
  70         cache_op(Hit_Writeback_Inv_V, addr);
  71 }
  72
  73 static inline void flush_scache_line(unsigned long addr)
  74 {
  75         cache_op(Hit_Writeback_Inv_S, addr);
  76 }
  77
  78 #include <asm-generic/cacheflush.h>
  79
  80 #endif /* _ASM_CACHEFLUSH_H */